Skip to content
View AmeerAbdelhadi's full-sized avatar

Block or report AmeerAbdelhadi

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. Multiported-RAM Multiported-RAM Public

    Modular Multi-ported SRAM-based Memory

    Verilog 29 11

  2. Indirectly-Indexed-2D-Ternary-Content-Addressable-Memory-TCAM Indirectly-Indexed-2D-Ternary-Content-Addressable-Memory-TCAM Public

    Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)

    Shell 23 13

  3. 2D-Binary-Content-Addressable-Memory-BCAM 2D-Binary-Content-Addressable-Memory-BCAM Public

    Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)

    Verilog 19 9

  4. Binary-to-BCD-Converter Binary-to-BCD-Converter Public

    Parametric Binary to BCD Converter Using Double Dabble / Shift and Add 3 Algorithm

    Verilog 18 4

  5. Switched-Multiported-RAM Switched-Multiported-RAM Public

    Switched SRAM-based Multi-ported RAM

    Verilog 15 6

  6. Multi-Sink-Lee-Moore-Shortest-Path-Maze-Router Multi-Sink-Lee-Moore-Shortest-Path-Maze-Router Public

    This is an implemention of Lee-Moore's Shortest Path Maze Router with multi-sink nets support.

    C 11 4