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Support complex backend/frontend hierarchies #11

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@hlyytine hlyytine commented Oct 5, 2023

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hlyytine and others added 20 commits February 21, 2023 15:10
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Previously the seL4 cross-connector had the BARs swapped so that the
dataport would be the first mapping (at offset 0), but turned out
patching QEMU to have the offset option is not a big job. This saves us
from pushing an API-breaking change to seL4 source trees.

Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Markku Ahvenjärvi <[email protected]>
Signed-off-by: Markku Ahvenjärvi <[email protected]>
Signed-off-by: Markku Ahvenjärvi <[email protected]>
This change aligns the memory size with VM1 ram_size.

Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Markku Ahvenjärvi <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
@hlyytine hlyytine requested a review from elmankku October 5, 2023 08:41
@hlyytine hlyytine force-pushed the complex branch 3 times, most recently from a851df1 to a4f2d1b Compare October 24, 2023 07:31
@hlyytine hlyytine marked this pull request as ready for review October 25, 2023 06:05
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Check out the comments. I think read and write barriers are must-have

s->ioreq_buffer = mmap(NULL, sizeof(*s->ioreq_buffer),
PROT_READ | PROT_WRITE, MAP_SHARED, s->ioreqfd, 0);
if (!s->ioreq_buffer) {
s->iobuf = mmap(NULL, 2 * 4096, PROT_READ | PROT_WRITE, MAP_SHARED,
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The size could be in the kernel header. Then these will be in sync.

{
PCIDevice *dev = pci_devs[ioreq->addr_space];
PCIDevice *dev = pci_devs[addr_space];
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Would the pci_dev be a more appropriate name? Just thinking


msg->mr0 = BIT_FIELD_SET(msg->mr0, RPC_MR0_STATE, RPC_MR0_STATE_COMPLETE);

/* smp_wmb()? */
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Yes, a write barrier would be appropriate here because it ensures mr0 is flushed before andvance

uint32_t *event_bar = cookie;

/* data does not matter, just the write fault */
event_bar[0] = 1;
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A write barrier (or write release) after this would be good to ensure ordering of writes

goto err;
}
s->event_bar_fd = rc;
s->event_bar = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED,
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The size could be defined in the kernel header

munmap(s->event_bar, 4096);

if (s->iobuf)
munmap(s->iobuf, 2 * 4096);

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Sizes to kernel header

if (rc)
continue;

handle_ioreq(s);
while ((msg = rpcmsg_queue_head(s->rpc.rx_queue)) != NULL) {
seL4_Word state = BIT_FIELD_GET(msg->mr0, RPC_MR0_STATE);
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Load acquire here would (or read barrier before) would be appropriate here

@@ -23,6 +23,8 @@
#include <sys/ioctl.h>
#include <sel4/sel4_virt.h>

#define EVENT_BAR_EMIT_REGISTER 0x0
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I wonder if this should be placed in the kernel header?

elmankku and others added 3 commits November 1, 2023 10:39
Signed-off-by: Hannu Lyytinen <[email protected]>
Signed-off-by: Hannu Lyytinen <[email protected]>
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2 participants