Port on-target-tests to rp235x (#894)

* Make rp2040 dependencies optional in on-target tests
* Make rp2040 import conditional
* Port individual test to rp235x

on-target-tests/.cargo/config.toml

@@ -35,3 +35,26 @@ runner = "elf2uf2-rs -d"
 # This runner will find a supported SWD debug probe and flash your RP2040 over
 # SWD:
 # runner = "probe-rs run --chip RP2040"
+
+# This is the hard-float ABI for Arm mode.
+#
+# The FPU is enabled by default, and float function arguments use FPU
+# registers.
+[target.thumbv8m.main-none-eabihf]
+# Pass some extra options to rustc, some of which get passed on to the linker.
+#
+# * linker argument --nmagic turns off page alignment of sections (which saves
+#   flash space)
+# * linker argument -Tlink.x tells the linker to use link.x as a linker script.
+#   This is usually provided by the cortex-m-rt crate, and by default the
+#   version in that crate will include a file called `memory.x` which describes
+#   the particular memory layout for your specific chip.
+# * linker argument -Tdefmt.x also tells the linker to use `defmt.x` as a
+#   secondary linker script. This is required to make defmt_rtt work.
+rustflags = [
+    "-C", "link-arg=--nmagic",
+    "-C", "link-arg=-Tlink.x",
+    "-C", "link-arg=-Tdefmt.x",
+    "-C", "target-cpu=cortex-m33",
+]
+

on-target-tests/Cargo.toml

@@ -62,8 +62,14 @@ i2c-write-iter = {version = "1.0.0", features = ["async"]}
 itertools = {version = "0.12.0", default-features = false}
 once_cell = { version = "1.19.0", default-features = false, features = ["critical-section"] }
 panic-probe = {version = "0.3", features = ["print-defmt"]}
-rp2040-boot2 = "0.3.0"
-rp2040-hal = {path = "../rp2040-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"]}
+rp2040-boot2 = { version = "0.3.0", optional = true }
+rp2040-hal = {path = "../rp2040-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"], optional = true}
+rp235x-hal = {path = "../rp235x-hal", features = ["critical-section-impl", "defmt", "rt", "i2c-write-iter"], optional = true}
+
+[features]
+
+rp2040 = ["dep:rp2040-boot2", "dep:rp2040-hal"]
+rp235x = ["dep:rp235x-hal"]
 
 [profile.dev]
 codegen-units = 1

on-target-tests/build.rs

@@ -0,0 +1,32 @@
+//! Set up linker scripts for the rp235x-hal examples
+
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+
+fn main() {
+    // Put the linker script somewhere the linker can find it
+    let out = PathBuf::from(std::env::var_os("OUT_DIR").unwrap());
+    println!("cargo:rustc-link-search={}", out.display());
+
+    // The file `memory.x` is loaded by cortex-m-rt's `link.x` script, which
+    // is what we specify in `.cargo/config.toml` for Arm builds
+    #[cfg(feature = "rp2040")]
+    let memory_x = include_bytes!("memory_rp2040.x");
+    #[cfg(feature = "rp235x")]
+    let memory_x = include_bytes!("memory_rp235x.x");
+    let mut f = File::create(out.join("memory.x")).unwrap();
+    f.write_all(memory_x).unwrap();
+    println!("cargo:rerun-if-changed=memory.x");
+
+    /*
+    // The file `rp235x_riscv.x` is what we specify in `.cargo/config.toml` for
+    // RISC-V builds
+    let rp235x_riscv_x = include_bytes!("rp235x_riscv.x");
+    let mut f = File::create(out.join("rp235x_riscv.x")).unwrap();
+    f.write_all(rp235x_riscv_x).unwrap();
+    println!("cargo:rerun-if-changed=rp235x_riscv.x");
+    */
+
+    println!("cargo:rerun-if-changed=build.rs");
+}

on-target-tests/memory_rp235x.x

@@ -0,0 +1,77 @@
+MEMORY {
+    /*
+     * The RP2350 has either external or internal flash.
+     *
+     * 2 MiB is a safe default here, although a Pico 2 has 4 MiB.
+     */
+    FLASH : ORIGIN = 0x10000000, LENGTH = 2048K
+    /*
+     * RAM consists of 8 banks, SRAM0-SRAM7, with a striped mapping.
+     * This is usually good for performance, as it distributes load on
+     * those banks evenly.
+     */
+    RAM : ORIGIN = 0x20000000, LENGTH = 512K
+    /*
+     * RAM banks 8 and 9 use a direct mapping. They can be used to have
+     * memory areas dedicated for some specific job, improving predictability
+     * of access times.
+     * Example: Separate stacks for core0 and core1.
+     */
+    SRAM4 : ORIGIN = 0x20080000, LENGTH = 4K
+    SRAM5 : ORIGIN = 0x20081000, LENGTH = 4K
+}
+
+SECTIONS {
+    /* ### Boot ROM info
+     *
+     * Goes after .vector_table, to keep it in the first 4K of flash
+     * where the Boot ROM (and picotool) can find it
+     */
+    .start_block : ALIGN(4)
+    {
+        __start_block_addr = .;
+        KEEP(*(.start_block));
+        KEEP(*(.boot_info));
+    } > FLASH
+
+} INSERT AFTER .vector_table;
+
+/* move .text to start /after/ the boot info */
+_stext = ADDR(.start_block) + SIZEOF(.start_block);
+
+SECTIONS {
+    /* ### Picotool 'Binary Info' Entries
+     *
+     * Picotool looks through this block (as we have pointers to it in our
+     * header) to find interesting information.
+     */
+    .bi_entries : ALIGN(4)
+    {
+        /* We put this in the header */
+        __bi_entries_start = .;
+        /* Here are the entries */
+        KEEP(*(.bi_entries));
+        /* Keep this block a nice round size */
+        . = ALIGN(4);
+        /* We put this in the header */
+        __bi_entries_end = .;
+    } > FLASH
+} INSERT AFTER .text;
+
+SECTIONS {
+    /* ### Boot ROM extra info
+     *
+     * Goes after everything in our program, so it can contain a signature.
+     */
+    .end_block : ALIGN(4)
+    {
+        __end_block_addr = .;
+        KEEP(*(.end_block));
+    } > FLASH
+
+} INSERT AFTER .uninit;
+
+PROVIDE(start_to_end = __end_block_addr - __start_block_addr);
+PROVIDE(end_to_start = __start_block_addr - __end_block_addr);
+
+

on-target-tests/run_tests.bat

@@ -3,4 +3,4 @@
 
 @SET "CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER=probe-rs run"
 
-cargo test --no-fail-fast -- --chip rp2040
+cargo test --no-fail-fast --features rp2040 -- --chip rp2040

on-target-tests/run_tests.sh

@@ -3,4 +3,4 @@
 # Keep running tests even if one of them fails
 # We need to specify probe-rs as our runner via environment variables here
 # to control build since we aren't able to override them in config.toml
-CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER="probe-rs run" cargo test --no-fail-fast -- --chip rp2040
+CARGO_TARGET_THUMBV6M_NONE_EABI_RUNNER="probe-rs run" cargo test --no-fail-fast --features rp2040 -- --chip rp2040

on-target-tests/run_tests_rp235x.sh

@@ -0,0 +1,6 @@
+#!/bin/sh
+
+# Keep running tests even if one of them fails
+# We need to specify probe-rs as our runner via environment variables here
+# to control build since we aren't able to override them in config.toml
+CARGO_TARGET_THUMBV8M_MAIN_NONE_EABIHF_RUNNER="probe-rs run" cargo test --target thumbv8m.main-none-eabihf --no-fail-fast --features rp235x -- --chip rp235x

on-target-tests/tests/dma_dyn.rs

@@ -6,16 +6,26 @@ use crate::hal::dma::DynChannels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -51,18 +61,22 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
         unsafe {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 

on-target-tests/tests/dma_m2m_u16.rs

@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,18 +57,22 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
         unsafe {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 

on-target-tests/tests/dma_m2m_u32.rs

@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,18 +57,22 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
         unsafe {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);
 

on-target-tests/tests/dma_m2m_u8.rs

@@ -6,16 +6,26 @@ use crate::hal::dma::Channels;
 use defmt_rtt as _; // defmt transport
 use defmt_test as _;
 use panic_probe as _;
+#[cfg(feature = "rp2040")]
 use rp2040_hal as hal; // memory layout // panic handler
+#[cfg(feature = "rp235x")]
+use rp235x_hal as hal;
 
 /// The linker will place this boot block at the start of our program image. We
 /// need this to help the ROM bootloader get our code up and running.
 /// Note: This boot block is not necessary when using a rp-hal based BSP
 /// as the BSPs already perform this step.
+#[cfg(feature = "rp2040")]
 #[link_section = ".boot2"]
 #[used]
 pub static BOOT2: [u8; 256] = rp2040_boot2::BOOT_LOADER_GENERIC_03H;
 
+/// Tell the Boot ROM about our application
+#[cfg(feature = "rp235x")]
+#[link_section = ".start_block"]
+#[used]
+pub static IMAGE_DEF: hal::block::ImageDef = hal::block::ImageDef::secure_exe();
+
 /// External high-speed crystal on the Raspberry Pi Pico board is 12 MHz. Adjust
 /// if your board has a different frequency
 const XTAL_FREQ_HZ: u32 = 12_000_000u32;
@@ -47,18 +57,22 @@ mod tests {
     use defmt::assert_eq;
     use defmt_rtt as _;
     use panic_probe as _;
+    #[cfg(feature = "rp2040")]
     use rp2040_hal as hal;
+    #[cfg(feature = "rp235x")]
+    use rp235x_hal as hal;
 
     use hal::{clocks::init_clocks_and_plls, pac, watchdog::Watchdog};
 
-    use rp2040_hal::dma::DMAExt;
+    use hal::dma::DMAExt;
 
     #[init]
     fn setup() -> State {
         unsafe {
             hal::sio::spinlock_reset();
         }
         let mut pac = pac::Peripherals::take().unwrap();
+        #[cfg(feature = "rp2040")]
         let _core = pac::CorePeripherals::take().unwrap();
         let mut watchdog = Watchdog::new(pac.WATCHDOG);