Skip to content

Commit

Permalink
Show file tree
Hide file tree
Showing 2 changed files with 19 additions and 12 deletions.
19 changes: 19 additions & 0 deletions Sdtrig.tex
Original file line number Diff line number Diff line change
Expand Up @@ -319,6 +319,25 @@ \subsection{Cache Operations}
\end{steps}
\end{commentary}

\subsection{Invalid Virtual Addresses}

For virtual address matches without a mask, \RcsrTdataTwo must be able to hold
all valid virtual addresses but it need not be capable of holding other values.
Implementations may convert an invalid virtual address to a different invalid
virtual address before comparing the address to \RcsrTdataTwo.

\begin{commentary}
A straightforward trigger implementation would compare the effective address
to the contents of \RcsrTdataTwo. This is most intuitive to a user setting
triggers. However, the Privileged Spec makes various accommodations that
allow a shorter representation of invalid virtual addresses, and the Debug
Spec should do the same. If an implementation converts some invalid
addresses to other invalid addresses, then it is impossible to compare
against the original effective address. To simplify the spec and allow for
more implementations, we don't specify which version is compared for an
invalid virtual address.
\end{commentary}

\section{Multiple State Change Instructions} \label{sec:multistate}

An instruction that performs multiple architectural state changes (e.g.,
Expand Down
12 changes: 0 additions & 12 deletions xml/hwbp_registers.xml
Original file line number Diff line number Diff line change
Expand Up @@ -310,12 +310,6 @@
Table~\ref{tab:hwbp_timing}, both timings should be supported on load
address triggers.

This trigger type may be limited to address comparisons (\FcsrMcontrolSelect is
always 0) only. If that is the case and masking is not supported (match
values 4, 5, 12, 13), then \RcsrTdataTwo must be able to
hold all valid virtual addresses but it need not be capable of holding
other values.

The Privileged Spec says that breakpoint exceptions that occur on
instruction fetches, loads, or stores update the {\tt tval} CSR
with either zero or the faulting virtual address. The faulting
Expand Down Expand Up @@ -667,12 +661,6 @@
A chain of triggers must only fire if every trigger in the chain was
matched by the same instruction.

This trigger type may be limited to address comparisons (\FcsrMcontrolSixSelect is
always 0) only. If that is the case and masking is not supported (match
values 4, 5, 12, 13), then \RcsrTdataTwo must be able to
hold all valid virtual addresses but it need not be capable of holding
other values.

The Privileged Spec says that breakpoint exceptions that occur on
instruction fetches, loads, or stores update the {\tt tval} CSR
with either zero or the faulting virtual address. The faulting
Expand Down

0 comments on commit d497ba9

Please sign in to comment.