Fixing broken links to registers.

Fixing the links to registers as defined in the -def files.
riscv · Jan 8, 2024 · 302f880 · 302f880
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commit 302f880
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diff --git a/Sdext.adoc b/Sdext.adoc
@@ -163,7 +163,7 @@ support M-Mode can use {csr-icount} as well, but count must be able to count sev
 === Reset
 
 If the halt signal (driven by the hart's halt request bit in the Debug
-Module) or <<resethaltreq>> are asserted when a hart comes out of reset, the hart must
+Module) or {dmstatus-hasresethaltreq} are asserted when a hart comes out of reset, the hart must
 enter Debug Mode before executing any instructions, but after performing
 any initialization that would usually happen before the first
 instruction is executed.