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clarify CSRs which are only added if hybrid mode is implemented #503

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Jan 10, 2025
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clarify CSRs which are only added if hybrid mode is implemented #503

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1 change: 1 addition & 0 deletions src/attributes.adoc
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Expand Up @@ -69,6 +69,7 @@ endif::[]

:TAG_RESET_CSR: The tag of the CSR must be reset to zero. The reset values of the metadata and address fields are UNSPECIFIED.
:REQUIRE_CRE_CSR: Access to this CSR is illegal if <<section_cheri_disable,CHERI register and instruction access is disabled>> for the current privilege.
:REQUIRE_HYBRID_CSR: This CSR is only implemented if {cheri_default_ext_name} is implemented.

:CAP_MODE_VALUE: 0
:INT_MODE_VALUE: 1
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2 changes: 2 additions & 0 deletions src/hypervisor-integration.adoc
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Expand Up @@ -157,6 +157,8 @@ present when the implementation supports {cheri_default_ext_name}.

{REQUIRE_CRE_CSR}

{REQUIRE_HYBRID_CSR}

.Virtual supervisor trap default capability register
include::img/vstdcreg.edn[]

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8 changes: 8 additions & 0 deletions src/riscv-hybrid-integration.adoc
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Expand Up @@ -298,6 +298,8 @@ xref:default-csrnames-added[xrefstyle=short].

{TAG_RESET_CSR}

{REQUIRE_HYBRID_CSR}

.Debug default data capability
include::img/dddcreg.edn[]

Expand Down Expand Up @@ -430,6 +432,8 @@ machine-mode hart-local context space, to load into <<ddc>>.

{REQUIRE_CRE_CSR}

{REQUIRE_HYBRID_CSR}
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.Machine-mode trap data capability register
include::img/mtdcreg.edn[]

Expand Down Expand Up @@ -481,6 +485,8 @@ a supervisor-mode hart-local context space, to load into <<ddc>>.

{REQUIRE_CRE_CSR}

{REQUIRE_HYBRID_CSR}

.Supervisor trap data capability register (*stdc*)
include::img/stdcreg.edn[]

Expand Down Expand Up @@ -516,6 +522,8 @@ is the <<infinite-cap>> capability.

NOTE: CRE is not required for the implicit access required by checking memory accesses against <<ddc>>

{REQUIRE_HYBRID_CSR}

As shown in xref:CSR_exevectors[xrefstyle=short], <<ddc>> is a data pointer,
so it does not need to be able to hold all possible invalid addresses.

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