Update kernel 5

kernel/src/syscall/invocation/decode/arch/aarch64.rs

@@ -140,17 +140,17 @@ fn decode_page_table_invocation(
     let pd_slot = PTE(vspace_root).lookup_pt_slot(vaddr);
 
     if unlikely(
-        pd_slot.ptBitsLeft != seL4_PageBits
+        pd_slot.ptBitsLeft == seL4_PageBits
             || ptr_to_ref(pd_slot.ptSlot).get_type() != (pte_tag_t::pte_invalid) as usize,
     ) {
         global_ops!(current_syscall_error._type = seL4_DeleteFirst);
         return exception_t::EXCEPTION_SYSCALL_ERROR;
     }
-
     let pte = PTE::pte_new_table(pptr_to_paddr(cte.cap.get_pt_base_ptr()));
     cte.cap.set_pt_is_mapped(1);
     cte.cap.set_pt_mapped_asid(asid);
-    cte.cap.set_pt_mapped_address(vaddr);
+    cte.cap
+        .set_pt_mapped_address(vaddr & !(MASK!(pd_slot.ptBitsLeft)));
     get_currenct_thread().set_state(ThreadState::ThreadStateRestart);
 
     *ptr_to_mut(pd_slot.ptSlot) = pte;
@@ -480,9 +480,9 @@ fn decode_frame_map(length: usize, frame_slot: &mut cte_t, buffer: &seL4_IPCBuff
     frame_slot.cap.set_frame_mapped_asid(asid);
     frame_slot.cap.set_frame_mapped_address(vaddr);
 
-    let mut vspace_root = PTE::new_from_pte(vspace_root);
+    let mut vspace_root_pte = PTE::new_from_pte(vspace_root);
     let base = pptr_to_paddr(frame_slot.cap.get_frame_base_ptr());
-    let lu_ret = vspace_root.lookup_pt_slot(vaddr);
+    let lu_ret = vspace_root_pte.lookup_pt_slot(vaddr);
     if unlikely(lu_ret.ptBitsLeft != pageBitsForSize(frame_size)) {
         unsafe {
             current_lookup_fault = lookup_fault_t::new_missing_cap(lu_ret.ptBitsLeft);
@@ -491,13 +491,14 @@ fn decode_frame_map(length: usize, frame_slot: &mut cte_t, buffer: &seL4_IPCBuff
             return exception_t::EXCEPTION_SYSCALL_ERROR;
         }
     }
+    let pt_slot = convert_to_mut_type_ref::<PTE>(lu_ret.ptSlot as usize);
     set_thread_state(get_currenct_thread(), ThreadState::ThreadStateRestart);
     return invoke_page_map(
         asid,
-        frame_slot.cap,
+        frame_slot.cap.clone(),
         frame_slot,
         PTE::make_user_pte(base, vm_rights, attr, frame_size),
-        ptr_to_mut(lu_ret.ptSlot),
+        pt_slot,
     );
     // match frame_size {
     //     ARM_Small_Page => {

kernel/src/syscall/invocation/invoke_mmu_op.rs

@@ -4,6 +4,8 @@ use sel4_common::arch::ArchReg;
 #[cfg(target_arch = "aarch64")]
 use sel4_common::BIT;
 
+#[cfg(target_arch = "aarch64")]
+use sel4_common::utils::convert_ref_type_to_usize;
 #[cfg(target_arch = "riscv64")]
 use sel4_common::{
     arch::maskVMRights,
@@ -12,13 +14,9 @@ use sel4_common::{
     MASK,
 };
 use sel4_common::{
-    message_info::seL4_MessageInfo_t,
-    sel4_config::*,
-    structures::exception_t,
+    message_info::seL4_MessageInfo_t, sel4_config::*, structures::exception_t,
     utils::convert_to_mut_type_ref,
 };
-#[cfg(target_arch = "aarch64")]
-use sel4_common::utils::convert_ref_type_to_usize;
 #[cfg(target_arch = "riscv64")]
 use sel4_cspace::interface::cte_insert;
 use sel4_cspace::interface::{cap_t, cte_t};
@@ -151,10 +149,10 @@ pub fn invoke_page_map(
     pt_slot: &mut PTE,
 ) -> exception_t {
     let tlbflush_required: bool = pt_slot.get_type() != (pte_tag_t::pte_invalid) as usize;
-    frame_slot.cap = cap;
+    // frame_slot.cap = cap;
     pt_slot.update(pte);
 
-    clean_by_va_pou(
+	clean_by_va_pou(
         convert_ref_type_to_usize(pt_slot),
         pptr_to_paddr(convert_ref_type_to_usize(pt_slot)),
     );

sel4_common/src/arch/aarch64/message_info.rs

@@ -38,10 +38,7 @@ pub enum MessageLabel {
     ARMVSpaceInvalidate_Data,
     ARMVSpaceCleanInvalidate_Data,
     ARMVSpaceUnify_Instruction,
-    ARMPageUpperDirectoryMap,
-    ARMPageUpperDirectoryUnmap,
-    ARMPageDirectoryMap,
-    ARMPageDirectoryUnmap,
+    ARMSMCCall,
     ARMPageTableMap,
     ARMPageTableUnmap,
     ARMPageMap,

sel4_cspace/src/arch/aarch64/mod.rs

@@ -105,7 +105,7 @@ plus_define_bitfield! {
         //     capPGDIsMapped, get_pgd_is_mapped, set_pgd_is_mapped, 0, 58, 1, 0, false
         // },
         new_vspace_cap, CapTag::CapVspaceCap as usize => {
-            capVSMappedASID, get_vs_mapped_asid, set_vs_mapped_asid, 0, 48, 16, 0, false,
+            capVSMappedASID, get_vs_mapped_asid, set_vs_mapped_asid, 1, 48, 16, 0, false,
             capVSBasePtr, get_vs_base_ptr, set_vs_base_ptr, 1, 0, 48, 0, true,
             capVSIsMapped, get_vs_is_mapped, set_vs_is_mapped, 0, 58, 1, 0, false
         },

sel4_vspace/src/arch/aarch64/interface.rs

@@ -4,10 +4,7 @@ use core::ops::{Deref, DerefMut};
 use super::pte::pte_tag_t;
 use super::{kpptr_to_paddr, machine::*, UPT_LEVELS};
 use crate::arch::VAddr;
-use crate::{
-    asid_t, find_vspace_for_asid, paddr_to_pptr, pptr_t, pptr_to_paddr,
-    vptr_t, PTE,
-};
+use crate::{asid_t, find_vspace_for_asid, paddr_to_pptr, pptr_t, pptr_to_paddr, vptr_t, PTE};
 use sel4_common::arch::MessageLabel;
 use sel4_common::structures::exception_t;
 use sel4_common::utils::{pageBitsForSize, ptr_to_mut};

sel4_vspace/src/arch/aarch64/pte.rs

@@ -4,13 +4,13 @@ use super::utils::paddr_to_pptr;
 use super::{seL4_VSpaceIndexBits, UPT_LEVELS};
 use crate::{lookupPTSlot_ret_t, vptr_t};
 use sel4_common::utils::ptr_to_mut;
-use sel4_common::MASK;
 use sel4_common::{
     arch::vm_rights_t,
     sel4_config::{seL4_PageBits, seL4_PageTableBits, PT_INDEX_BITS},
     utils::{convert_ref_type_to_usize, convert_to_mut_type_ref},
     BIT,
 };
+use sel4_common::MASK;
 
 #[allow(unused)]
 pub enum VMPageSize {
@@ -194,11 +194,30 @@ impl PTE {
         if nonexecutable {
             flags |= PTEFlags::UXN;
         }
+        let nG: usize = 1;
         flags |= Self::ap_from_vm_rights_t(rights);
+		// let vm_right:usize = Self::ap_from_vm_rights_t(rights) as usize;
+		// TODO:change the apfromvmright and attridx
         if VMPageSize::ARMSmallPage as usize == page_size {
-            PTE::new_4k_page(paddr, flags)
+            PTE::pte_new_4k_page(
+                nonexecutable as usize,
+                paddr,
+                nG,
+                1,
+                0,
+                1,
+                0b100,
+            )
         } else {
-            PTE::new(paddr, flags)
+            PTE::pte_new_page(
+                nonexecutable as usize,
+                paddr,
+                nG,
+                1,
+                0,
+                1,
+                0b100,
+            )
         }
     }
 
@@ -224,12 +243,12 @@ impl PTE {
             | (SH & 0x3) << 8
             | (AP & 0x3) << 6
             | (AttrIndx & 0x7) << 2
-			| (0x1 << 0);
+            | (0x1 << 0);
 
         PTE(val)
     }
 
-	pub fn pte_new_4k_page(
+    pub fn pte_new_4k_page(
         UXN: usize,
         page_base_address: usize,
         nG: usize,
@@ -246,27 +265,28 @@ impl PTE {
             | (SH & 0x3) << 8
             | (AP & 0x3) << 6
             | (AttrIndx & 0x7) << 2
-			| 0x400000000000003;
+            | 0x400000000000003;
         PTE(val)
     }
     ///用于记录某个虚拟地址`vptr`对应的pte表项在内存中的位置
     pub fn lookup_pt_slot(&mut self, vptr: vptr_t) -> lookupPTSlot_ret_t {
-        let mut pt = self as *mut PTE;
+        let mut pt = self.0 as *mut PTE;
         let mut level: usize = UPT_LEVELS - 1;
         let ptBitsLeft = PT_INDEX_BITS * level + seL4_PageBits;
-        let mut ret = lookupPTSlot_ret_t {
-            ptSlot: unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) },
+		pt = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) };
+        let mut ret: lookupPTSlot_ret_t = lookupPTSlot_ret_t {
+            ptSlot: pt,
             ptBitsLeft: ptBitsLeft,
         };
-
+        
         while ptr_to_mut(ret.ptSlot).get_type() == (pte_tag_t::pte_table) as usize && level > 0 {
             level = level - 1;
             ret.ptBitsLeft = ret.ptBitsLeft - PT_INDEX_BITS;
             let paddr = ptr_to_mut(ret.ptSlot).next_level_paddr();
             pt = paddr_to_pptr(paddr) as *mut PTE;
-            ret.ptSlot = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
+			pt = unsafe { pt.add((vptr >> ret.ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
+            ret.ptSlot = pt;
         }
-
         ret
     }
 }

sel4_vspace/src/arch/aarch64/structures.rs

@@ -2,8 +2,7 @@ use core::ops::{Deref, DerefMut};
 
 use crate::{vm_attributes_t, PTE};
 use sel4_common::{
-    plus_define_bitfield, sel4_config::asidLowBits,
-    utils::convert_to_mut_type_ref, BIT,
+    plus_define_bitfield, sel4_config::asidLowBits, utils::convert_to_mut_type_ref, BIT,
 };
 
 use super::machine::mair_types;