Update kernel 6 (#15)

* fix make user pte todo

* fix the unmap assert

* fix the bug of the unmap page

* fix another bug

* seems fix bug

kernel/src/syscall/invocation/decode/arch/aarch64.rs

@@ -141,7 +141,7 @@ fn decode_page_table_invocation(
 
     if unlikely(
         pd_slot.ptBitsLeft == seL4_PageBits
-            || ptr_to_ref(pd_slot.ptSlot).get_type() != (pte_tag_t::pte_invalid) as usize,
+            || (ptr_to_ref(pd_slot.ptSlot).get_type() != (pte_tag_t::pte_invalid) as usize),
     ) {
         global_ops!(current_syscall_error._type = seL4_DeleteFirst);
         return exception_t::EXCEPTION_SYSCALL_ERROR;
@@ -476,10 +476,6 @@ fn decode_frame_map(length: usize, frame_slot: &mut cte_t, buffer: &seL4_IPCBuff
             return exception_t::EXCEPTION_SYSCALL_ERROR;
         }
     }
-    // TODO: copy cap in the here. Not write slot when the address is not need to write.
-    frame_slot.cap.set_frame_mapped_asid(asid);
-    frame_slot.cap.set_frame_mapped_address(vaddr);
-
     let mut vspace_root_pte = PTE::new_from_pte(vspace_root);
     let base = pptr_to_paddr(frame_slot.cap.get_frame_base_ptr());
     let lu_ret = vspace_root_pte.lookup_pt_slot(vaddr);
@@ -493,6 +489,8 @@ fn decode_frame_map(length: usize, frame_slot: &mut cte_t, buffer: &seL4_IPCBuff
     }
     let pt_slot = convert_to_mut_type_ref::<PTE>(lu_ret.ptSlot as usize);
     set_thread_state(get_currenct_thread(), ThreadState::ThreadStateRestart);
+	frame_slot.cap.set_frame_mapped_asid(asid);
+    frame_slot.cap.set_frame_mapped_address(vaddr);
     return invoke_page_map(
         asid,
         frame_slot.cap.clone(),
@@ -683,7 +681,7 @@ fn decode_frame_map(length: usize, frame_slot: &mut cte_t, buffer: &seL4_IPCBuff
 #[allow(unused)]
 fn decode_page_table_unmap(pt_cte: &mut cte_t) -> exception_t {
     if !pt_cte.is_final_cap() {
-        debug!("RISCVPageTableUnmap: cannot unmap if more than once cap exists");
+        debug!("PageTableUnmap: cannot unmap if more than once cap exists");
         global_ops!(current_syscall_error._type = seL4_RevokeFirst);
         return exception_t::EXCEPTION_SYSCALL_ERROR;
     }

kernel/src/syscall/invocation/invoke_mmu_op.rs

@@ -111,7 +111,7 @@ pub fn invoke_page_unmap(frame_slot: &mut cte_t) -> exception_t {
         }
     }
     frame_slot.cap.set_frame_mapped_address(0);
-    frame_slot.cap.set_pt_mapped_asid(asidInvalid);
+    frame_slot.cap.set_frame_mapped_asid(asidInvalid);
     exception_t::EXCEPTION_NONE
 }
 
@@ -152,7 +152,7 @@ pub fn invoke_page_map(
     // frame_slot.cap = cap;
     pt_slot.update(pte);
 
-	clean_by_va_pou(
+    clean_by_va_pou(
         convert_ref_type_to_usize(pt_slot),
         pptr_to_paddr(convert_ref_type_to_usize(pt_slot)),
     );

sel4_cspace/src/arch/aarch64/mod.rs

@@ -85,7 +85,7 @@ plus_define_bitfield! {
             capPTMappedASID, get_pt_mapped_asid, set_pt_mapped_asid, 1, 48, 16, 0, false,
             capPTBasePtr, get_pt_base_ptr, set_pt_base_ptr, 1, 0, 48, 0, true,
             capPTIsMapped, get_pt_is_mapped, set_pt_is_mapped, 0, 48, 1, 0, false,
-            capPTMappedAddress, get_pt_mapped_address, set_pt_mapped_address, 0, 20, 28, 0, true
+            capPTMappedAddress, get_pt_mapped_address, set_pt_mapped_address, 0, 20, 28, 20, true
         },
         // new_page_directory_cap, CapTag::CapPageDirectoryCap as usize => {
         //     capPDMappedASID, get_pd_mapped_asid, set_pd_mapped_asid, 1, 48, 16, 0, false,

sel4_vspace/src/arch/aarch64/interface.rs

@@ -310,20 +310,20 @@ pub fn unmap_page_table(asid: asid_t, vaddr: vptr_t, pt: &PTE) {
     let mut pte = find_ret.vspace_root.unwrap();
     let mut level: usize = 0;
     while level < UPT_LEVELS - 1 && pte as usize != pt as *const PTE as usize {
-        level = level + 1;
         ptSlot = unsafe { pte.add(VAddr(vaddr).GET_UPT_INDEX(level)) };
         if ptr_to_mut(ptSlot).get_type() != (pte_tag_t::pte_table) as usize {
             return;
         }
         pte = paddr_to_pptr(ptr_to_mut(ptSlot).next_level_paddr()) as *mut PTE;
+        level = level + 1;
     }
     if pte as usize != pt as *const PTE as usize {
         return;
     }
-    assert!(ptSlot.is_null());
+    assert!(!ptSlot.is_null());
     unsafe {
         *(ptSlot) = PTE(0);
-        ptr_to_mut(pte).update(*(ptSlot));
+        ptr_to_mut(ptSlot).update(*(pte));
     }
     invalidate_tlb_by_asid(asid);
 }
@@ -347,8 +347,8 @@ pub fn unmapPage(
     }
 
     let pte = ptr_to_mut(lu_ret.ptSlot);
-    if pte.get_type() == (pte_tag_t::pte_4k_page) as usize
-        || pte.get_type() == (pte_tag_t::pte_page) as usize
+    if !(pte.get_type() == (pte_tag_t::pte_4k_page) as usize
+        || pte.get_type() == (pte_tag_t::pte_page) as usize)
     {
         return Ok(());
     }
@@ -359,6 +359,7 @@ pub fn unmapPage(
         *(lu_ret.ptSlot) = PTE(0);
         pte.update(*(lu_ret.ptSlot));
     }
+    assert!(asid < BIT!(16));
     invalidate_tlb_by_asid(asid);
     Ok(())
 

sel4_vspace/src/arch/aarch64/pte.rs

@@ -1,16 +1,16 @@
 use crate::{arch::aarch64::machine::clean_by_va_pou, vm_attributes_t, PTE};
 
 use super::utils::paddr_to_pptr;
-use super::{seL4_VSpaceIndexBits, UPT_LEVELS};
+use super::{mair_types, seL4_VSpaceIndexBits, UPT_LEVELS};
 use crate::{lookupPTSlot_ret_t, vptr_t};
 use sel4_common::utils::ptr_to_mut;
+use sel4_common::MASK;
 use sel4_common::{
     arch::vm_rights_t,
     sel4_config::{seL4_PageBits, seL4_PageTableBits, PT_INDEX_BITS},
     utils::{convert_ref_type_to_usize, convert_to_mut_type_ref},
     BIT,
 };
-use sel4_common::MASK;
 
 #[allow(unused)]
 pub enum VMPageSize {
@@ -118,9 +118,9 @@ impl PTE {
     pub fn pte_next_table(addr: usize, _: bool) -> Self {
         Self::new(addr, PTEFlags::VALID | PTEFlags::NON_BLOCK)
     }
-    fn new_4k_page(addr: usize, flags: PTEFlags) -> Self {
-        Self((addr & 0xfffffffff000) | flags.bits() | 0x400000000000003)
-    }
+    // fn new_4k_page(addr: usize, flags: PTEFlags) -> Self {
+    //     Self((addr & 0xfffffffff000) | flags.bits() | 0x400000000000003)
+    // }
 
     pub fn get_page_base_address(&self) -> usize {
         self.0 & 0xfffffffff000
@@ -187,37 +187,16 @@ impl PTE {
     ) -> Self {
         let nonexecutable = attr.get_armExecuteNever();
         let cacheable = attr.get_armPageCacheable();
-        let mut flags = PTEFlags::NG;
+        let mut attrindx = mair_types::DEVICE_nGnRnE as usize;
         if cacheable {
-            flags |= PTEFlags::NORMAL;
-        }
-        if nonexecutable {
-            flags |= PTEFlags::UXN;
+            attrindx = mair_types::NORMAL as usize;
         }
         let nG: usize = 1;
-        flags |= Self::ap_from_vm_rights_t(rights);
-		// let vm_right:usize = Self::ap_from_vm_rights_t(rights) as usize;
-		// TODO:change the apfromvmright and attridx
+        let vm_right: usize = Self::ap_from_vm_rights_t(rights).bits() >> 6;
         if VMPageSize::ARMSmallPage as usize == page_size {
-            PTE::pte_new_4k_page(
-                nonexecutable as usize,
-                paddr,
-                nG,
-                1,
-                0,
-                1,
-                0b100,
-            )
+            PTE::pte_new_4k_page(nonexecutable as usize, paddr, nG, 1, 0, vm_right, attrindx)
         } else {
-            PTE::pte_new_page(
-                nonexecutable as usize,
-                paddr,
-                nG,
-                1,
-                0,
-                1,
-                0b100,
-            )
+            PTE::pte_new_page(nonexecutable as usize, paddr, nG, 1, 0, vm_right, attrindx)
         }
     }
 
@@ -273,18 +252,18 @@ impl PTE {
         let mut pt = self.0 as *mut PTE;
         let mut level: usize = UPT_LEVELS - 1;
         let ptBitsLeft = PT_INDEX_BITS * level + seL4_PageBits;
-		pt = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) };
+        pt = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) };
         let mut ret: lookupPTSlot_ret_t = lookupPTSlot_ret_t {
             ptSlot: pt,
             ptBitsLeft: ptBitsLeft,
         };
-        
+
         while ptr_to_mut(ret.ptSlot).get_type() == (pte_tag_t::pte_table) as usize && level > 0 {
             level = level - 1;
             ret.ptBitsLeft = ret.ptBitsLeft - PT_INDEX_BITS;
             let paddr = ptr_to_mut(ret.ptSlot).next_level_paddr();
             pt = paddr_to_pptr(paddr) as *mut PTE;
-			pt = unsafe { pt.add((vptr >> ret.ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
+            pt = unsafe { pt.add((vptr >> ret.ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
             ret.ptSlot = pt;
         }
         ret