Update kernel 10 (#17)

* almost done all the data structure changes and sync (#11)

* update the sel4_cspace/src/arch/aarch64/mod.rs with some definations

* add some funcitons

* update the objecttype definations

* clean the pgde/pude/pde structures definetions

* change the definetions of lookup and update 4 todos

* Update kernel 3 (#12)

* update the sel4_cspace/src/arch/aarch64/mod.rs with some definations

* add some funcitons

* update the objecttype definations

* clean the pgde/pude/pde structures definetions

* change the definetions of lookup and update 4 todos

* try to fix some functions

* fix some errors with more errors generated

* clean some unused functions

* update and pass the complier, but still have unimplement

* Update kernel 4 (#13)

* fill in the unimplement code

* clean the warnings

* add the 4k page

* FIX:the page entry problem of map kernel window

* Update kernel 5 (#14)

* fix the word the vs used

* fix the page bug, and let the root task work

* Update kernel 6 (#15)

* fix make user pte todo

* fix the unmap assert

* fix the bug of the unmap page

* fix another bug

* seems fix bug

* add the pbf parser codes

* try to let the parsered rs file pass complier

* add the ci rustfmt componant

* change the cap tag

* change the lookup fault part

* sort the dir

* fix the sign extend bug

* finish change the sel4_cspace

* finish change the sel4_vspace

* finish change the sel4_task

* finish change sel4_ipc

* change a part of the kernel

* finish change code but need fix bugs

* find the parameter order problem of frame cap new

* check the parameter order of other caps

* fix a bug

* try to change a lot use reference

* fix the core::mem:transmute copy semantic problem

* fix some bugs

* delete the copy trait of capability, and change some reference for more rusty

* update fmt

* fix the cap reply cap parameter order and add the riscv version

* update some of the cap_asid_pool_cap and fmt

* clean the cap_trans part

.cargo/config.toml

@@ -7,7 +7,7 @@
 [build]
 # target = "riscv64imac-unknown-none-elf"
 # target = "riscv64imac-sel4"
- target = "aarch64-unknown-none-softfloat"
+target = "aarch64-unknown-none-softfloat"
 
 [unstable]
 unstable-options = true

.github/workflows/test.yaml

@@ -60,7 +60,7 @@ jobs:
       - uses: actions-rust-lang/setup-rust-toolchain@v1
         with:
           toolchain: nightly-2024-02-01
-          components: rust-src
+          components: rust-src rustfmt
           rustflags:
           target: riscv64imac-unknown-none-elf aarch64-unknown-none-softfloat
       - name: Install qemu

kernel/src/arch/aarch64/exception.rs

@@ -19,8 +19,8 @@ use sel4_common::fault::seL4_Fault_t;
 use sel4_common::print;
 use sel4_common::sel4_config::seL4_MsgMaxLength;
 use sel4_common::structures::exception_t;
+use sel4_common::structures_gen::cap_tag;
 use sel4_common::utils::global_read;
-use sel4_cspace::arch::CapTag;
 use sel4_task::{activateThread, get_currenct_thread, get_current_domain, schedule};
 
 use super::instruction::*;
@@ -51,17 +51,17 @@ pub fn handleUnknownSyscall(w: isize) -> exception_t {
         // println!("debug cap identify");
         let cptr = thread.tcbArch.get_register(Cap);
         let lu_ret = lookupCapAndSlot(thread, cptr);
-        let cap_type = lu_ret.cap.get_cap_type();
+        let cap_type = lu_ret.capability.get_tag();
         thread.tcbArch.set_register(Cap, cap_type as usize);
         return exception_t::EXCEPTION_NONE;
     }
     if w == SysDebugNameThread {
         // println!("debug name thread");
         let cptr = thread.tcbArch.get_register(Cap);
         let lu_ret = lookupCapAndSlot(thread, cptr);
-        let cap_type = lu_ret.cap.get_cap_type();
+        let cap_type = lu_ret.capability.get_tag();
 
-        if cap_type != CapTag::CapThreadCap {
+        if cap_type != cap_tag::cap_thread_cap {
             debug!("SysDebugNameThread: cap is not a TCB, halting");
             halt();
         }

kernel/src/arch/aarch64/pg.rs

@@ -3,7 +3,9 @@ use sel4_common::arch::MessageLabel;
 use sel4_common::sel4_config::tcbVTable;
 use sel4_common::structures::exception_t;
 use sel4_common::structures::seL4_IPCBuffer;
-use sel4_cspace::interface::{cap_t, cte_t};
+use sel4_common::structures_gen::cap;
+use sel4_cspace::capability::cap_arch_func;
+use sel4_cspace::interface::cte_t;
 use sel4_task::get_currenct_thread;
 use sel4_vspace::asid_t;
 use sel4_vspace::setCurrentUserVSpaceRoot;
@@ -56,7 +58,7 @@ extern "C" fn decodeARMMMUInvocation(
     length: usize,
     _cptr: usize,
     cte: &mut cte_t,
-    _cap: cap_t,
+    _cap: cap,
     call: bool,
     buffer: &seL4_IPCBuffer,
 ) -> exception_t {
@@ -65,9 +67,11 @@ extern "C" fn decodeARMMMUInvocation(
 
 /// Set VMRoot and flush if necessary
 pub fn set_vm_root_for_flush(vspace: usize, asid: asid_t) -> bool {
-    let thread_root = get_currenct_thread().get_cspace(tcbVTable).cap;
+    let thread_root = &get_currenct_thread().get_cspace(tcbVTable).capability;
 
-    if thread_root.is_valid_native_root() && thread_root.get_vs_base_ptr() == vspace as usize {
+    if thread_root.is_valid_native_root()
+        && cap::cap_vspace_cap(&thread_root).get_capVSBasePtr() == vspace as u64
+    {
         return false;
     }
 

kernel/src/arch/riscv/exception.rs

@@ -16,7 +16,7 @@ use sel4_common::fault::seL4_Fault_t;
 use sel4_common::print;
 use sel4_common::sel4_config::seL4_MsgMaxLength;
 use sel4_common::structures::exception_t;
-use sel4_cspace::arch::CapTag;
+use sel4_common::structures_gen::cap_tag;
 use sel4_task::{activateThread, get_currenct_thread, schedule};
 
 #[no_mangle]
@@ -44,16 +44,16 @@ pub fn handleUnknownSyscall(w: isize) -> exception_t {
     if w == SysDebugCapIdentify {
         let cptr = thread.tcbArch.get_register(Cap);
         let lu_ret = lookupCapAndSlot(thread, cptr);
-        let cap_type = lu_ret.cap.get_cap_type();
+        let cap_type = lu_ret.capability.get_tag();
         thread.tcbArch.set_register(Cap, cap_type as usize);
         return exception_t::EXCEPTION_NONE;
     }
     if w == SysDebugNameThread {
         let cptr = thread.tcbArch.get_register(Cap);
         let lu_ret = lookupCapAndSlot(thread, cptr);
-        let cap_type = lu_ret.cap.get_cap_type();
+        let cap_type = lu_ret.capability.get_tag();
 
-        if cap_type != CapTag::CapThreadCap {
+        if cap_type != cap_tag::cap_thread_cap {
             debug!("SysDebugNameThread: cap is not a TCB, halting");
             halt();
         }