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more OR instructions, conflicting ones ignored
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rahulchaphalkar committed Nov 26, 2024
1 parent 2298807 commit 0b7ebd4
Showing 1 changed file with 17 additions and 0 deletions.
17 changes: 17 additions & 0 deletions cranelift/assembler/meta/src/instructions/or.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,5 +7,22 @@ pub fn list() -> Vec<Inst> {
inst("orl", fmt("I", [rw(eax), r(imm32)]), rex(0x0D).id(), None),
inst("orq", fmt("I_SX", [rw(rax), sx(imm32)]), rex(0x0D).w().id(), None),
inst("orb", fmt("MI", [rw(rm8), r(imm8)]), rex(0x80).digit(1).ib(), None),
//
inst("orw", fmt("MI", [rw(rm16), r(imm16)]), rex(0x81).prefix(_66).digit(1).iw(), None),
inst("orl", fmt("MI", [rw(rm32), r(imm32)]), rex(0x81).digit(1).id(), None),
inst("orq", fmt("MI_SX", [rw(rm64), sx(imm32)]), rex(0x81).w().digit(1).id(), None),
//
//
inst("orq", fmt("MI_SX", [rw(rm64), sx(imm8)]), rex(0x83).w().digit(1).ib(), None),
inst("orb", fmt("MR", [rw(rm8), r(r8)]), rex(0x08).r(), None),
// inst("orb", fmt("MR", [rw(rm8), r(r8)]), rex(0x08).w().r(), None),
inst("orw", fmt("MR", [rw(rm16), r(r16)]), rex(0x09).prefix(_66).r(), None),
inst("orl", fmt("MR", [rw(rm32), r(r32)]), rex(0x09).r(), None),
inst("orq", fmt("MR", [rw(rm64), r(r64)]), rex(0x09).w().r(), None),
inst("orb", fmt("RM", [rw(r8), r(rm8)]), rex(0x0A).r(), None),
//inst("orb", fmt("RM", [rw(r8), r(rm8)]), rex(0x0A).w().r(), None),
inst("orw", fmt("RM", [rw(r16), r(rm16)]), rex(0x0B).prefix(_66).r(), None),
inst("orl", fmt("RM", [rw(r32), r(rm32)]), rex(0x0B).r(), None),
inst("orq", fmt("RM", [rw(r64), r(rm64)]), rex(0x0B).w().r(), None),
]
}

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