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ci: switch most module-level #![allow()] annotations to #![expect()]
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Qix- committed Sep 11, 2024
1 parent 50e7540 commit 741cc16
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Showing 33 changed files with 31 additions and 41 deletions.
2 changes: 1 addition & 1 deletion oro-acpi/src/madt.rs
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@@ -1,5 +1,5 @@
//! Extension methods for the MADT table.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

use crate::sys;
use core::mem::ManuallyDrop;
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2 changes: 1 addition & 1 deletion oro-acpica-sys/src/lib.rs
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Expand Up @@ -3,7 +3,7 @@
//! > **NOTE:** This crate does not export any C functionality;
//! > it is purely for data structures and constants.
#![cfg_attr(not(test), no_std)]
#![allow(
#![expect(
non_upper_case_globals,
non_camel_case_types,
non_snake_case,
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2 changes: 1 addition & 1 deletion oro-arch-aarch64/build.rs
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@@ -1,4 +1,4 @@
#![allow(missing_docs, clippy::missing_docs_in_private_items)]
#![expect(missing_docs, clippy::missing_docs_in_private_items)]

fn main() {
println!("cargo:rustc-link-arg-bin=oro-kernel-aarch64=-T");
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2 changes: 1 addition & 1 deletion oro-arch-aarch64/src/asm.rs
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@@ -1,5 +1,5 @@
//! One-off assembly instructions or operations for AArch64.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

use core::arch::asm;

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2 changes: 1 addition & 1 deletion oro-arch-aarch64/src/lib.rs
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Expand Up @@ -23,7 +23,7 @@
//! allocation or mapping.
#![no_std]
#![cfg(not(all(doc, not(target_arch = "aarch64"))))]
#![allow(internal_features)]
#![expect(internal_features)]
#![feature(core_intrinsics)]
// SAFETY(qix-): It's probably accepted, and I want to refactor the
// SAFETY(qix-): page table implementaiton anyway at some point so
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2 changes: 1 addition & 1 deletion oro-arch-aarch64/src/mair.rs
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@@ -1,5 +1,5 @@
//! Defines the Oro-specific MAIR entries for the Aarch64 architecture.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

use crate::reg::mair::{MairCacheability, MairDeviceAttribute, MairRegister};
use oro_macro::EnumIterator;
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6 changes: 1 addition & 5 deletions oro-arch-aarch64/src/mem/paging.rs
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Expand Up @@ -48,11 +48,7 @@
// NOTE(qix-): In the event const traits ever get fixed and stabilized, feel free to submit a PR
// NOTE(qix-): to refactor this to use const traits instead. Check the commit log for around
// NOTE(qix-): 18-20 June 2024 to see what this looked like before, for inspiration.
#![allow(
clippy::inline_always,
private_bounds,
clippy::missing_docs_in_private_items
)]
#![expect(clippy::inline_always, clippy::missing_docs_in_private_items)]

// TODO(qix-): Very much not happy with how this is structured. It's way too rigid and will be
// TODO(qix-): nearly impossible to maintain or extend in the future. It needs a full rewrite.
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2 changes: 1 addition & 1 deletion oro-arch-aarch64/src/reg/mair.rs
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Expand Up @@ -8,7 +8,7 @@
//! register. Other exception level MAIR registers are not explicitly
//! supported.
#![allow(clippy::inline_always, clippy::module_name_repetitions)]
#![expect(clippy::inline_always, clippy::module_name_repetitions)]

use core::{
fmt,
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2 changes: 1 addition & 1 deletion oro-arch-x86_64/build.rs
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@@ -1,4 +1,4 @@
#![allow(missing_docs, clippy::missing_docs_in_private_items)]
#![expect(missing_docs, clippy::missing_docs_in_private_items)]

fn main() {
println!("cargo:rustc-link-arg-bin=oro-kernel-x86_64=-T");
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2 changes: 1 addition & 1 deletion oro-arch-x86_64/src/asm.rs
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@@ -1,5 +1,5 @@
//! Assembly instruction stubs for the x86_64 architecture.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

use core::arch::asm;

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2 changes: 1 addition & 1 deletion oro-arch-x86_64/src/lib.rs
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Expand Up @@ -54,7 +54,7 @@
//! environment can be placed there for automatic cleanup by the kernel
//! once it has booted.
#![no_std]
#![allow(internal_features)]
#![expect(internal_features)]
#![cfg(not(all(doc, not(target_arch = "x86_64"))))]
#![feature(naked_functions, core_intrinsics)]
// SAFETY(qix-): This is accepted, but moving slowly (in fact, probably the slowest
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2 changes: 1 addition & 1 deletion oro-arch-x86_64/src/mem/paging.rs
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@@ -1,7 +1,7 @@
//! Memory paging (page tables, etc.) structures and implementations
//! for the x86_64 architecture.
#![allow(clippy::unusual_byte_groupings)]
#![expect(clippy::unusual_byte_groupings)]

use core::{
fmt,
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2 changes: 1 addition & 1 deletion oro-arch-x86_64/src/mem/paging_level.rs
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@@ -1,7 +1,7 @@
//! The Oro kernel supports x86_64's 4-level and 5-level paging modes,
//! which are determined by the CPU flags and conveyed to certain algorithms
//! with the [`PagingLevel`] enum.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

/// The number of levels in the page table hierarchy,
/// as determined by the CPU flags.
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2 changes: 1 addition & 1 deletion oro-boot-protocol/build.rs
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@@ -1,4 +1,4 @@
#![allow(missing_docs, clippy::missing_docs_in_private_items)]
#![expect(missing_docs, clippy::missing_docs_in_private_items)]

use convert_case::{Case, Casing};
use std::{io::Write, path::PathBuf, process::Command};
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2 changes: 1 addition & 1 deletion oro-boot-protocol/src/lib.rs
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Expand Up @@ -89,7 +89,7 @@
//!
//! The resulting header file is emitted to `$CARGO_TARGET_DIR/oro-boot.h`.
#![cfg_attr(not(test), no_std)]
#![allow(clippy::too_many_lines)] // Seems to be a bug in clippy with the macro expansion
#![expect(clippy::too_many_lines)] // Seems to be a bug in clippy with the macro expansion

// NOTE(qix-): This module is quite hairy with macros, both procedural and otherwise.
// NOTE(qix-): If you're trying to make sense of the types in here, it's probably
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2 changes: 1 addition & 1 deletion oro-bootloader-limine/build.rs
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@@ -1,4 +1,4 @@
#![allow(missing_docs, clippy::missing_docs_in_private_items)]
#![expect(missing_docs, clippy::missing_docs_in_private_items)]

fn main() {
let target_arch = std::env::var("CARGO_CFG_TARGET_ARCH").unwrap();
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2 changes: 1 addition & 1 deletion oro-debug-pl011/src/driver.rs
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@@ -1,4 +1,4 @@
#![allow(dead_code, clippy::missing_docs_in_private_items)]
#![expect(dead_code, clippy::missing_docs_in_private_items)]

use volatile_register::{RO, RW, WO};

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2 changes: 1 addition & 1 deletion oro-debug-pl011/src/lib.rs
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Expand Up @@ -3,7 +3,7 @@
//! Note that this is a very primitive implementation, suitable for only what
//! the Oro kernel needs.
#![no_std]
#![allow(internal_features)]
#![expect(internal_features)]
#![feature(core_intrinsics)]

mod driver;
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2 changes: 1 addition & 1 deletion oro-kernel/src/id.rs
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@@ -1,5 +1,5 @@
//! Implements Oro IDs in the kernel.
#![allow(clippy::module_name_repetitions)]
#![expect(clippy::module_name_repetitions)]

use core::{marker::ConstParamTy, str::FromStr};

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1 change: 0 additions & 1 deletion oro-kernel/src/lib.rs
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Expand Up @@ -7,7 +7,6 @@
// NOTE(qix-): `adt_const_params` isn't strictly necessary but is on track for acceptance,
// NOTE(qix-): and the open questions (e.g. mangling) are not of concern here.
// NOTE(qix-): https://github.com/rust-lang/rust/issues/95174
#![allow(incomplete_features)]
#![feature(adt_const_params)]

use oro_mem::{
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3 changes: 1 addition & 2 deletions oro-kernel/src/module.rs
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@@ -1,6 +1,5 @@
//! Implements Oro module instances in the kernel.
#![allow(clippy::module_name_repetitions)]
#![allow(dead_code)] // TODO(qix-)
#![expect(clippy::module_name_repetitions)]

use crate::id::{Id, IdType};

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2 changes: 0 additions & 2 deletions oro-kernel/src/port.rs
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@@ -1,7 +1,5 @@
//! Implements Oro ports in the kernel.
#![allow(dead_code)] // TODO(qix-)

use crate::id::{Id, IdType};

/// A singular port.
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4 changes: 2 additions & 2 deletions oro-macro-proc/src/lib.rs
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Expand Up @@ -2,9 +2,9 @@
//!
//! > **NOTE:** Don't use this crate directly; instead, use the `oro-macro` crate.
#![deny(missing_docs, clippy::missing_docs_in_private_items)]
#![allow(clippy::module_name_repetitions, clippy::missing_errors_doc)]
#![expect(clippy::module_name_repetitions)]
// TODO(qix-): Remove this when <https://github.com/rust-lang/rust-clippy/issues/12425> is fixed
#![allow(clippy::tabs_in_doc_comments)]
#![expect(clippy::tabs_in_doc_comments)]
#![feature(let_chains, proc_macro_span)]

mod asm_buffer;
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2 changes: 1 addition & 1 deletion oro-macro-proc/src/paste.rs
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@@ -1,5 +1,5 @@
//! Core functionality for the `paste!()` macro.
#![allow(clippy::missing_docs_in_private_items)]
#![expect(clippy::missing_docs_in_private_items)]

use convert_case::{Case, Casing};
use proc_macro2::{Span, TokenTree};
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2 changes: 1 addition & 1 deletion oro-mem/src/lib.rs
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@@ -1,6 +1,6 @@
//! Common memory types and functions for the Oro kernel.
#![cfg_attr(not(test), no_std)]
#![allow(internal_features)]
#![expect(internal_features)]
#![feature(core_intrinsics, never_type)]
#![cfg_attr(debug_assertions, feature(naked_functions))]

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2 changes: 0 additions & 2 deletions oro-mem/src/mapper.rs
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Expand Up @@ -6,8 +6,6 @@
//! The kernel will allocate memory into specific regions, leaving the
//! architecture to properly set up all flags and other necessary controls
//! for those regions to behave as the kernel expects.
#![allow(clippy::inline_always)]

use crate::{
pfa::alloc::{PageFrameAllocate, PageFrameFree},
translate::Translator,
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2 changes: 1 addition & 1 deletion oro-mem/src/region.rs
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Expand Up @@ -13,7 +13,7 @@
//! memory maps and regions into the "current" execution context, making them
//! usable by the CPU.
#![allow(clippy::module_name_repetitions, clippy::inline_always)]
#![expect(clippy::module_name_repetitions)]

/// An extension trait for [`MemoryRegion`] and its proxy.
pub trait MemoryRegion: Sized {
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2 changes: 1 addition & 1 deletion oro-mem/src/translate.rs
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@@ -1,5 +1,5 @@
//! Memory address translation utilities for the pre-boot stage.
#![allow(clippy::inline_always)]
#![expect(clippy::inline_always)]

/// Translates a page frame to a virtual address, used in the pre-boot stage
/// to write kernel configuration structures.
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2 changes: 1 addition & 1 deletion oro-sync/src/barrier.rs
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@@ -1,6 +1,6 @@
//! Barrier types, used to synchronize multiple cores in lockstep.
#![allow(clippy::module_name_repetitions)]
#![expect(clippy::module_name_repetitions)]

use core::sync::atomic::{AtomicU64, Ordering};

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2 changes: 1 addition & 1 deletion oro-sync/src/spinlock/unfair.rs
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@@ -1,7 +1,7 @@
//! Provides the [`UnfairSpinlock`] type, a simple spinlock that does not
//! guarantee fairness and may result in starvation.
#![allow(clippy::module_name_repetitions)]
#![expect(clippy::module_name_repetitions)]

use core::{
cell::UnsafeCell,
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2 changes: 1 addition & 1 deletion oro-sync/src/spinlock/unfair_critical.rs
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Expand Up @@ -2,7 +2,7 @@
//! guarantee fairness and may result in starvation, that also disables
//! interrupts for the lifetime of an acquired lock.
#![allow(clippy::module_name_repetitions)]
#![expect(clippy::module_name_repetitions)]

use core::{
cell::UnsafeCell,
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2 changes: 1 addition & 1 deletion oro-type/src/lib.rs
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Expand Up @@ -4,7 +4,7 @@
//! wrappers and associated traits for them (e.g.
//! forced endianness types).
#![cfg_attr(not(test), no_std)]
#![allow(clippy::inline_always, clippy::wrong_self_convention)]
#![expect(clippy::inline_always, clippy::wrong_self_convention)]

use core::marker::PhantomData;

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2 changes: 1 addition & 1 deletion rust-toolchain.toml
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@@ -1,5 +1,5 @@
[toolchain]
channel = "nightly-2024-09-08"
channel = "nightly-2024-09-11"
components = [ "rustfmt", "rustc-dev", "clippy", "rust-src", "llvm-tools-preview" ]
targets = [ "x86_64-unknown-none", "aarch64-unknown-none" ]
profile = "minimal"

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