Add support for the new BICR generation tools

boards/nordic/nrf54h20dk/bicr.json

@@ -0,0 +1,32 @@
+{
+  "power": {
+    "scheme": "VDDH_2V1_5V5"
+  },
+  "ioPortPower": {
+    "p1Supply": "EXTERNAL_1V8",
+    "p2Supply": "EXTERNAL_1V8",
+    "p6Supply": "EXTERNAL_1V8",
+    "p7Supply": "EXTERNAL_1V8",
+    "p9Supply": "EXTERNAL_FULL"
+  },
+  "ioPortImpedance": {
+    "p6ImpedanceOhms": 50,
+    "p7ImpedanceOhms": 50
+  },
+  "lfosc": {
+    "source": "LFXO",
+    "lfxo": {
+      "mode": "CRYSTAL",
+      "accuracyPPM": 20,
+      "startupTimeMs": 600,
+      "builtInLoadCapacitancePf": 15,
+      "builtInLoadCapacitors": true
+    }
+  },
+  "hfxo": {
+    "mode": "CRYSTAL",
+    "startupTimeUs": 850,
+    "builtInLoadCapacitors": true,
+    "builtInLoadCapacitancePf": 14
+  }
+}

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-common.dtsi

@@ -11,13 +11,8 @@
 &hfxo {
 	status = "okay";
 	accuracy-ppm = <30>;
-	startup-time-us = <850>;
-	mode = "crystal";
 };
 
 &lfxo {
 	status = "okay";
-	accuracy-ppm = <20>;
-	startup-time-us = <600000>;
-	mode = "crystal";
 };

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts

@@ -8,7 +8,6 @@
 
 #include <nordic/nrf54h20_cpuapp.dtsi>
 #include "nrf54h20dk_nrf54h20-common.dtsi"
-#include "nrf54h20dk_bicr.dtsi"
 
 /delete-node/ &cpurad_cpusys_ipc;
 /delete-node/ &cpusec_cpurad_ipc;

drivers/clock_control/clock_control_nrf2_common.c

@@ -5,6 +5,7 @@
 
 #include "clock_control_nrf2_common.h"
 #include <zephyr/drivers/clock_control/nrf_clock_control.h>
+#include <hal/nrf_bicr.h>
 
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
@@ -19,6 +20,8 @@ LOG_MODULE_REGISTER(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
 		 (idx * sizeof(array[0])) - \
 		 offsetof(type, array[0]))
 
+#define BICR (NRF_BICR_Type *)DT_REG_ADDR(DT_NODELABEL(bicr))
+
 /*
  * Definition of `struct clock_config_generic`.
  * Used to access `clock_config_*` structures in a common way.
@@ -83,6 +86,40 @@ static inline uint8_t get_index_of_highest_bit(uint32_t value)
 	return value ? (uint8_t)(31 - __builtin_clz(value)) : 0;
 }
 
+int lfosc_get_accuracy(uint16_t *accuracy)
+{
+	switch (nrf_bicr_lfosc_accuracy_get(BICR)) {
+	case NRF_BICR_LFOSC_ACCURACY_500PPM:
+		*accuracy = 500U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_250PPM:
+		*accuracy = 250U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_150PPM:
+		*accuracy = 150U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_100PPM:
+		*accuracy = 100U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_75PPM:
+		*accuracy = 75U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_50PPM:
+		*accuracy = 50U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_30PPM:
+		*accuracy = 30U;
+		break;
+	case NRF_BICR_LFOSC_ACCURACY_20PPM:
+		*accuracy = 20U;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 int clock_config_init(void *clk_cfg, uint8_t onoff_cnt, k_work_handler_t update_work_handler)
 {
 	struct clock_config_generic *cfg = clk_cfg;

drivers/clock_control/clock_control_nrf2_common.h

@@ -36,6 +36,16 @@ struct clock_onoff {
 		struct clock_onoff onoff[_onoff_cnt]; \
 	}
 
+/**
+ * @brief Obtain LFOSC accuracy in ppm.
+ *
+ * @param[out] accuracy Accuracy in ppm.
+ *
+ * @retval 0 On success
+ * @retval -EINVAL If accuracy is not configured.
+ */
+int lfosc_get_accuracy(uint16_t *accuracy);
+
 /**
  * @brief Initializes a clock configuration structure.
  *

drivers/clock_control/clock_control_nrf2_fll16m.c

@@ -8,7 +8,9 @@
 #include "clock_control_nrf2_common.h"
 #include <zephyr/devicetree.h>
 #include <zephyr/drivers/clock_control/nrf_clock_control.h>
+
 #include <soc_lrcconf.h>
+#include <hal/nrf_bicr.h>
 
 #include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL);
@@ -23,26 +25,17 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
 #define FLL16M_MODE_BYPASS      2
 #define FLL16M_MODE_DEFAULT     FLL16M_MODE_OPEN_LOOP
 
-#define FLL16M_LFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, lfxo)
 #define FLL16M_HFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, hfxo)
 
-#define FLL16M_HAS_LFXO DT_NODE_HAS_STATUS_OKAY(FLL16M_LFXO_NODE)
-
-#define FLL16M_LFXO_ACCURACY DT_PROP(FLL16M_LFXO_NODE, accuracy_ppm)
 #define FLL16M_HFXO_ACCURACY DT_PROP(FLL16M_HFXO_NODE, accuracy_ppm)
 #define FLL16M_OPEN_LOOP_ACCURACY DT_INST_PROP(0, open_loop_accuracy_ppm)
 #define FLL16M_CLOSED_LOOP_BASE_ACCURACY DT_INST_PROP(0, closed_loop_base_accuracy_ppm)
 #define FLL16M_MAX_ACCURACY FLL16M_HFXO_ACCURACY
 
-/* Closed-loop mode uses LFXO as source if present, HFXO otherwise */
-#if FLL16M_HAS_LFXO
-#define FLL16M_CLOSED_LOOP_ACCURACY (FLL16M_CLOSED_LOOP_BASE_ACCURACY + FLL16M_LFXO_ACCURACY)
-#else
-#define FLL16M_CLOSED_LOOP_ACCURACY (FLL16M_CLOSED_LOOP_BASE_ACCURACY + FLL16M_HFXO_ACCURACY)
-#endif
+#define BICR (NRF_BICR_Type *)DT_REG_ADDR(DT_NODELABEL(bicr))
 
 /* Clock options sorted from lowest to highest accuracy */
-static const struct clock_options {
+static struct clock_options {
 	uint16_t accuracy;
 	uint8_t mode;
 } clock_options[] = {
@@ -51,7 +44,6 @@ static const struct clock_options {
 		.mode = FLL16M_MODE_OPEN_LOOP,
 	},
 	{
-		.accuracy = FLL16M_CLOSED_LOOP_ACCURACY,
 		.mode = FLL16M_MODE_CLOSED_LOOP,
 	},
 	{
@@ -233,6 +225,27 @@ static int api_get_rate_fll16m(const struct device *dev,
 static int fll16m_init(const struct device *dev)
 {
 	struct fll16m_dev_data *dev_data = dev->data;
+	nrf_bicr_lfosc_mode_t lfosc_mode;
+
+	clock_options[1].accuracy = FLL16M_CLOSED_LOOP_BASE_ACCURACY;
+
+	/* Closed-loop mode uses LFXO as source if present, HFXO otherwise */
+	lfosc_mode = nrf_bicr_lfosc_mode_get(BICR);
+
+	if (lfosc_mode != NRF_BICR_LFOSC_MODE_UNCONFIGURED &&
+	    lfosc_mode != NRF_BICR_LFOSC_MODE_DISABLED) {
+		int ret;
+		uint16_t accuracy;
+
+		ret = lfosc_get_accuracy(&accuracy);
+		if (ret < 0) {
+			return ret;
+		}
+
+		clock_options[1].accuracy += accuracy;
+	} else {
+		clock_options[1].accuracy += FLL16M_HFXO_ACCURACY;
+	}
 
 	return clock_config_init(&dev_data->clk_cfg,
 				 ARRAY_SIZE(dev_data->clk_cfg.onoff),