[nrf noup] modules: hostap: Add NCS PSA for hostap crypto ALT

.github/workflows/commit-tags.yml

@@ -0,0 +1,28 @@
+name: Commit tags
+
+on:
+  pull_request:
+    types: [synchronize, opened, reopened, edited, labeled, unlabeled,
+            milestoned, demilestoned, assigned, unassigned, ready_for_review,
+            review_requested]
+
+jobs:
+  commit_tags:
+    runs-on: ubuntu-22.04
+    name: Run commit tags checks on patch series (PR)
+    steps:
+    - name: Update PATH for west
+      run: |
+        echo "$HOME/.local/bin" >> $GITHUB_PATH
+
+    - name: Checkout the code
+      uses: actions/checkout@v3
+      with:
+        ref: ${{ github.event.pull_request.head.sha }}
+        fetch-depth: 0
+
+    - name: Run the commit tags
+      uses: nrfconnect/action-commit-tags@main
+      with:
+        target: .
+        upstream: zephyrproject-rtos/zephyr/main

.github/workflows/compliance.yml

@@ -49,8 +49,8 @@ jobs:
         git config --global user.name "Your Name"
         git remote -v
         # Ensure there's no merge commits in the PR
-        [[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
-        (echo "::error ::Merge commits not allowed, rebase instead";false)
+        #[[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
+        #(echo "::error ::Merge commits not allowed, rebase instead";false)
         git rebase origin/${BASE_REF}
         # debug
         git log  --pretty=oneline | head -n 10
@@ -78,8 +78,8 @@ jobs:
         git log  --pretty=oneline | head -n 10
         # Increase rename limit to allow for large PRs
         git config diff.renameLimit 10000
-        ./scripts/ci/check_compliance.py --annotate -e KconfigBasic \
-        -c origin/${BASE_REF}..
+        ./scripts/ci/check_compliance.py --annotate -e KconfigBasic -e Kconfig \
+        -e KconfigBasicNoModules -e ModulesMaintainers -c origin/${BASE_REF}..
 
     - name: upload-results
       uses: actions/upload-artifact@v4

.github/workflows/manifest-PR.yml

@@ -0,0 +1,17 @@
+name: handle manifest PR
+on:
+  pull_request_target:
+    types: [opened, synchronize, closed]
+    branches:
+      - main
+
+
+jobs:
+  call-manifest-pr-action:
+    runs-on: ubuntu-latest
+    steps:
+      - name: handle manifest PR
+        uses: nrfconnect/action-manifest-pr@main
+        with:
+          token: ${{ secrets.NCS_GITHUB_TOKEN }}
+          manifest-pr-title-details: ${{ github.event.pull_request.title }}

CODEOWNERS

@@ -18,6 +18,7 @@
 # component or code. This file is going to be deprecated and currently only had
 # entries that are not covered by the MAINTAINERS file.
 
+/.github/test-spec.yml                    @nrfconnect/ncs-test-leads
 /soc/arm/aspeed/                          @aspeeddylan
 /soc/atmel/                               @nandojve
 /soc/arm/bcm*/                            @sbranden

Jenkinsfile

@@ -0,0 +1,5 @@
+@Library("CI_LIB") _
+
+def pipeline = new ncs.sdk_zephyr.Main()
+
+pipeline.run(JOB_NAME)

Kconfig.zephyr

@@ -17,13 +17,13 @@ osource "${APPLICATION_SOURCE_DIR}/VERSION"
 # Shield defaults should have precedence over board defaults, which should have
 # precedence over SoC defaults, so include them in that order.
 #
-# $ARCH and $BOARD_DIR will be glob patterns when building documentation.
+# $ARCH and $KCONFIG_BOARD_DIR will be glob patterns when building documentation.
 # This loads custom shields defconfigs (from BOARD_ROOT)
 osource "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
 # This loads Zephyr base shield defconfigs
 source "boards/shields/*/Kconfig.defconfig"
 
-osource "$(BOARD_DIR)/Kconfig.defconfig"
+osource "$(KCONFIG_BOARD_DIR)/Kconfig.defconfig"
 
 # This loads Zephyr specific SoC root defconfigs
 source "$(KCONFIG_BINARY_DIR)/soc/Kconfig.defconfig"

MAINTAINERS.yml

@@ -975,7 +975,6 @@ Documentation:
     - doc/images/Zephyr-Kite-in-tree.png
     - doc/index-tex.rst
     - doc/index.rst
-    - doc/kconfig.rst
     - doc/templates/sample.tmpl
     - doc/templates/board.tmpl
     - boards/index.rst

arch/arm/core/mpu/arm_mpu_regions.c

@@ -8,6 +8,9 @@
 #include <zephyr/arch/arm/mpu/arm_mpu.h>
 
 #include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>
+#if USE_PARTITION_MANAGER
+#include <pm_config.h>
+#endif
 
 static const struct arm_mpu_region mpu_regions[] = {
 	/* Region 0 */
@@ -21,13 +24,23 @@ static const struct arm_mpu_region mpu_regions[] = {
 #endif
 	/* Region 1 */
 	MPU_REGION_ENTRY("SRAM_0",
+#if USE_PARTITION_MANAGER
+			 PM_SRAM_ADDRESS,
+#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
+			 REGION_RAM_ATTR(PM_SRAM_ADDRESS, PM_SRAM_SIZE)),
+#else
+			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
+#endif
+#else
 			 CONFIG_SRAM_BASE_ADDRESS,
 #if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
 			 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
 				 CONFIG_SRAM_SIZE * 1024)),
 #else
 			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
 #endif
+
+#endif /* USE_PARTITION_MANAGER */
 };
 
 const struct arm_mpu_config mpu_config = {

boards/Kconfig

@@ -129,7 +129,7 @@ config QEMU_EXTRA_FLAGS
 	  GDBstub over serial with `-serial tcp:127.0.0.1:5678,server`
 
 # There might not be any board options, hence the optional source
-osource "$(BOARD_DIR)/Kconfig"
+osource "$(KCONFIG_BOARD_DIR)/Kconfig"
 endmenu
 
 config BOARD_HAS_TIMING_FUNCTIONS

boards/Kconfig.v1

@@ -2,9 +2,13 @@
 
 # SPDX-License-Identifier: Apache-2.0
 
+# In HWMv1 the KCONFIG_BOARD_DIR points directly to the BOARD_DIR.
+# Set the BOARD_DIR variable for backwards compatibility to legacy hardware model.
+BOARD_DIR := $(KCONFIG_BOARD_DIR)
+
 choice
 	prompt "Board Selection"
 
-source "$(BOARD_DIR)/Kconfig.board"
+source "$(KCONFIG_BOARD_DIR)/Kconfig.board"
 
 endchoice

boards/Kconfig.v2

@@ -25,4 +25,4 @@ config BOARD_QUALIFIERS
 	  For example, if building for ``nrf5340dk/nrf5340/cpuapp`` then this will contain the
 	  value ``nrf5340/cpuapp``.
 
-osource "$(BOARD_DIR)/Kconfig.$(BOARD)"
+osource "$(KCONFIG_BOARD_DIR)/Kconfig.$(BOARD)"

boards/native/nrf_bsim/CMakeLists.txt

@@ -24,6 +24,7 @@ zephyr_library_sources(
 	cpu_wait.c
 	argparse.c
 	nsi_if.c
+	native_remap.c
 	soc/nrfx_coredep.c
 	common/bstests_entry.c
 	common/cmsis/cmsis.c

boards/native/nrf_bsim/native_remap.c

@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <stdbool.h>
+#include "NHW_misc.h"
+
+bool native_emb_addr_remap(void **addr)
+{
+	return nhw_convert_RAM_addr(addr);
+}

boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts

@@ -97,8 +97,9 @@
 
 &radio {
 	status = "okay";
-	/* This feature is not yet supported by the RADIO model */
+	/* These features are not yet supported by the RADIO model */
 	/delete-property/ dfe-supported;
+	/delete-property/ cs-supported;
 };
 
 &clock {

boards/nordic/nrf54h20dk/CMakeLists.txt

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+if(CONFIG_NRFS_MRAM_SERVICE_ENABLED)
+  zephyr_library_sources(board.c)
+endif()

boards/nordic/nrf54h20dk/Kconfig.defconfig

@@ -14,3 +14,11 @@ config BT_CTLR
 	default y if BT
 
 endif # BOARD_NRF54H20DK_NRF54H20_CPURAD
+
+if BOARD_NRF54H20DK_NRF54H20_CPUPPR
+
+# As PPR has limited memory most of tests does not fit with asserts enabled.
+config ASSERT
+	default n if ZTEST
+
+endif # BOARD_NRF54H20DK_NRF54H20_CPUPPR

boards/nordic/nrf54h20dk/Kconfig.nrf54h20dk

@@ -2,9 +2,15 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_NRF54H20DK
-	select SOC_NRF54H20_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPUAPP
-	select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD
-	select SOC_NRF54H20_CPUPPR if BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
-				      BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP
-	select SOC_NRF54H20_CPUFLPR if BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \
-				       BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP
+	select SOC_NRF54H20_ENGB_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPUAPP && BOARD_REVISION = "0.8.0"
+	select SOC_NRF54H20_ENGB_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD && BOARD_REVISION = "0.8.0"
+	select SOC_NRF54H20_ENGB_CPUPPR if (BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
+				       BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP) && BOARD_REVISION = "0.8.0"
+	select SOC_NRF54H20_ENGB_CPUFLPR if (BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \
+				        BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP) && BOARD_REVISION = "0.8.0"
+	select SOC_NRF54H20_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPUAPP && BOARD_REVISION = "0.9.0"
+	select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD && BOARD_REVISION = "0.9.0"
+	select SOC_NRF54H20_CPUPPR if (BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
+				       BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP) && BOARD_REVISION = "0.9.0"
+	select SOC_NRF54H20_CPUFLPR if (BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \
+				        BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP) && BOARD_REVISION = "0.9.0"

boards/nordic/nrf54h20dk/board.c

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/init.h>
+
+#define MODULE mram_suspend_off
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(MODULE);
+
+#include <services/nrfs_mram.h>
+#include <nrfs_backend_ipc_service.h>
+
+#define MRAM_SUSPEND_OFF_INIT_PRIO 90
+
+void mram_latency_handler(nrfs_mram_latency_evt_t const *p_evt, void *context)
+{
+	switch (p_evt->type) {
+	case NRFS_MRAM_LATENCY_REQ_APPLIED:
+		LOG_DBG("MRAM latency handler: response received");
+		break;
+	case NRFS_MRAM_LATENCY_REQ_REJECTED:
+		LOG_ERR("MRAM latency handler - request rejected!");
+		break;
+	default:
+		LOG_ERR("MRAM latency handler - unexpected event: 0x%x", p_evt->type);
+		break;
+	}
+}
+
+static int turn_off_suspend_mram(void)
+{
+	/* Turn off mram automatic suspend as it causes delays in time depended code sections. */
+
+	nrfs_err_t err = NRFS_SUCCESS;
+
+	/* Wait for ipc initialization */
+	nrfs_backend_wait_for_connection(K_FOREVER);
+
+	err = nrfs_mram_init(mram_latency_handler);
+	if (err != NRFS_SUCCESS) {
+		LOG_ERR("MRAM service init failed: %d", err);
+	} else {
+		LOG_DBG("MRAM service initialized");
+	}
+
+	LOG_DBG("MRAM: set latency: NOT ALLOWED");
+	err = nrfs_mram_set_latency(MRAM_LATENCY_NOT_ALLOWED, NULL);
+	if (err) {
+		LOG_ERR("MRAM: set latency failed (%d)", err);
+	}
+
+	return err;
+}
+
+SYS_INIT(turn_off_suspend_mram, APPLICATION, MRAM_SUSPEND_OFF_INIT_PRIO);

boards/nordic/nrf54h20dk/board.yml

@@ -8,3 +8,9 @@ board:
       cpucluster: cpuppr
     - name: xip
       cpucluster: cpuflpr
+  revision:
+    format: major.minor.patch
+    default: "0.9.0"
+    revisions:
+    - name: "0.8.0"
+    - name: "0.9.0"

boards/nordic/nrf54h20dk/nrf54h20dk_bicr.dtsi

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	bicr: bicr@fff87b0 {
+		compatible = "nordic,nrf-bicr";
+		reg = <0xfff87b0 0x48>;
+
+		power-vddao5v0 = "external";
+		power-vddao1v8 = "internal";
+		power-vdd1v0 = "internal";
+		power-vddrf1v0 = "shorted";
+		power-vddao0v8 = "internal";
+		power-vddvs0v8 = "internal";
+
+		inductor-present;
+
+		ioport-power-rails = <&gpio1 2>, <&gpio2 2>, <&gpio6 2>, <&gpio7 2>, <&gpio9 4>;
+		ioport-drivectrls = <&gpio6 50>, <&gpio7 50>;
+
+		lfosc-mode = "crystal";
+		lfosc-loadcap = <15>;
+
+		lfrc-autocalibration = <20 40 3>;
+
+		hfxo-mode = "crystal";
+		hfxo-loadcap = <56>;
+	};
+};
+
+&gpio1 {
+	#ioport-power-rail-cells = <1>;
+};
+
+&gpio2 {
+	#ioport-power-rail-cells = <1>;
+};
+
+&gpio6 {
+	#ioport-power-rail-cells = <1>;
+	#ioport-drivectrl-cells = <1>;
+};
+
+&gpio7 {
+	#ioport-power-rail-cells = <1>;
+	#ioport-drivectrl-cells = <1>;
+};
+
+&gpio9 {
+	#ioport-power-rail-cells = <1>;
+};