Ipc reduced structures #19877

mif1-nordic · 2025-01-13T13:47:22Z

Depends on #19449

NordicBuilder · 2025-01-13T13:48:34Z

The following west manifest projects have changed revision in this Pull Request:

Name	Old Revision	New Revision	Diff

✅ All manifest checks OK

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NordicBuilder · 2025-01-13T13:55:29Z

CI Information

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Build number: 26

Inputs:

Sources:

sdk-nrf: PR head: da9293880a5a24a497a05449a8ef893a602655ad

more details

sdk-nrf:

PR head: da9293880a5a24a497a05449a8ef893a602655ad
merge base: 1c36f9c6163f8b4f2b8d94693243b78da5465fdd
target head (main): ba827b34c8394ab6fe68ff9c9e2fa8709399d7de
Diff

Github labels

Enabled	Name	Description
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	ci-all-test	Run all of ci, no test spec filtering will be done
	ci-force-downstream	Force execution of downstream even if twister fails
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List of changed files detected by CI (8)

applications
│  ├── sdp
│  │  ├── mspi
│  │  │  ├── boards
│  │  │  │  │ nrf54l15dk_nrf54l15_cpuflpr.conf
│  │  │  ├── src
│  │  │  │  ├── hrt
│  │  │  │  │  ├── hrt.c
│  │  │  │  │  ├── hrt.h
│  │  │  │  │  │ hrt.s
│  │  │  │  │ main.c
cmake
│  │ sdp.cmake
drivers
│  ├── mspi
│  │  │ mspi_nrfe.c
include
│  ├── drivers
│  │  ├── mspi
│  │  │  │ nrfe_mspi.h

Outputs:

Toolchain

Version: 342151af73
Build docker image: docker-dtr.nordicsemi.no/sw-production/ncs-build:342151af73_912848a074

Test Spec & Results: ✅ Success; ❌ Failure; 🟠 Queued; 🟡 Progress; ◻️ Skipped; ⚠️ Quarantine

◻️ Toolchain - Skipped: existing toolchain is used
❌ Build twister
❌ Integration tests
- ❌ test-sdk-audio
- ❌ desktop52_verification
- ❌ test-fw-nrfconnect-boot
- ❌ test-fw-nrfconnect-apps
- ❌ test_ble_nrf_config
- ❌ test-fw-nrfconnect-ble_mesh
- ❌ test-fw-nrfconnect-ble_samples
- ❌ test-fw-nrfconnect-chip
- ❌ test-fw-nrfconnect-nfc
- ❌ test-fw-nrfconnect-nrf-iot_libmodem-nrf
- ❌ test-fw-nrfconnect-nrf-iot_serial_lte_modem
- ❌ test-fw-nrfconnect-nrf-iot_zephyr_lwm2m
- ❌ test-fw-nrfconnect-nrf-iot_samples
- ❌ test-fw-nrfconnect-nrf-iot_lwm2m
- ❌ doc-internal
- ❌ test-fw-nrfconnect-nrf-iot_thingy91
- ❌ test-fw-nrfconnect-nrf_crypto
- ❌ test-fw-nrfconnect-rpc
- ❌ test-fw-nrfconnect-rs
- ❌ test-fw-nrfconnect-fem
- ❌ test-fw-nrfconnect-tfm
- ❌ test-fw-nrfconnect-thread
- ❌ test-fw-nrfconnect-zigbee
- ❌ test-sdk-find-my
- ❌ test-fw-nrfconnect-nrf-iot_mosh
- ❌ test-fw-nrfconnect-nrf-iot_positioning
- ❌ test-sdk-sidewalk
- ❌ test-sdk-wifi
- ❌ test-low-level
- ❌ test-sdk-pmic-samples
- ❌ test-sdk-mcuboot
- ❌ test-sdk-dfu
- ❌ test-fw-nrfconnect-ps
- ❌ test-secdom-samples-public

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drivers/mspi/mspi_nrfe.c

NordicBuilder · 2025-01-15T13:09:54Z

You can find the documentation preview for this PR at this link.

Note: This comment is automatically posted by the Documentation Publish GitHub Action.

applications/sdp/mspi/boards/nrf54l15dk_nrf54l15_cpuflpr.conf

magp-nordic

Revied only the new structures definitions.

magp-nordic · 2025-01-16T10:14:07Z

include/drivers/mspi/nrfe_mspi.h

+typedef struct {
+	nrfe_mspi_opcode_t opcode; /* nrfe_mspi_opcode */
+        uint32_t command;
+        uint32_t address;
+        uint32_t num_bytes;
+} nrfe_mspi_xfer_packet_t;


Where is data?

As I don't know the data size I couldn't add it as a field to the structure, so the data is appended at the end of structure when sending is through IPC to VPR.

Why not send a pointer to the data then? I do not like that data is hidden in this solution

there is already a task for that
https://nordicsemi.atlassian.net/browse/NRFX-6939

@masz-nordic maybe you could see a different solution to this. Currently, data is assumed to be right after this structure in memory, because it is copied and its size may vary. All data is copied and not sent by a pointer, so that it would work on Lilium, where cores do not have access to each other's memory. Since there is a ticket for adding a solution that will work only on socs where all memory is accessible to APP and FLPR, I will not insist on implementing it in this PR. But maybe there is a better way of sending data in Lilium case than "hiding" it after the structure? I am still not a fan of this.
@nika-nordic maybe you have some insight into how data buffers are sent between cores in Lilium? Or @nordic-krch? I guess it might be a part of logging with STM.

include/drivers/mspi/nrfe_mspi.h

magp-nordic · 2025-01-16T10:30:18Z

include/drivers/mspi/nrfe_mspi.h

+        enum mspi_cpp_mode cpp;
+        enum mspi_endian endian;
+        bool hold_ce;
+	nrfe_mspi_polarity_t ce_polarities[NRFE_MSPI_CE_PINS_MAX];


Why are we sending multiple CE polarities, if there is only one CE (ce_num)?

we have to send polarities of all the pins so that VPR knows how to set them to inactive state when sending data to only one of them. ce_num is the index of the device with which we want to talk.

I guess we have different understandings of the configuration phase, so let me explain my point of view. Zephyr's MSPI driver API has two configuration functions: mspi_config and mspi_dev_config. mspi_config is used to configure the driver itself (doc: "Configure a MSPI controller."), and it takes data from DTS, which makes sense because the driver can be limited by the hardware (DTS files are supposed to describe hardware). So in DTS files you have specified CE lines that COULD be used by the driver user, meaning which hardware pins can be used by the driver as CE. Not all of them have to be used, it is just a possibility on a given soc.
Then, we also have mspi_dev_config, which should be used to configure a peripheral MSPI device (doc: "Configure a MSPI controller with device-specific parameters."), and it takes the mspi_dev_cfg structure (which is specified by the driver's user), which contains info, which CE PIN should be used, of the ones that are possible, and its polarity. So, we can set the pin to its inactive state in the driver as soon as the device is configured by the user.
I would assume, that all devices should or even must be configured before the first TX/RX happens, because I cannot imagine a scenario when some device has to be configured after we've already sent something to another device. If there is such case, let me know, it is possible I am not aware of something. But otherwise, I would send just one pin number and one pin polarity in nrfe_mspi_xfer_config_t. Sure, there might be a case for specifying the polarity of all possible CE pins at once, which we do not know of yet, but IF such case appears, THEN we will worry about it.

include/drivers/mspi/nrfe_mspi.h

magp-nordic · 2025-01-16T11:17:20Z

include/drivers/mspi/nrfe_mspi.h

-	NRFE_MSPI_TX,
-	NRFE_MSPI_TXRX,
+	NRFE_MSPI_CONFIG_PINS, /*nrfe_mspi_pinctrl_soc_pin_t*/
+	NRFE_MSPI_CONFIG_XFER, /*nrfe_mspi_xfer_config_t*/


Nit: I would rename it to NRFE_MSPI_CONFIG_DEV, because it is more similar to mspi_dev_cfg than to mspi_xfer.

NordicBuilder · 2025-01-16T16:34:13Z

Memory footprint analysis revealed the following potential issues

sample.matter.template.debug[nrf7002dk/nrf5340/cpuapp]: High ROM usage: 912194[B] - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)
sample.matter.template.debug[nrf7002dk/nrf5340/cpuapp]: RAM size increased by 1152[B] in comparison to the main[1c36f9c] branch. - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)
sample.matter.template.debug[nrf5340dk/nrf5340/cpuapp]: RAM size increased by 1152[B] in comparison to the main[1c36f9c] branch. - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)
sample.matter.template.release[nrf7002dk/nrf5340/cpuapp]: High ROM usage: 821134[B] - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)
sample.matter.template.release[nrf7002dk/nrf5340/cpuapp]: RAM size increased by 1152[B] in comparison to the main[1c36f9c] branch. - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)
sample.matter.template.release[nrf5340dk/nrf5340/cpuapp]: RAM size increased by 1152[B] in comparison to the main[1c36f9c] branch. - link (cc: @kkasperczyk-no @ArekBalysNordic @markaj-nordic)

Note: This message is automatically posted and updated by the CI (latest/sdk-nrf/PR-19877/25)

kobj-types-enum.h was generated after VPR asm_gen, added kobj-types-enum.h as dependence for asm_gen. Signed-off-by: Michal Frankiewicz <[email protected]>

added mode support for SINGLE,QUAD,QUAD_1_4_4,QUAD_1_1_4 and custom Ipc mspi structures Signed-off-by: Michal Frankiewicz <[email protected]> Signed-off-by: Jakub Zymelka <[email protected]>

Added reactions to all mspi Ipc messages but NRFE_MSPI_TXRX and NRFE_MSPI_TX. The data is stored in local structures for later use. Signed-off-by: Michal Frankiewicz <[email protected]>

Added MSPI_TX reaction to NRFE_MSPI_TXRX and NRFE_MSPI_TX. Added HRT mspi TX functionality. Signed-off-by: Michal Frankiewicz <[email protected]>

Implemented smaller structures and reduced ammount of opcodes in IPC Signed-off-by: Michal Frankiewicz <[email protected]>

mif1-nordic requested review from a team as code owners January 13, 2025 13:47

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mif1-nordic force-pushed the Ipc_Reduced_Structures branch from 3f4fe33 to 860ba08 Compare January 13, 2025 13:57

jaz1-nordic reviewed Jan 13, 2025

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mif1-nordic force-pushed the Ipc_Reduced_Structures branch from 860ba08 to 49791bb Compare January 14, 2025 16:11

masz-nordic added this to the 3.0.0 milestone Jan 14, 2025

mif1-nordic force-pushed the Ipc_Reduced_Structures branch 3 times, most recently from bcbe9c9 to 51738bc Compare January 15, 2025 12:51

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application: sdp: mspi: Ipc Hrt Connection #19449

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mif1-nordic force-pushed the Ipc_Reduced_Structures branch from 461afba to 000dcf7 Compare January 16, 2025 11:06

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mif1-nordic force-pushed the Ipc_Reduced_Structures branch from 000dcf7 to 61ce62d Compare January 16, 2025 12:19

mif1-nordic force-pushed the Ipc_Reduced_Structures branch 2 times, most recently from 3d095bb to dffb578 Compare January 16, 2025 15:17

mif1-nordic force-pushed the Ipc_Reduced_Structures branch 3 times, most recently from a674e62 to b749c23 Compare January 17, 2025 10:30

mif1-nordic mentioned this pull request Jan 21, 2025

Surplus clock edge #20017

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mif1-nordic force-pushed the Ipc_Reduced_Structures branch 8 times, most recently from d779c02 to b361226 Compare January 22, 2025 13:12

mif1-nordic and others added 4 commits January 23, 2025 16:30

cmake: Fixed mspi.h include error

b6ab25f

kobj-types-enum.h was generated after VPR asm_gen, added kobj-types-enum.h as dependence for asm_gen. Signed-off-by: Michal Frankiewicz <[email protected]>

drivers: mspi: Mode and structures

6f5c33e

added mode support for SINGLE,QUAD,QUAD_1_4_4,QUAD_1_1_4 and custom Ipc mspi structures Signed-off-by: Michal Frankiewicz <[email protected]> Signed-off-by: Jakub Zymelka <[email protected]>

applications: sdp: mspi: Ipc communication reaction

5b8af61

Added reactions to all mspi Ipc messages but NRFE_MSPI_TXRX and NRFE_MSPI_TX. The data is stored in local structures for later use. Signed-off-by: Michal Frankiewicz <[email protected]>

application: sdp: mspi: Hrt data transfer

85a0402

Added MSPI_TX reaction to NRFE_MSPI_TXRX and NRFE_MSPI_TX. Added HRT mspi TX functionality. Signed-off-by: Michal Frankiewicz <[email protected]>

mif1-nordic force-pushed the Ipc_Reduced_Structures branch from b361226 to 846177c Compare January 23, 2025 15:32

mif1-nordic added 2 commits January 24, 2025 16:37

drivers: mspi: Reduced IPC structures-drivers

abd5061

Implemented smaller structures and reduced ammount of opcodes in IPC Signed-off-by: Michal Frankiewicz <[email protected]>

applications: sdp: mspi: Reduced IPC structures-applications

da92938

Implemented smaller structures and reduced ammount of opcodes in IPC Signed-off-by: Michal Frankiewicz <[email protected]>

mif1-nordic force-pushed the Ipc_Reduced_Structures branch from 846177c to da92938 Compare January 24, 2025 17:46

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Ipc reduced structures #19877

Ipc reduced structures #19877

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Ipc reduced structures #19877

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Sources:

Github labels

Outputs:

Toolchain

Test Spec & Results: ✅ Success; ❌ Failure; 🟠 Queued; 🟡 Progress; ◻️ Skipped; ⚠️ Quarantine

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Memory footprint analysis revealed the following potential issues

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