Skip to content

Commit

Permalink
Pass Vivado vhdl_analyze_order to nvc -a -f directly. Fixes #1098
Browse files Browse the repository at this point in the history
  • Loading branch information
nickg committed Dec 11, 2024
1 parent 72c1b43 commit 72b5e72
Show file tree
Hide file tree
Showing 3 changed files with 22 additions and 23 deletions.
2 changes: 2 additions & 0 deletions NEWS.md
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,8 @@
- Added support for package external names (#1072).
- Fixed parser hang for bit string literals (from @NikLeberg).
- Fixed a crash on an illegal package definition inside an interface.
- Comping the Vivado vendor libraries with `nvc --install vivado` is now
around 2x faster (#1098).
- Several other minor bugs were resolved (#1038, #1057, #1067).

## Version 1.14.2 - 2024-11-23
Expand Down
13 changes: 9 additions & 4 deletions contrib/functions.sh
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ _nvc () {
local _dest=$NVC_INSTALL_DEST
local _opts="--std=${STD:-1993} --work=$_dest/$_work -L$_dest $GLOBAL_OPTS"
[ -d $_dest ] || _safe mkdir -p $_dest
_safe ${NVC:-nvc} $_opts $*
_safe ${NVC:-nvc} $_opts $*
}

analyse () {
Expand All @@ -31,9 +31,14 @@ analyse () {

analyse_list () {
local _work=$1
while read _src; do
WORK=$_work analyse $_src
done
shift
if [ $# -gt 0 ]; then
WORK=$_work _nvc -a $A_OPTS -f $*
else
while read _src; do
WORK=$_work analyse $_src
done
fi
}

git_wrapper () {
Expand Down
30 changes: 11 additions & 19 deletions contrib/install-vivado.sh
Original file line number Diff line number Diff line change
Expand Up @@ -41,23 +41,15 @@ $src/unisims/unisim_VPKG.vhd
$src/unisims/unisim_retarget_VCOMP.vhd
EOF

WORK=unimacro$(std_suffix $STD)
while IFS= read -r line; do
analyse $src/unimacro/$line
done < $src/unimacro/vhdl_analyze_order

WORK=unisim$(std_suffix $STD)
while IFS= read -r line; do
analyse $src/unisims/primitive/$line
done < $src/unisims/primitive/vhdl_analyze_order

WORK=unisim$(std_suffix $STD)
while IFS= read -r line; do
analyse $src/unisims/retarget/$line
done < $src/unisims/retarget/vhdl_analyze_order

WORK=unifast$(std_suffix $STD)
while IFS= read -r line; do
analyse $src/unifast/primitive/$line
done < $src/unifast/primitive/vhdl_analyze_order
cd $src/unimacro
analyse_list unimacro$(std_suffix $STD) vhdl_analyze_order

cd $src/unisims/primitive
analyse_list unisim$(std_suffix $STD) vhdl_analyze_order

cd $src/unisims/retarget
analyse_list unisim$(std_suffix $STD) vhdl_analyze_order

cd $src/unifast/primitive
analyse_list unifast$(std_suffix $STD) vhdl_analyze_order
done

0 comments on commit 72b5e72

Please sign in to comment.