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Expanding Arm32 Support + Bug Fix #1179

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merged 5 commits into from
Nov 26, 2023
Merged

Expanding Arm32 Support + Bug Fix #1179

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0164e00
- ARM32 WIP
tgiphil Nov 23, 2023
f90f118
- ARM32 WIP
tgiphil Nov 24, 2023
a740f05
- ARM32 WIP
tgiphil Nov 25, 2023
30d70c3
- ARM32 WIP
tgiphil Nov 25, 2023
08c495b
Merge branch 'master' of https://github.com/mosa/MOSA-Project into 46…
tgiphil Nov 25, 2023
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40 changes: 20 additions & 20 deletions Source/Data/ARM32-Instructions.json
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Original file line number Diff line number Diff line change
Expand Up @@ -37,19 +37,19 @@
"Description": "Move from processor register to coprocessor",
"OperandDescriptions": [
{
"Result": "ARM source/destination register",
"Operand1": "Coprocessor source/destination register",
"Operand2": "Coprocessor operand register",
"Operand3": "Coprocessor number",
"Operand4": "Coprocessor operation mode",
"Result": "ARM destination register",
"Operand1": "Coprocessor number",
"Operand2": "Coprocessor operation mode",
"Operand3": "Coprocessor operand register",
"Operand4": "Coprocessor source/destination register",
"Operand5": "Coprocessor information"
}
],
"OpcodeEncodingAppend": "",
"OpcodeEncoding": [
{
"Condition": "[register][register][constant][constant][constant]",
"Encoding": "[arm-coprocessor-transfer],s=status:status,l=1,rd=reg4:r,crn=reg4:o1,crm=reg4:o2,cpn=imm4:o3,opcode=imm4:o4,cp=imm4:o5"
"Condition": "[constant][constant][constant][constant][constant]",
"Encoding": "[arm-coprocessor-transfer],s=status:status,l=1,rd=reg4:r,crn=imm4:o2,crm=imm4:o3,cpn=imm4:o4,opcode=imm4:o2,cp=imm4:o5"
}
]
},
Expand All @@ -68,19 +68,19 @@
"Description": "Move from coprocessor to processor register",
"OperandDescriptions": [
{
"Result": "ARM source/destination register",
"Operand1": "Coprocessor source/destination register",
"Operand2": "Coprocessor operand register",
"Operand3": "Coprocessor number",
"Operand4": "Coprocessor operation mode",
"Result": "ARM destination register",
"Operand1": "Coprocessor number",
"Operand2": "Coprocessor operation mode",
"Operand3": "Coprocessor operand register",
"Operand4": "Coprocessor source/destination register",
"Operand5": "Coprocessor information"
}
],
"OpcodeEncodingAppend": "",
"OpcodeEncoding": [
{
"Condition": "[register][register][constant][constant][constant]",
"Encoding": "[arm-coprocessor-transfer],s=status:status,l=0,rd=reg4:r,crn=reg4:o1,crm=reg4:o2,cpn=imm4:o3,opcode=imm4:o4,cp=imm4:o5"
"Condition": "[constant][constant][constant][constant][constant]",
"Encoding": "[arm-coprocessor-transfer],s=status:status,l=0,rd=reg4:r,crn=imm4:o2,crm=imm4:o3,cpn=imm4:o4,opcode=imm4:o2,cp=imm4:o5"
}
]
},
Expand Down Expand Up @@ -1360,13 +1360,13 @@
"FlagsUnchanged": "",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 2,
"OperandCount": 3,
"ResultCount": 0,
"Description": "Block transfer multiple registers from memory",
"OpcodeEncoding": [
{
"Condition": "[register][constant]",
"Encoding": "[arm-block-transfer],p=0,u=updir:status,s=0,w=0,l=1,rn=reg4:o1,list=imm16:o2"
"Condition": "[register][constant][constant]",
"Encoding": "[arm-block-transfer],p=0,u=updir:status,s=imm1:o2,w=0,l=1,rn=reg4:o1,list=imm16:o2"
}
]
},
Expand All @@ -1380,13 +1380,13 @@
"FlagsUnchanged": "",
"FlagsUndefined": "",
"FlagsUsed": "",
"OperandCount": 2,
"OperandCount": 3,
"ResultCount": 0,
"Description": "Block transfer multiple registers to memory",
"OpcodeEncoding": [
{
"Condition": "[register][constant]",
"Encoding": "[arm-block-transfer],p=1,u=updir:status,s=0,w=0,l=0,rn=reg4:o1,list=imm16:o2"
"Condition": "[register][constant][constant]",
"Encoding": "[arm-block-transfer],p=1,u=updir:status,s=imm1:o2,w=0,l=0,rn=reg4:o1,list=imm16:o2"
}
]
},
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Adc.cs
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Expand Up @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(0b0000);
Expand All @@ -48,7 +48,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(0b0101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append12BitImmediate(node.Operand2);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/AdcRegShift.cs
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Expand Up @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Add.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0100);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(0b0000);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(0b0100);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append12BitImmediate(node.Operand2);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/AddRegShift.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0100);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/And.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(0b0000);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append12BitImmediate(node.Operand2);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/AndRegShift.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Asr.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append5BitImmediate(node.Operand2);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Bic.cs
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Expand Up @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1110);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(0b0000);
Expand All @@ -44,7 +44,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(0b1110);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append12BitImmediate(node.Operand2);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/BicRegShift.cs
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Expand Up @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1110);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Eor.cs
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Expand Up @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0001);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(0b0000);
Expand All @@ -48,7 +48,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(0b0001);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append12BitImmediate(node.Operand2);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/EorRegShift.cs
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Expand Up @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b0001);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode);
Expand Down
2 changes: 1 addition & 1 deletion Source/Mosa.Compiler.ARM32/Instructions/Ldf.cs
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Expand Up @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b110);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
10 changes: 5 additions & 5 deletions Source/Mosa.Compiler.ARM32/Instructions/Ldm.cs
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Expand Up @@ -12,22 +12,22 @@ namespace Mosa.Compiler.ARM32.Instructions;
public sealed class Ldm : ARM32Instruction
{
internal Ldm()
: base(0, 2)
: base(0, 3)
{
}

public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
{
System.Diagnostics.Debug.Assert(node.ResultCount == 0);
System.Diagnostics.Debug.Assert(node.OperandCount == 2);
System.Diagnostics.Debug.Assert(node.OperandCount == 3);

if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant)
if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant && node.Operand3.IsConstant)
{
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b100);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1BitImmediate(node.Operand2);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Ldr16.cs
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Expand Up @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Ldr32.cs
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Expand Up @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b01);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand All @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b01);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Ldr8.cs
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Expand Up @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b01);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand All @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b01);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/LdrS16.cs
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Expand Up @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/LdrS8.cs
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Expand Up @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b1);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode));
opcodeEncoder.Append3Bits(0b000);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append1Bit(0b1);
Expand Down
4 changes: 2 additions & 2 deletions Source/Mosa.Compiler.ARM32/Instructions/Lsl.cs
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Expand Up @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode);
Expand All @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder)
opcodeEncoder.Append2Bits(0b00);
opcodeEncoder.Append1Bit(0b0);
opcodeEncoder.Append4Bits(0b1101);
opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0);
opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0);
opcodeEncoder.Append4Bits(0b0000);
opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode);
opcodeEncoder.Append5BitImmediate(node.Operand2);
Expand Down
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