3OP IMUL Fixes

- Fixes 3 Operand IMUL Operations - Unit Tests for IMUL
mbbsemu · Jul 14, 2024 · bf1af5d · bf1af5d
1 parent ac312cc
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diff --git a/MBBSEmu.Tests/CPU/IMUL_Tests.cs b/MBBSEmu.Tests/CPU/IMUL_Tests.cs
@@ -0,0 +1,113 @@
+using Iced.Intel;
+using Xunit;
+using static Iced.Intel.AssemblerRegisters;
+
+namespace MBBSEmu.Tests.CPU
+{
+    public class IMUL_Tests : CpuTestBase
+    {
+        [Theory]
+        [InlineData(1, -1, -1, false, false)]
+        [InlineData(-1, -1, 1, false, false)]
+        [InlineData(-127, -1, 127, false, false)]
+        [InlineData(127, -1, -127, false, false)]
+        public void IMUL_8_R8_Test(sbyte alValue, sbyte valueToMultiply, short expectedValue, bool carryFlag,
+            bool overflowFlag)
+        {
+            Reset();
+            mbbsEmuCpuRegisters.AL = (byte)alValue;
+            mbbsEmuCpuRegisters.BL = (byte)valueToMultiply;
+
+            var instructions = new Assembler(16);
+            instructions.imul(bl);
+            CreateCodeSegment(instructions);
+
+            mbbsEmuCpuCore.Tick();
+
+            //Verify Results
+            Assert.Equal(expectedValue, (sbyte)mbbsEmuCpuRegisters.AL);
+            Assert.Equal(carryFlag, mbbsEmuCpuRegisters.CarryFlag);
+            Assert.Equal(overflowFlag, mbbsEmuCpuRegisters.OverflowFlag);
+        }
+
+        [Theory]
+        [InlineData(1, -1, -1, false, false)]
+        [InlineData(-1, -1, 1, false, false)]
+        [InlineData(-127, -1, 127, false, false)]
+        [InlineData(127, -1, -127, false, false)]
+        [InlineData(short.MaxValue, -1, short.MinValue + 1, false, false)]
+        public void IMUL_16_R16_Test(short axValue, short valueToMultiply, short expectedValue, bool carryFlag,
+            bool overflowFlag)
+        {
+            Reset();
+            mbbsEmuCpuRegisters.AX = (ushort)axValue;
+            mbbsEmuCpuRegisters.BX = (ushort)valueToMultiply;
+
+            var instructions = new Assembler(16);
+            instructions.imul(bx);
+            CreateCodeSegment(instructions);
+
+            mbbsEmuCpuCore.Tick();
+
+            //Verify Results
+            Assert.Equal(expectedValue, (short)mbbsEmuCpuRegisters.AX);
+            Assert.Equal(carryFlag, mbbsEmuCpuRegisters.CarryFlag);
+            Assert.Equal(overflowFlag, mbbsEmuCpuRegisters.OverflowFlag);
+        }
+
+
+        [Theory]
+        [InlineData(1, -1, -1, false, false)]
+        [InlineData(-1, -1, 1, false, false)]
+        [InlineData(-127, -1, 127, false, false)]
+        [InlineData(127, -1, -127, false, false)]
+        [InlineData(short.MaxValue, -1, short.MinValue + 1, false, false)]
+        public void IMUL_16_R16_3OP_Test(short bxValue, short valueToMultiply, short expectedValue, bool carryFlag,
+            bool overflowFlag)
+        {
+            Reset();
+            mbbsEmuCpuRegisters.BX = (ushort)bxValue;
+
+            var instructions = new Assembler(16);
+            //AX = BX * ValueToMultiply
+            instructions.imul(ax, bx, valueToMultiply);
+            CreateCodeSegment(instructions);
+
+            mbbsEmuCpuCore.Tick();
+
+            //Verify Results
+            Assert.Equal(expectedValue, (short)mbbsEmuCpuRegisters.AX);
+            Assert.Equal(carryFlag, mbbsEmuCpuRegisters.CarryFlag);
+            Assert.Equal(overflowFlag, mbbsEmuCpuRegisters.OverflowFlag);
+        }
+
+        [Theory]
+        [InlineData(1, -1, -1, false, false)]
+        [InlineData(-1, -1, 1, false, false)]
+        [InlineData(-127, -1, 127, false, false)]
+        [InlineData(127, -1, -127, false, false)]
+        [InlineData(short.MaxValue, -1, short.MinValue + 1, false, false)]
+        public void IMUL_16_M16_3OP_Test(short memoryValue, short valueToMultiply, short expectedValue, bool carryFlag,
+            bool overflowFlag)
+        {
+            Reset();
+
+            //Setup Memory
+            CreateDataSegment(new byte[ushort.MaxValue]);
+            mbbsEmuMemoryCore.SetWord(2,0, (ushort)memoryValue);
+            mbbsEmuCpuRegisters.DS = 2;
+
+            var instructions = new Assembler(16);
+            //AX == DS:[0] * ValueToMultiply
+            instructions.imul(ax, __word_ptr[0], valueToMultiply);
+            CreateCodeSegment(instructions);
+
+            mbbsEmuCpuCore.Tick();
+
+            //Verify Results
+            Assert.Equal(expectedValue, (short)mbbsEmuCpuRegisters.AX);
+            Assert.Equal(carryFlag, mbbsEmuCpuRegisters.CarryFlag);
+            Assert.Equal(overflowFlag, mbbsEmuCpuRegisters.OverflowFlag);
+        }
+    }
+}
diff --git a/MBBSEmu.Tests/CPU/MUL_Tests.cs b/MBBSEmu.Tests/CPU/MUL_Tests.cs
@@ -1,6 +1,4 @@
 using Iced.Intel;
-using MBBSEmu.CPU;
-using MBBSEmu.Extensions;
 using Xunit;
 using static Iced.Intel.AssemblerRegisters;
 

diff --git a/MBBSEmu/CPU/CPUCore.cs b/MBBSEmu/CPU/CPUCore.cs
@@ -2737,9 +2737,9 @@ private void Op_Imul_3operand()
         {
             var operand2 = _currentOperationSize switch
             {
-                1 => GetOperandValueUInt8(_currentInstruction.Op1Kind, EnumOperandType.Destination),
-                2 => GetOperandValueUInt16(_currentInstruction.Op1Kind, EnumOperandType.Destination),
-                4 => GetOperandValueUInt32(_currentInstruction.Op1Kind, EnumOperandType.Destination),
+                1 => GetOperandValueUInt8(_currentInstruction.Op1Kind, EnumOperandType.Source),
+                2 => GetOperandValueUInt16(_currentInstruction.Op1Kind, EnumOperandType.Source),
+                4 => GetOperandValueUInt32(_currentInstruction.Op1Kind, EnumOperandType.Source),
                 _ => throw new Exception("Unsupported Operation Size")
             };