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@martinjankoehler
martinjankoehler committed Jan 16, 2025
1 parent 6e58a34 commit 5f9088c
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2 changes: 2 additions & 0 deletions allure/223/app.js
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34 changes: 34 additions & 0 deletions allure/223/data/attachments/109b797e1a2ebeb6.txt
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──────────────────────────── Command line arguments ────────────────────────────
/home/runner/work/klayout-pex/klayout-pex/.venv/lib/python3.12/site-packages/pyt
est/__main__.py -m slow --alluredir build/allure-results --color no
───────────────────────────────── Input Layout ─────────────────────────────────
[21:24:16] INFO GDS input file passed, running in LVS mode kpex_cli.py:291
[21:24:16] INFO No explicit top cell specified, using top kpex_cli.py:327
cell
'single_plate_100um_x_100um_li1_over_substra
te'
[21:24:16] INFO LVS input schematic not specified (argument kpex_cli.py:374
--schematic), using dummy schematic
──────────────────────────────── Prepare LVSDB ─────────────────────────────────
[21:24:16] WARNING Cache hit: Reusing cached LVSDB kpex_cli.py:712
/home/runner/work/klayout-pex/klayout-pex/output_sky130A/.kpex_cache/sky130A/hom
e/runner/work/klayout-pex/klayout-pex/testdata/designs/sky130A/test_patterns/sin
gle_plate_100um_x_100um_li1_over_substrate.gds.gz/single_plate_100um_x_100um_li1
_over_substrate.lvsdb.gz
[21:24:16] WARNING Unable to find info about extracted lvsdb_extractor.py:186
LVS layer 'l9'
─────────────────────── Non-empty layers in LVS database ───────────────────────
[21:24:16] INFO (67, 20) -> (li_con) kpex_cli.py:767
───────────────────────────── kpex/2.5D PEX Engine ─────────────────────────────
[21:24:16] INFO (Overlap): li1(PLATE)-VSUBS(VSUBS): extractor.py:295
Unshielded area: 10000.0 µm^2, cap: 369.9
fF
[21:24:16] INFO (Side Overlap): li1(PLATE)-VSUBS(VSUBS) = extractor.py:741
16.279625fF
────────────────── kpex/2.5D extracted netlist (CSV format): ───────────────────
Device;Net1;Net2;Capacitance [fF]
C1;PLATE;VSUBS;386.18
──────────────────────────── Extracted netlist CSV ─────────────────────────────
/home/runner/work/klayout-pex/klayout-pex/output_sky130A/single_plate_100um_x_10
0um_li1_over_substrate__single_plate_100um_x_100um_li1_over_substrate/single_pla
te_100um_x_100um_li1_over_substrate_k25d_pex_netlist.csv
22 changes: 22 additions & 0 deletions allure/223/data/attachments/11a60fb479a66278.txt
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* cell NMOS_DIODE2
.SUBCKT NMOS_DIODE2
* net 1 2
* net 2 1
* net 3 3
* device instance $1 r0 *1 0,0 SKY130_FD_PR__NFET_01V8
M$1 1 2 2 1 SKY130_FD_PR__NFET_01V8 L=0.15U W=0.42U AS=0.126P AD=0.126P
+ PS=1.44U PD=1.44U
* device instance CEXT_2_1 r0 *1 0,0 PEX_CAP
CCEXT_2_1 2 3 1.77445461e-14 PEX_CAP
* device instance CEXT_3_1 r0 *1 0,0 PEX_CAP
CCEXT_3_1 1 3 9.114927e-15 PEX_CAP
* device instance CEXT_1_1 r0 *1 0,0 PEX_CAP
CCEXT_1_1 3 3 6.75208e-15 PEX_CAP
* device instance CEXT_3_2 r0 *1 0,0 PEX_CAP
CCEXT_3_2 1 2 6.48410953e-16 PEX_CAP
* device instance CEXT_4_2 r0 *1 0,0 PEX_CAP
CCEXT_4_2 2 2 5.386948366e-15 PEX_CAP
* device instance CEXT_6_3 r0 *1 0,0 PEX_CAP
CCEXT_6_3 1 1 6.65774249e-16 PEX_CAP
.ENDS NMOS_DIODE2
35 changes: 35 additions & 0 deletions allure/223/data/attachments/133ed116b4094cfa.txt
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[19:57:02] INFO DBU: 0.001 fastercap_model_generator.py:120
[19:57:02] INFO Delaunay b: 0.5 fastercap_model_generator.py:121
[19:57:02] INFO Delaunay area_max: 0.5 fastercap_model_generator.py:122
[19:57:03] INFO Checking … fastercap_model_generator.py:849
[19:57:03] INFO Material nit -> 219 fastercap_model_generator.py:854
triangles
[19:57:03] INFO Material nit2 -> 124 fastercap_model_generator.py:854
triangles
[19:57:03] INFO Net 'Net1' -> 69 triangles fastercap_model_generator.py:859
[19:57:03] INFO Net 'Net2' -> 52 triangles fastercap_model_generator.py:859
[19:57:03] INFO No errors found fastercap_model_generator.py:863
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test1_outside=(void)_inside=nit.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test2_outside=(void)_inside=nit2.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test3_outside=nit2_inside=nit.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test4_outside=(void)_net=Net1.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test5_outside=nit_net=Net1.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test6_outside=(void)_net=Net2.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test7_outside=nit_net=Net2.geo
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\FasterCap\test.lst
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\STL\testdiel_nit.stl
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\STL\testdiel_nit2.stl
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\STL\testcond_Net1.stl
C:\Users\runneradmin\AppData\Local\Temp\pytest-of-runneradmin\pytest-0\test_fas
tercap_model_generator0\STL\testcond_Net2.stl
4 changes: 4 additions & 0 deletions allure/223/data/attachments/14b33f1a8cc0f0d5.csv
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Device;Net1;Net2;Capacitance [fF]
C1;C0;VSUBS;40.642
C2;C1;VSUBS;15.079
C3;C0;C1;0.019 TODO, MAGIC=1.87386 fF
25 changes: 25 additions & 0 deletions allure/223/data/attachments/153d8f4638dc0b10.txt
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* cell nmos_diode2
* pin VDD
* pin VSS
* pin sky130_gnd
.SUBCKT nmos_diode2 1 2 3
* net 1 VDD
* net 2 VSS
* net 3 sky130_gnd
* net 5 FC_GND
* net 6 VSUBS
* net 7 GND
* device instance Cext_0_1 r0 *1 0,0 PEX_CAP
CCext_0_1 6 1 6.37145e-16 PEX_CAP
* device instance Cext_0_2 r0 *1 0,0 PEX_CAP
CCext_0_2 6 2 3.16676e-16 PEX_CAP
* device instance Cext_1_2 r0 *1 0,0 PEX_CAP
CCext_1_2 1 2 9.51584e-16 PEX_CAP
* device instance Cext_1_1 r0 *1 0,0 PEX_CAP
CCext_1_1 1 6 8.74091e-16 PEX_CAP
* device instance Rext_FC_GND_GND r0 *1 0,0 PEX_RES
RRext_FC_GND_GND 5 7 0 PEX_RES
* device instance Rext_VSUBS_GND r0 *1 0,0 PEX_RES
RRext_VSUBS_GND 6 7 0 PEX_RES
.ENDS nmos_diode2
1 change: 1 addition & 0 deletions allure/223/data/attachments/197c5004f636ea4c.txt
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Wrote reduced netlist to: /var/folders/84/5079cppj57s0lzywhyzcxkjc0000gn/T/TOP_Reduced_Netlist_1_og3lz6.cir
17 changes: 17 additions & 0 deletions allure/223/data/attachments/1af88ec8989d112b.json
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{
"added": [],
"changed": [
{
"changes": {
"Capacitance [fF]": [
"0.125 TODO",
"0.125"
]
},
"key": "C3"
}
],
"columns_added": [],
"columns_removed": [],
"removed": []
}
6 changes: 6 additions & 0 deletions allure/223/data/attachments/1b0d87020006df24.txt
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[19:57:02] WARNING Expected capacitor matrix row to have fastcap_runner.py:134
index 3, but obtained 1
[19:57:02] WARNING Expected capacitor matrix row to have fastcap_runner.py:134
index 1, but obtained 3
[19:57:02] WARNING Expected capacitor matrix row to have fastcap_runner.py:134
index 0, but obtained 4
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