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feature: add support for querying simd16 eu per dss
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Related-To: NEO-12012
Signed-off-by: Mateusz Jablonski <[email protected]>
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JablonskiMateusz committed Jul 16, 2024
1 parent 432ecbc commit d5dcdc1
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Showing 4 changed files with 75 additions and 3 deletions.
12 changes: 10 additions & 2 deletions shared/source/os_interface/linux/xe/ioctl_helper_xe.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -464,6 +464,7 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
StackVec<std::vector<std::bitset<8>>, 2> geomDss;
StackVec<std::vector<std::bitset<8>>, 2> computeDss;
StackVec<std::vector<std::bitset<8>>, 2> euDss;
StackVec<std::vector<std::bitset<8>>, 2> simd16EuDss;

auto topologySize = queryGtTopology.size();
auto dataPtr = queryGtTopology.data();
Expand All @@ -472,8 +473,10 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
geomDss.resize(numTiles);
computeDss.resize(numTiles);
euDss.resize(numTiles);
simd16EuDss.resize(numTiles);
bool receivedDssInfo = false;
bool receivedEuPerDssInfo = false;
bool receivedSimd16EuPerDssInfo = false;
while (topologySize >= sizeof(drm_xe_query_topology_mask)) {
drm_xe_query_topology_mask *topo = reinterpret_cast<drm_xe_query_topology_mask *>(dataPtr);
UNRECOVERABLE_IF(topo == nullptr);
Expand All @@ -495,6 +498,10 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
fillMask(euDss[tileId], topo);
receivedEuPerDssInfo = true;
break;
case DRM_XE_TOPO_SIMD16_EU_PER_DSS:
fillMask(simd16EuDss[tileId], topo);
receivedSimd16EuPerDssInfo = true;
break;
default:
xeLog("Unhandle GT Topo type: %d\n", topo->type);
}
Expand All @@ -504,9 +511,10 @@ bool IoctlHelperXe::getTopologyDataAndMap(const HardwareInfo &hwInfo, DrmQueryTo
topologySize -= itemSize;
dataPtr = ptrOffset(dataPtr, itemSize);
}

receivedEuPerDssInfo |= receivedSimd16EuPerDssInfo;
bool isComputeDssEmpty = false;
getTopologyData(numTiles, geomDss.begin(), computeDss.begin(), euDss.begin(), topologyData, isComputeDssEmpty);
std::vector<std::bitset<8>> *euDssVector = receivedSimd16EuPerDssInfo ? simd16EuDss.begin() : euDss.begin();
getTopologyData(numTiles, geomDss.begin(), computeDss.begin(), euDssVector, topologyData, isComputeDssEmpty);

auto &dssInfo = isComputeDssEmpty ? geomDss : computeDss;
getTopologyMap(numTiles, dssInfo.begin(), topologyMap);
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Original file line number Diff line number Diff line change
Expand Up @@ -835,6 +835,61 @@ TEST(IoctlHelperXeTest, givenComputeDssWhenGetTopologyDataAndMapThenResultsAreCo
}
}

TEST(IoctlHelperXeTest, givenSimd16EuPerDssAndEuPerDssWhenGetTopologyDataAndMapThenPreferSimd16EuPerDss) {

auto executionEnvironment = std::make_unique<MockExecutionEnvironment>();
auto drm = DrmMockXe::create(*executionEnvironment->rootDeviceEnvironments[0]);
auto xeIoctlHelper = static_cast<MockIoctlHelperXe *>(drm->getIoctlHelper());
auto &hwInfo = *executionEnvironment->rootDeviceEnvironments[0]->getHardwareInfo();
xeIoctlHelper->initialize();

uint16_t tileId = 0;
for (auto gtId = 0u; gtId < 4u; gtId++) {
drm->addMockedQueryTopologyData(gtId, DRM_XE_TOPO_DSS_GEOMETRY, 8, {0, 0, 0, 0, 0, 0, 0, 0});
drm->addMockedQueryTopologyData(gtId, DRM_XE_TOPO_DSS_COMPUTE, 8, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff});
drm->addMockedQueryTopologyData(gtId, DRM_XE_TOPO_EU_PER_DSS, 8, {0b1111'1111, 0, 0, 0, 0, 0, 0, 0});
drm->addMockedQueryTopologyData(gtId, DRM_XE_TOPO_SIMD16_EU_PER_DSS, 8, {0b1111, 0, 0, 0, 0, 0, 0, 0});
}

DrmQueryTopologyData topologyData{};
TopologyMap topologyMap{};

auto result = xeIoctlHelper->getTopologyDataAndMap(hwInfo, topologyData, topologyMap);
ASSERT_TRUE(result);

// verify topology data
EXPECT_EQ(1, topologyData.sliceCount);
EXPECT_EQ(1, topologyData.maxSliceCount);

EXPECT_EQ(64, topologyData.subSliceCount);
EXPECT_EQ(64, topologyData.maxSubSliceCount);

EXPECT_EQ(256, topologyData.euCount);
EXPECT_EQ(4, topologyData.maxEuPerSubSlice);

// verify topology map
std::vector<int> expectedSliceIndices = {0};
ASSERT_EQ(expectedSliceIndices.size(), topologyMap[tileId].sliceIndices.size());
ASSERT_TRUE(topologyMap[tileId].sliceIndices.size() > 0);

for (auto i = 0u; i < expectedSliceIndices.size(); i++) {
EXPECT_EQ(expectedSliceIndices[i], topologyMap[tileId].sliceIndices[i]);
}

std::vector<int> expectedSubSliceIndices;
expectedSubSliceIndices.reserve(64u);
for (auto i = 0u; i < 64; i++) {
expectedSubSliceIndices.emplace_back(i);
}

ASSERT_EQ(expectedSubSliceIndices.size(), topologyMap[tileId].subsliceIndices.size());
ASSERT_TRUE(topologyMap[tileId].subsliceIndices.size() > 0);

for (auto i = 0u; i < expectedSubSliceIndices.size(); i++) {
EXPECT_EQ(expectedSubSliceIndices[i], topologyMap[tileId].subsliceIndices[i]);
}
}

TEST(IoctlHelperXeTest, givenOnlyMediaTypeWhenGetTopologyDataAndMapThenSubsliceIndicesNotSet) {

auto executionEnvironment = std::make_unique<MockExecutionEnvironment>();
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1 change: 1 addition & 0 deletions third_party/uapi/xe/.version
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
patch: https://lore.kernel.org/intel-xe/[email protected]/
10 changes: 9 additions & 1 deletion third_party/uapi/xe/xe_drm.h
Original file line number Diff line number Diff line change
Expand Up @@ -504,7 +504,14 @@ struct drm_xe_query_gt_list {
* available per Dual Sub Slices (DSS). For example a query response
* containing the following in mask:
* ``EU_PER_DSS ff ff 00 00 00 00 00 00``
* means each DSS has 16 EU.
* means each DSS has 16 SIMD8 EUs. This type may be omitted if device
* doesn't have SIMD8 EUs.
* - %DRM_XE_TOPO_SIMD16_EU_PER_DSS - To query the mask of SIMD16 Execution
* Units (EU) available per Dual Sub Slices (DSS). For example a query
* response containing the following in mask:
* ``SIMD16_EU_PER_DSS ff ff 00 00 00 00 00 00``
* means each DSS has 16 SIMD16 EUs. This type may be omitted if device
* doesn't have SIMD16 EUs.
*/
struct drm_xe_query_topology_mask {
/** @gt_id: GT ID the mask is associated with */
Expand All @@ -513,6 +520,7 @@ struct drm_xe_query_topology_mask {
#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
#define DRM_XE_TOPO_SIMD16_EU_PER_DSS 5
/** @type: type of mask */
__u16 type;

Expand Down

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