Skip to content

Commit

Permalink
use sv2v to convert to verilog for #24
Browse files Browse the repository at this point in the history
  • Loading branch information
sameer committed Apr 2, 2021
1 parent 803c939 commit 0f81876
Show file tree
Hide file tree
Showing 22 changed files with 1,047 additions and 1,422 deletions.
20 changes: 10 additions & 10 deletions src/Manifest.py
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
files = [
"hdmi.sv",
"tmds_channel.sv",
"packet_assembler.sv",
"packet_picker.sv",
"serializer.sv",
"auxiliary_video_information_info_frame.sv",
"source_product_description_info_frame.sv",
"audio_clock_regeneration_packet.sv",
"audio_info_frame.sv",
"audio_sample_packet.sv"
"hdmi.v",
"tmds_channel.v",
"packet_assembler.v",
"packet_picker.v",
"serializer.v",
"auxiliary_video_information_info_frame.v",
"source_product_description_info_frame.v",
"audio_clock_regeneration_packet.v",
"audio_info_frame.v",
"audio_sample_packet.v"
]
73 changes: 0 additions & 73 deletions src/audio_clock_regeneration_packet.sv

This file was deleted.

72 changes: 72 additions & 0 deletions src/audio_clock_regeneration_packet.v
Original file line number Diff line number Diff line change
@@ -0,0 +1,72 @@
module audio_clock_regeneration_packet (
clk_pixel,
clk_audio,
clk_audio_counter_wrap,
header,
sub
);
parameter real VIDEO_RATE = 25.2E6;
parameter signed [31:0] AUDIO_RATE = 48e3;
input wire clk_pixel;
input wire clk_audio;
output reg clk_audio_counter_wrap = 0;
output wire [23:0] header;
output wire [223:0] sub;
function automatic signed [19:0] sv2v_cast_20_signed;
input reg signed [19:0] inp;
sv2v_cast_20_signed = inp;
endfunction
localparam [19:0] N = ((AUDIO_RATE % 125) == 0 ? sv2v_cast_20_signed((16 * AUDIO_RATE) / 125) : ((AUDIO_RATE % 225) == 0 ? sv2v_cast_20_signed((196 * AUDIO_RATE) / 225) : sv2v_cast_20_signed((AUDIO_RATE * 16) / 125)));
localparam signed [31:0] CLK_AUDIO_COUNTER_WIDTH = $clog2(N / 128);
function automatic [CLK_AUDIO_COUNTER_WIDTH - 1:0] sv2v_cast_C4DBD;
input reg [CLK_AUDIO_COUNTER_WIDTH - 1:0] inp;
sv2v_cast_C4DBD = inp;
endfunction
localparam [CLK_AUDIO_COUNTER_WIDTH - 1:0] CLK_AUDIO_COUNTER_END = sv2v_cast_C4DBD((N / 128) - 1);
function automatic signed [CLK_AUDIO_COUNTER_WIDTH - 1:0] sv2v_cast_C4DBD_signed;
input reg signed [CLK_AUDIO_COUNTER_WIDTH - 1:0] inp;
sv2v_cast_C4DBD_signed = inp;
endfunction
reg [CLK_AUDIO_COUNTER_WIDTH - 1:0] clk_audio_counter = sv2v_cast_C4DBD_signed(0);
reg internal_clk_audio_counter_wrap = 1'd0;
always @(posedge clk_audio)
if (clk_audio_counter == CLK_AUDIO_COUNTER_END) begin
clk_audio_counter <= sv2v_cast_C4DBD_signed(0);
internal_clk_audio_counter_wrap <= !internal_clk_audio_counter_wrap;
end
else
clk_audio_counter <= clk_audio_counter + 1'd1;
reg [1:0] clk_audio_counter_wrap_synchronizer_chain = 2'd0;
always @(posedge clk_pixel) clk_audio_counter_wrap_synchronizer_chain <= {internal_clk_audio_counter_wrap, clk_audio_counter_wrap_synchronizer_chain[1]};
function automatic signed [31:0] sv2v_cast_32_signed;
input reg signed [31:0] inp;
sv2v_cast_32_signed = inp;
endfunction
localparam [19:0] CYCLE_TIME_STAMP_COUNTER_IDEAL = sv2v_cast_20_signed(sv2v_cast_32_signed(((VIDEO_RATE * sv2v_cast_32_signed(N)) / 128) / AUDIO_RATE));
localparam signed [31:0] CYCLE_TIME_STAMP_COUNTER_WIDTH = $clog2(sv2v_cast_20_signed(sv2v_cast_32_signed(CYCLE_TIME_STAMP_COUNTER_IDEAL * 1.1)));
reg [19:0] cycle_time_stamp = 20'd0;
function automatic signed [CYCLE_TIME_STAMP_COUNTER_WIDTH - 1:0] sv2v_cast_EFA8E_signed;
input reg signed [CYCLE_TIME_STAMP_COUNTER_WIDTH - 1:0] inp;
sv2v_cast_EFA8E_signed = inp;
endfunction
reg [CYCLE_TIME_STAMP_COUNTER_WIDTH - 1:0] cycle_time_stamp_counter = sv2v_cast_EFA8E_signed(0);
function automatic signed [(20 - CYCLE_TIME_STAMP_COUNTER_WIDTH) - 1:0] sv2v_cast_66F15_signed;
input reg signed [(20 - CYCLE_TIME_STAMP_COUNTER_WIDTH) - 1:0] inp;
sv2v_cast_66F15_signed = inp;
endfunction
always @(posedge clk_pixel)
if (clk_audio_counter_wrap_synchronizer_chain[1] ^ clk_audio_counter_wrap_synchronizer_chain[0]) begin
cycle_time_stamp_counter <= sv2v_cast_EFA8E_signed(0);
cycle_time_stamp <= {sv2v_cast_66F15_signed(0), cycle_time_stamp_counter + sv2v_cast_EFA8E_signed(1)};
clk_audio_counter_wrap <= !clk_audio_counter_wrap;
end
else
cycle_time_stamp_counter <= cycle_time_stamp_counter + sv2v_cast_EFA8E_signed(1);
assign header = 24'bxxxxxxxxxxxxxxxx00000001;
genvar i;
generate
for (i = 0; i < 4; i = i + 1) begin : same_packet
assign sub[i * 56+:56] = {N[7:0], N[15:8], {4'd0, N[19:16]}, cycle_time_stamp[7:0], cycle_time_stamp[15:8], {4'd0, cycle_time_stamp[19:16]}, 8'd0};
end
endgenerate
endmodule
53 changes: 0 additions & 53 deletions src/audio_info_frame.sv

This file was deleted.

35 changes: 35 additions & 0 deletions src/audio_info_frame.v
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
module audio_info_frame (
header,
sub
);
parameter [2:0] AUDIO_CHANNEL_COUNT = 3'd1;
parameter [7:0] CHANNEL_ALLOCATION = 8'h00;
parameter [0:0] DOWN_MIX_INHIBITED = 1'b0;
parameter [3:0] LEVEL_SHIFT_VALUE = 4'd0;
parameter [1:0] LOW_FREQUENCY_EFFECTS_PLAYBACK_LEVEL = 2'b00;
output wire [23:0] header;
output wire [223:0] sub;
localparam [3:0] AUDIO_CODING_TYPE = 4'd0;
localparam [2:0] SAMPLING_FREQUENCY = 3'd0;
localparam [1:0] SAMPLE_SIZE = 2'd0;
localparam [4:0] LENGTH = 5'd10;
localparam [7:0] VERSION = 8'd1;
localparam [6:0] TYPE = 7'd4;
assign header = {{3'b000, LENGTH}, VERSION, {1'b1, TYPE}};
wire [7:0] packet_bytes [27:0];
assign packet_bytes[0] = 8'd1 + ~(((((((header[23:16] + header[15:8]) + header[7:0]) + packet_bytes[5]) + packet_bytes[4]) + packet_bytes[3]) + packet_bytes[2]) + packet_bytes[1]);
assign packet_bytes[1] = {AUDIO_CODING_TYPE, 1'b0, AUDIO_CHANNEL_COUNT};
assign packet_bytes[2] = {3'd0, SAMPLING_FREQUENCY, SAMPLE_SIZE};
assign packet_bytes[3] = 8'd0;
assign packet_bytes[4] = CHANNEL_ALLOCATION;
assign packet_bytes[5] = {DOWN_MIX_INHIBITED, LEVEL_SHIFT_VALUE, 1'b0, LOW_FREQUENCY_EFFECTS_PLAYBACK_LEVEL};
genvar i;
generate
for (i = 6; i < 28; i = i + 1) begin : pb_reserved
assign packet_bytes[i] = 8'd0;
end
for (i = 0; i < 4; i = i + 1) begin : pb_to_sub
assign sub[i * 56+:56] = {packet_bytes[6 + (i * 7)], packet_bytes[5 + (i * 7)], packet_bytes[4 + (i * 7)], packet_bytes[3 + (i * 7)], packet_bytes[2 + (i * 7)], packet_bytes[1 + (i * 7)], packet_bytes[i * 7]};
end
endgenerate
endmodule
109 changes: 0 additions & 109 deletions src/audio_sample_packet.sv

This file was deleted.

Loading

0 comments on commit 0f81876

Please sign in to comment.