Add ARMv8.x feature flags

halide.cmake

@@ -515,6 +515,7 @@ function(_halide_runtime_target_name HALIDE_TARGET OUTVAR)
         wasm_signext
         sve
         sve2
+        armv83a
       )
     # Synthesize a one-or-two-char abbreviation based on the feature's position
     # in the KNOWN_FEATURES list.

python_bindings/src/PyEnums.cpp

@@ -150,6 +150,7 @@ void define_enums(py::module &m) {
         .value("WasmSignExt", Target::Feature::WasmSignExt)
         .value("SVE", Target::Feature::SVE)
         .value("SVE2", Target::Feature::SVE2)
+        .value("ARMv83a", Target::Feature::ARMv83a)
         .value("FeatureEnd", Target::Feature::FeatureEnd);
 
     py::enum_<halide_type_code_t>(m, "TypeCode")

src/CodeGen_ARM.cpp

@@ -1017,7 +1017,14 @@ string CodeGen_ARM::mcpu() const {
         }
     } else {
         if (target.os == Target::IOS) {
-            return "cyclone";
+            if (target.has_feature(Target::ARMv83a)) {
+                // TODO: we can assume at least Apple A12 (Vortex/Tempest),
+                // but LLVM doesn't seem to have specialzations for those yet.
+                // Continue using 'cyclone' for now.
+                return "cyclone";
+            } else {
+                return "cyclone";  // aka Apple A7
+            }
         } else {
             return "generic";
         }
@@ -1037,17 +1044,28 @@ string CodeGen_ARM::mattrs() const {
     } else {
         // TODO: Should Halide's SVE flags be 64-bit only?
         string arch_flags;
+        string separator;
         if (target.has_feature(Target::SVE2)) {
-            arch_flags = "+sve2";
+            arch_flags += "+sve2";
+            separator = ",";
         } else if (target.has_feature(Target::SVE)) {
-            arch_flags = "+sve";
+            arch_flags += "+sve";
+            separator = ",";
+        }
+        if (target.has_feature(Target::ARMv83a)) {
+#if LLVM_VERSION >= 100
+            arch_flags += separator + "+v8.3a";
+            separator = ",";
+#else
+            user_warning << "ARMv83a support requires LLVM 10.0+; this feature will be ignored";
+#endif
         }
 
         if (target.os == Target::IOS || target.os == Target::OSX) {
-            return arch_flags + "+reserve-x18";
-        } else {
-            return arch_flags;
+            arch_flags += separator + "+reserve-x18";
+            separator = ",";
         }
+        return arch_flags;
     }
 }
 

src/LLVM_Output.cpp

@@ -325,7 +325,7 @@ std::unique_ptr<llvm::Module> clone_module(const llvm::Module &module_in) {
 
 }  // namespace
 
-void emit_file(const llvm::Module &module_in, Internal::LLVMOStream &out, 
+void emit_file(const llvm::Module &module_in, Internal::LLVMOStream &out,
 #if LLVM_VERSION >= 100
                 llvm::CodeGenFileType file_type
 #else

src/Target.cpp

@@ -369,6 +369,7 @@ const std::map<std::string, Target::Feature> feature_name_map = {
     {"wasm_signext", Target::WasmSignExt},
     {"sve", Target::SVE},
     {"sve2", Target::SVE2},
+    {"armv83a", Target::ARMv83a},
     // NOTE: When adding features to this map, be sure to update
     // PyEnums.cpp and halide.cmake as well.
 };
@@ -880,7 +881,7 @@ bool Target::get_runtime_compatible_target(const Target &other, Target &result)
                                                      CUDACapability30, CUDACapability32, CUDACapability35, CUDACapability50, CUDACapability61,
                                                      HVX_v62, HVX_v65, HVX_v66}};
 
-    const std::array<Feature, 12> intersection_features = {{SSE41, AVX, AVX2, FMA, FMA4, F16C, ARMv7s, VSX, AVX512, AVX512_KNL, AVX512_Skylake, AVX512_Cannonlake}};
+    const std::array<Feature, 13> intersection_features = {{SSE41, AVX, AVX2, FMA, FMA4, F16C, ARMv7s, ARMv83a, VSX, AVX512, AVX512_KNL, AVX512_Skylake, AVX512_Cannonlake}};
 
     const std::array<Feature, 10> matching_features = {{SoftFloatABI, Debug, TSAN, ASAN, MSAN, HVX_64, HVX_128, MinGW, HexagonDma, HVX_shared_object}};
 

src/Target.h

@@ -123,6 +123,7 @@ struct Target {
         WasmSignExt = halide_target_feature_wasm_signext,
         SVE = halide_target_feature_sve,
         SVE2 = halide_target_feature_sve2,
+        ARMv83a = halide_target_feature_armv83a,
         FeatureEnd = halide_target_feature_end
     };
     Target()

src/runtime/HalideRuntime.h

@@ -1330,6 +1330,7 @@ typedef enum halide_target_feature_t {
     halide_target_feature_sve, ///< Enable ARM Scalable Vector Extensions
     halide_target_feature_sve2, ///< Enable ARM Scalable Vector Extensions v2
     halide_target_feature_egl,            ///< Force use of EGL support.
+    halide_target_feature_armv83a,  ///< Generate code for ARMv8.3a. Only relevant for 64-bit ARM.
 
     halide_target_feature_end ///< A sentinel. Every target is considered to have this feature, and setting this feature does nothing.
 } halide_target_feature_t;

test/correctness/cross_compilation.cpp

@@ -21,6 +21,7 @@ int main(int argc, char **argv) {
         "arm-32-linux",
         "arm-64-android",
         "arm-64-ios",
+        "arm-64-ios-armv83a",
         "arm-64-linux",
         "x86-32-linux",
         "x86-32-osx",

test/correctness/simd_op_check.h

@@ -76,7 +76,7 @@ class SimdOpCheckTest {
                     Target::AVX2, Target::AVX512,
                     Target::FMA, Target::FMA4, Target::F16C,
                     Target::VSX, Target::POWER_ARCH_2_07,
-                    Target::ARMv7s, Target::NoNEON, Target::MinGW,
+                    Target::ARMv7s, Target::ARMv83a, Target::NoNEON, Target::MinGW,
                     Target::WasmSimd128}) {
             if (target.has_feature(f) != host_target.has_feature(f)) {
                 can_run_the_code = false;