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v4.10.0
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v4.10.0
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@HailoRT-Automation
HailoRT-Automation authored Sep 28, 2022
1 parent 8295c06 commit d61a3bc
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8 changes: 7 additions & 1 deletion CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,11 @@ option(HAILO_BUILD_GSTREAMER "Compile gstreamer plugins" OFF)
option(HAILO_BUILD_EXAMPLES "Build examples" OFF)
option(HAILO_OFFLINE_COMPILATION "Don't download external dependencies" OFF)
option(HAILO_MICROPROFILE "Microprofile code" OFF)
option(HAILO_BUILD_SERVICE "Build hailort service" OFF)

if(WIN32 AND ${HAILO_BUILD_SERVICE})
message(FATAL_ERROR "HailoRT service is not supported on Windows")
endif()

find_program(CCACHE_PROGRAM ccache)
if(CCACHE_PROGRAM)
Expand Down Expand Up @@ -51,7 +56,8 @@ elseif(UNIX)
set(HAILORT_COMPILE_OPTIONS ${HAILORT_COMPILE_OPTIONS} -Werror -Wall -Wextra
# TODO: remove me warnings
-Wno-conversion
-Wno-deprecated-declarations
-Wno-deprecated-declarations # On c structures with deprecated attribute, clang generates implicit move ctor
# that causes a warning
-Wno-inconsistent-missing-override
)
else()
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2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -23,6 +23,8 @@ HailoRT supports Linux and Windows, and can be compiled from sources to be integ

See [**hailo.ai developer zone documentation**](https://hailo.ai/developer-zone/documentation/hailort/latest/) (registration is required for full documentation access).

For HailoRT API examples - see [**HailoRT examples**](https://github.com/hailo-ai/hailort/tree/master/hailort/libhailort/examples).

## Changelog

See [**hailo.ai developer zone - HailoRT changelog**](https://hailo.ai/developer-zone/documentation/hailort/latest/?sp_referrer=changelog/changelog.html) (registration required).
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3 changes: 2 additions & 1 deletion common/config_definitions.json
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Expand Up @@ -45,7 +45,8 @@
"temperature_orange_threshold": {"size": 1, "deserialize_as": "int"},
"temperature_orange_hysteresis_threshold": {"size": 1, "deserialize_as": "int"},
"temperature_throttling_enable": {"size": 1, "deserialize_as": "bool"},
"overcurrent_monitoring_orange_threshold_enable": {"size": 1, "deserialize_as": "bool"}
"deprecated__overcurrent_monitoring_orange_threshold_enable": {"size": 1, "deserialize_as": "bool"},
"overcurrent_throttling_enable": {"size": 1, "deserialize_as": "bool"}
}
},
"control":
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2 changes: 1 addition & 1 deletion common/config_schema.json
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Expand Up @@ -44,7 +44,7 @@
"temperature_red_hysteresis_threshold": {"$ref": "#/definitions/int8_t"},
"temperature_orange_threshold": {"$ref": "#/definitions/int8_t"},
"temperature_orange_hysteresis_threshold": {"$ref": "#/definitions/int8_t"},
"overcurrent_monitoring_orange_threshold_enable": {"type": "boolean"}
"deprecated__overcurrent_monitoring_orange_threshold_enable": {"type": "boolean"}
}
},
"control":
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75 changes: 49 additions & 26 deletions common/include/context_switch_defs.h
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Expand Up @@ -40,6 +40,20 @@ extern "C" {
(((cluster_index) << CONTEXT_SWITCH_DEFS__PACKED_LCU_ID_CLUSTER_INDEX_SHIFT) & CONTEXT_SWITCH_DEFS__PACKED_LCU_ID_CLUSTER_INDEX_MASK)


#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__VDMA_CHANNEL_INDEX_MASK (0x1f)
#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_MASK (0x60)
#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT (5)

#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__SET(dst, engine_index, vdma_channel_index) do { \
(dst) = (vdma_channel_index) | ((engine_index) << CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT);\
} while (0)

#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__READ(src, engine_index, vdma_channel_index) do {\
(engine_index) = ((src) & CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_MASK) >> \
CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT; \
(vdma_channel_index) = ((src) & CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__VDMA_CHANNEL_INDEX_MASK); \
} while (0)

#pragma pack(push, 1)
typedef struct {
uint16_t core_bytes_per_buffer;
Expand Down Expand Up @@ -86,6 +100,7 @@ typedef enum __attribute__((packed)) {
CONTEXT_SWITCH_DEFS__ACTION_TYPE_FETCH_CCW_BURSTS,
CONTEXT_SWITCH_DEFS__ACTION_TYPE_VALIDATE_VDMA_CHANNEL,
CONTEXT_SWITCH_DEFS__ACTION_TYPE_BURST_CREDITS_TASK_START,
CONTEXT_SWITCH_DEFS__ACTION_TYPE_DDR_BUFFERING_RESET,

/* Must be last */
CONTEXT_SWITCH_DEFS__ACTION_TYPE_COUNT
Expand Down Expand Up @@ -141,12 +156,12 @@ typedef struct {

typedef struct {
uint16_t descriptors_count;
uint8_t cfg_channel_number;
uint8_t packed_vdma_channel_id;
} CONTEXT_SWITCH_DEFS__fetch_cfg_channel_descriptors_action_data_t;

typedef struct {
uint16_t ccw_bursts;
uint8_t cfg_channel_number;
uint8_t config_stream_index;
} CONTEXT_SWITCH_DEFS__fetch_ccw_bursts_action_data_t;

typedef struct {
Expand All @@ -172,15 +187,15 @@ typedef struct {
} CONTEXT_SWITCH_DEFS__disable_lcu_action_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
uint8_t edge_layer_direction;
bool is_inter_context;
uint8_t host_buffer_type; // CONTROL_PROTOCOL__HOST_BUFFER_TYPE_t
uint32_t initial_credit_size;
} CONTEXT_SWITCH_DEFS__deactivate_vdma_channel_action_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
uint8_t edge_layer_direction;
bool is_inter_context;
bool is_single_context_network_group;
Expand All @@ -189,7 +204,7 @@ typedef struct {
} CONTEXT_SWITCH_DEFS__validate_vdma_channel_action_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t network_index;
uint32_t frame_periph_size;
Expand All @@ -199,14 +214,14 @@ typedef struct {
} CONTEXT_SWITCH_DEFS__fetch_data_action_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
bool is_dummy_stream;
} CONTEXT_SWITCH_DEFS__change_vdma_to_stream_mapping_data_t;

typedef struct {
uint8_t h2d_vdma_channel_index;
uint8_t d2h_vdma_channel_index;
uint8_t h2d_packed_vdma_channel_id;
uint8_t d2h_packed_vdma_channel_id;
uint8_t network_index;
uint32_t descriptors_per_frame;
uint16_t programmed_descriptors_count;
Expand All @@ -218,7 +233,7 @@ typedef struct {
} CONTEXT_SWITCH_DEFS__lcu_interrupt_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
} CONTEXT_SWITCH_DEFS__vdma_dataflow_interrupt_data_t;

typedef struct {
Expand All @@ -235,7 +250,7 @@ typedef struct {
} CONTEXT_SWITCH_DEFS__wait_nms_idle_data_t;

typedef struct {
uint8_t vdma_channel_index;
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
bool is_inter_context;
} CONTEXT_SWITCH_DEFS__wait_dma_idle_data_t;
Expand All @@ -250,65 +265,73 @@ typedef struct {

/* edge layers structs */
typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
uint32_t initial_credit_size;
bool is_single_context_app;
} CONTEXT_SWITCH_DEFS__activate_boundary_input_data_t;

typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
uint8_t network_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
uint32_t initial_credit_size;
} CONTEXT_SWITCH_DEFS__activate_inter_context_input_data_t;

typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
uint64_t host_descriptors_base_address;
uint8_t desc_list_depth;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
uint32_t initial_credit_size;
uint8_t connected_d2h_packed_vdma_channel_id;
} CONTEXT_SWITCH_DEFS__activate_ddr_buffer_input_data_t;

typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
uint32_t frame_credits_in_bytes;
uint16_t desc_page_size;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
} CONTEXT_SWITCH_DEFS__activate_boundary_output_data_t;

typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
uint8_t network_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
} CONTEXT_SWITCH_DEFS__activate_inter_context_output_data_t;

typedef struct {
uint8_t packed_vdma_channel_id;
uint8_t stream_index;
uint8_t vdma_channel_index;
CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
uint32_t frame_credits_in_bytes;
uint64_t host_descriptors_base_address;
uint16_t desc_page_size;
uint8_t desc_list_depth;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
uint32_t buffered_rows_count;
} CONTEXT_SWITCH_DEFS__activate_ddr_buffer_output_data_t;

typedef union {
CONTEXT_SWITCH_DEFS__activate_boundary_input_data_t activate_boundary_input_data;
CONTEXT_SWITCH_DEFS__activate_inter_context_input_data_t activate_inter_context_input_data;
CONTEXT_SWITCH_DEFS__activate_ddr_buffer_input_data_t activate_ddr_buffer_input_data;
CONTEXT_SWITCH_DEFS__activate_boundary_output_data_t activate_boundary_output_data;
CONTEXT_SWITCH_DEFS__activate_inter_context_output_data_t activate_inter_context_output_data;
CONTEXT_SWITCH_DEFS__activate_ddr_buffer_output_data_t activate_ddr_buffer_output_data;
} CONTEXT_SWITCH_COMMON__activate_edge_layer_action_t;

typedef struct {
uint8_t channel_index;
uint8_t packed_vdma_channel_id;
uint8_t config_stream_index;
CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
} CONTEXT_SWITCH_DEFS__activate_cfg_channel_t;

typedef struct {
uint8_t channel_index;
uint8_t packed_vdma_channel_id;
uint8_t config_stream_index;
} CONTEXT_SWITCH_DEFS__deactivate_cfg_channel_t;

#pragma pack(pop)
Expand Down
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