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Support -mpcu flag and autodetect to trigger vectorization on proper vector lengths #588
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It will be reused in another location in the next commit.
We are now on trunk this was leftover from Tapir days.
This commit introduces a --llvm_dump_asm flag and the corresponding --llvm_dump_asm_options to emit assembly to LOG(INFO)
This commit adds the --mcpu flag to TC so we can emit LLVM and asm for different architectures.
This commit introduces and uses cpuid information to pass the proper llc `mcpu` flag.
This commit passes proper llvm::TargetMachine information in llvm_jit and codegen_llvm by introducing a proper TargetMachine at the LLVMJit level and avoids introducing adhoc objects. The TargetMachine is constructed either from the `--mcpu` flag if passed or from the `cpuid` information. As a consequence of all this, one can now emit AVX2 and AVX512 code. Before this commit, the TargetMachine was essentially a default one and only AVX code would be generated. To test and see it one can run with: ``` cd build && \ make -j 16 test_mapper_llvm && \ ./test/test_mapper_llvm --logtostderr=1 --llvm_dump_asm=1 --llvm_dump_after_opt=1 --llvm_dump_before_opt=1 --gtest_filter="*Batch*" --mcpu=skylake ``` Of course if one forces a more fancy architecture than one has, illegal instructions will likely be generated but at least the asm will be printed properly.
This commit avoids leaking all the guts of LLVMCodegen to the emitLLVMKernel function and restructures some code.
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This PR passes proper llvm::TargetMachine information in
llvm_jit and codegen_llvm by introducing a proper TargetMachine
at the LLVMJit level and avoids introducing adhoc objects.
The TargetMachine is constructed either from the
--mcpuflag ifpassed or from the
cpuidinformation.As a consequence of all this, one can now emit AVX2 and AVX512 code.
Before this commit, the TargetMachine was essentially a default one
and only AVX code would be generated.
To test and see it one can run with:
Of course if one forces a more fancy architecture than one has,
illegal instructions will likely be generated but at least the asm
will be printed properly.