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November 9, 2023 12:07 27m 42s
Merge pull request #1833 from trabucayre/tangMega138k
ci #2663: Commit d2441c6 pushed by enjoy-digital
November 9, 2023 10:49 1h 42m 39s master
November 9, 2023 10:49 1h 42m 39s
integration/soc/bus_addressing_converter: Handle missing cases.
ci #2662: Commit f9dc8e8 pushed by enjoy-digital
November 9, 2023 10:48 1h 57m 3s master
November 9, 2023 10:48 1h 57m 3s
Tang mega138k
ci #2661: Pull request #1833 opened by trabucayre
November 9, 2023 10:46 1h 42m 34s trabucayre:tangMega138k
November 9, 2023 10:46 1h 42m 34s
November 9, 2023 09:29 1h 52m 6s
November 9, 2023 09:22 1h 57m 5s
November 9, 2023 08:56 27m 56s
November 9, 2023 06:07 26m 9s
gen/fhdl/verilog: Ensure top is not None to build hierarchy.
ci #2656: Commit 4610713 pushed by enjoy-digital
November 8, 2023 15:58 31m 51s master
November 8, 2023 15:58 31m 51s
Merge pull request #1829 from enjoy-digital/kianv
ci #2655: Commit 862a0db pushed by enjoy-digital
November 8, 2023 10:43 42m 55s master
November 8, 2023 10:43 42m 55s
cores/cpu: Add KianV CPU (RV32IMA) initial support.
ci #2654: Pull request #1829 opened by enjoy-digital
November 8, 2023 10:42 27m 18s kianv
November 8, 2023 10:42 27m 18s
cores/cpu: Add KianV CPU (RV32IMA) initial support.
ci #2653: Commit 6598fe9 pushed by enjoy-digital
November 8, 2023 10:37 27m 12s kianv
November 8, 2023 10:37 27m 12s
November 7, 2023 12:21 38m 3s
November 7, 2023 08:03 32m 37s
Verilog improvements.
ci #2650: Pull request #1828 opened by enjoy-digital
November 6, 2023 18:41 33m 11s verilog_improvements_2
November 6, 2023 18:41 33m 11s
gen/fhdl/namer: Update copyrights.
ci #2649: Commit 657252c pushed by enjoy-digital
November 6, 2023 16:56 27m 1s verilog_improvements_2
November 6, 2023 16:56 27m 1s
November 6, 2023 08:11 27m 19s
November 6, 2023 08:11 27m 18s
cores/video: Fix missing h/vsync connection in SYNC state.
ci #2644: Commit f4e68d7 pushed by enjoy-digital
November 4, 2023 19:56 32m 38s master
November 4, 2023 19:56 32m 38s
Verilog improvements
ci #2643: Pull request #1825 opened by enjoy-digital
November 3, 2023 15:04 27m 19s verilog_improvements
November 3, 2023 15:04 27m 19s
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