Skip to content

eddiexyang/digital-logic-design-final-project

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 
 
 
 
 

Repository files navigation

Tetris Game

Introduction

This is the final project for Zhejiang University Digital Logic Design (CS1019F). We implemented a Tetris Game in Verilog. Press space to start and the arrows keys are for block control. There are still some bugs and any kinds of pull requests are welcome!

Authors

* denotes equal contribution.

  • Yuxun He*
  • Xingyu Yang*

Devices

  • Xilinx Kintex-7 XC7K160TFFG-2L FPGA

  • 1920x1080@60Hz monitor

  • USB keyboard

Sample Pictures

Tetris.bmp

Full_Tetris_restart.bmp

About

No description, website, or topics provided.

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Contributors 3

  •  
  •  
  •