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[Deepin-Kernel-SIG] [FROMLIST] [linux 6.6-y] net: stmmac: Optimize cache prefetch in RX path #574
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next inclusion from next-20250122 category: performance Current code prefetches cache lines for the received frame first, and then dma_sync_single_for_cpu() against this frame, this is wrong. Cache prefetch should be triggered after dma_sync_single_for_cpu(). This patch brings ~2.8% driver performance improvement in a TCP RX throughput test with iPerf tool on a single isolated Cortex-A65 CPU core, 2.84 Gbits/sec increased to 2.92 Gbits/sec. Signed-off-by: Furong Xu <[email protected]> Reviewed-by: Alexander Lobakin <[email protected]> Reviewed-by: Yanteng Si <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
Reviewer's Guide by SourceryThis pull request optimizes the cache prefetch in the RX path of the stmmac driver. The cache prefetch is moved after the dma_sync_single_for_cpu() call to ensure that the cache prefetch is triggered after the DMA synchronization. Sequence diagram for optimized RX path cache prefetchsequenceDiagram
participant Driver as STMMAC Driver
participant DMA as DMA Controller
participant Cache as CPU Cache
participant Memory as System Memory
Note over Driver,Memory: Before optimization
Driver->>Cache: Prefetch data
Driver->>DMA: DMA sync for CPU
Note over Driver,Memory: After optimization
Driver->>DMA: DMA sync for CPU
Driver->>Cache: Prefetch data
Note right of Cache: More efficient cache usage
Flow diagram for RX packet processing optimizationflowchart LR
subgraph before[Before Optimization]
A1[Receive Packet] --> B1[Prefetch Cache]
B1 --> C1[DMA Sync]
C1 --> D1[Process Data]
end
subgraph after[After Optimization]
A2[Receive Packet] --> B2[DMA Sync]
B2 --> C2[Prefetch Cache]
C2 --> D2[Process Data]
end
before -.-> after
style before fill:#f9f,stroke:#333
style after fill:#9f9,stroke:#333
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Hey @opsiff - I've reviewed your changes and they look great!
Here's what I looked at during the review
- 🟢 General issues: all looks good
- 🟢 Security: all looks good
- 🟢 Testing: all looks good
- 🟢 Complexity: all looks good
- 🟢 Documentation: all looks good
Help me be more useful! Please click 👍 or 👎 on each comment and I'll use the feedback to improve your reviews.
[APPROVALNOTIFIER] This PR is NOT APPROVED This pull-request has been approved by: sourcery-ai[bot] The full list of commands accepted by this bot can be found here.
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next inclusion
from next-20250122
category: performance
Current code prefetches cache lines for the received frame first, and then dma_sync_single_for_cpu() against this frame, this is wrong. Cache prefetch should be triggered after dma_sync_single_for_cpu().
This patch brings ~2.8% driver performance improvement in a TCP RX throughput test with iPerf tool on a single isolated Cortex-A65 CPU core, 2.84 Gbits/sec increased to 2.92 Gbits/sec.
Reviewed-by: Alexander Lobakin [email protected]
Reviewed-by: Yanteng Si [email protected]
Summary by Sourcery
Enhancements: