Releases: clash-lang/clash-compiler
Releases · clash-lang/clash-compiler
v0.6.22
- Fixes bugs:
- Bug in DEC transformation overwrites case-alternatives
- Bug in DEC transformation creates non-representable let-binders
- VHDL: Incorrect primitive for
Integer
sltInteger#
andgeInteger#
- (System)Verilog: Fix primitive for CLaSH.Sized.Internal.Signed.mod# and GHC.Type.Integer.modInteger #164
v0.6.20
- New features:
- Better error location reporting
- Fixes bugs:
CLaSH.Sized.Internal.Unsigned.maxBound#
not evaluated at compile-time #155CLaSH.Sized.Internal.Unsigned.minBound#
not evaluated at compile-time #157- Values of type Index 'n', where 'n' > 2^MACHINE_WIDTH, incorrectly considered non-synthesisable due to overflow
- VHDL: Types in generated types.vhdl incorrectly sorted
- Casts of CLaSH numeric types result in incorrect VHDL/Verilog (Such casts are now reported as an error)
v0.6.19
- Fixes bugs:
Eq
instance ofVec
sometimes not synthesisable- VHDL: Converting product types to std_logic_vector fails when the
clash-hdlsyn Vivado
flag is enabled
v0.6.18
- New features:
- DEC transformation also lifts HO-primitives applied to "interesting" primitives (i.e.
zipWith (*)
) - New
-clash-hdlsyn Xilinx
flag to generate HDL tweaked for Xilinx synthesis tools (both ISE and Vivado)
- DEC transformation also lifts HO-primitives applied to "interesting" primitives (i.e.
- Fixes bugs:
v0.6.17
- New features:
- Up to 2x reduced compilation times when working with large
Vec
literals
- Up to 2x reduced compilation times when working with large
- Fixes bugs:
- VHDL: Incorrect primitives for
BitVector
squot#
andrem#
- VHDL: Bit indexing and replacement primitives fail to synthesise in Synopsis tools
- Bug in DEC transformation throws CLaSH into an endless loop #140
- Missed constant folding opportunity results in an error [#50](https://github.com/clash-lang/clash-
- VHDL: Incorrect primitives for
v0.6.16
v0.6.15
v0.6.14
v0.6.13
- Fixes bugs:
- Not all lambda's in a function position removed