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@martijnbastiaan martijnbastiaan released this 23 Apr 19:57
· 182 commits to 1.2 since this release
v1.2.1
22843c1

Bug fix release

  • Changed:

    • Treat Signed 0, Unsigned 0, Index 1, BitVector 0 as unit. In effect this means that 'minBound' and 'maxBound' return 0, whereas previously they might crash #1183
    • Infix use of deepseqX is now right-associative

  • Added:

    • Add 'natToInteger', 'natToNatural', and 'natToNum'. Similar to 'snatTo*', but works solely on a type argument instead of an SNat.
    • Clash.Sized.Vector.unfoldr and Clash.Sized.Vector.unfoldrI to construct vectors from a seed value
    • Added NFDataX instances for Data.Monoid.{First,Last}

  • Fixed:

    • The Verilog backend can now deal with non-contiguous ranges in custom bit-representations.
    • Synthesizing BitPack instances for type with phantom parameter fails #1242
    • Synthesis of fromBNat (toBNat d5) failed due to unsafeCoerce coercing from Any
    • Memory leak in register primitives #1256
    • Illegal VHDL slice when projecting nested SOP type #1254
    • Vivado VHDL code path (-fclash-hdlsyn Vivado) generates illegal VHDL #1264
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