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bjorng committed Jan 6, 2024
1 parent e1cffb6 commit 97fc616
Showing 1 changed file with 8 additions and 12 deletions.
20 changes: 8 additions & 12 deletions erts/emulator/beam/jit/arm/beam_asm.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -1005,7 +1005,6 @@ class BeamModuleAssembler : public BeamAssembler,
if (num_cache_entries < max_cache_entries) {
return num_cache_entries++;
} else {
comment("blurf");
return 0;
}
}
Expand All @@ -1027,10 +1026,10 @@ class BeamModuleAssembler : public BeamAssembler,
consolidate_cache();
invalidate_cache(src);

slot = get_cache_entry(dst);

a.str(src, dst);

slot = get_cache_entry(dst);

last_destination_offset = a.offset();

cache[slot].reg1 = src;
Expand All @@ -1041,6 +1040,7 @@ class BeamModuleAssembler : public BeamAssembler,
/* Works as the STP instruction, but also updates the cache. */
void stp_cache(arm::Gp src1, arm::Gp src2, arm::Mem dst) {
arm::Mem next_dst = arm::Mem(arm::GpX(dst.baseId()), dst.offset() + 8);
int slot;

consolidate_cache();
invalidate_cache(src1);
Expand All @@ -1050,19 +1050,15 @@ class BeamModuleAssembler : public BeamAssembler,

last_destination_offset = a.offset();

int slot = get_cache_entry(dst);

slot = get_cache_entry(dst);
cache[slot].reg1 = src1;
cache[slot].reg2 = arm::Gp();
cache[slot].mem = dst;

int new_slot = get_cache_entry(next_dst);
if (slot == new_slot) {
new_slot = (new_slot + 1) % num_cache_entries;
}
cache[new_slot].reg1 = src2;
cache[new_slot].reg2 = arm::Gp();
cache[new_slot].mem = next_dst;
slot = get_cache_entry(next_dst);
cache[slot].reg1 = src2;
cache[slot].reg2 = arm::Gp();
cache[slot].mem = next_dst;
}

void invalidate_cache(arm::Gp dst) {
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