Update revisions

caliptra-rtl 020d315 Merge pull request #276 from chipsalliance/cwhitehead-msft-issue263
6ed6523 Merge pull request #281 from chipsalliance/dev-integrate
45a095b RDL: Add RNG unavail bit to dbg manuf reg description (#283)
bc8642f Merge pull request #277 from chipsalliance/dev-msft
452e187 Version docs at 1.0-rc1
92876e1 Merge pull request #273 from chipsalliance/dev-msft-20231102
447bf27 Update integ spec to 0.9 version; rollback release notes to reflect 0.9 release
92c6aea Merged PR 132153: TB Fix: soc_ifc_tb standalone test is incorrectly checking WO trigger regs.
0e050e9 Merged PR 132089: fixing wait count, worst case is actually 33 for direct read conflicts
229ff7a Merge pull request #271 from chipsalliance/dev-msft
1448b38 Merge pull request #269 from chipsalliance/dev-msft-20231101
b6e79dc Merged PR 131898: RDL register description updates and fix for UVM prediction issue
64888d3 Merged PR 131836: Include config_defines in clk_gate
c932181 Merged PR 131385: fix for req hold bug, issue 259
f7daac8 Merged PR 131583: Regression test list typo fix
31da078 Merged PR 130547: UVM val FW bug fix to resolve regression failure
955d03b Merged PR 130640: Small coverage improvements and adding directed tb to merge pipeline
e0f658f Merged PR 130632: Remove common_defines from clk_gate
f8993b4 Merged PR 129340: KV debug test update and other misc items
347600a Merge pull request #258 from chipsalliance/main

deps.json

@@ -1 +1 @@
-{"cores": [{"repository_name": "ibex", "repository_url": "https://github.com/lowRISC/ibex", "repository_branch": "master", "repository_revision": "bac72d96ec713a68ed07f3e1cb341ffbf40b8228"}, {"repository_name": "Cores-VeeR-EL2", "repository_url": "https://github.com/chipsalliance/Cores-VeeR-EL2", "repository_branch": "main", "repository_revision": "0b8b335d4dc003f02d2ccf984899d6f7033968ef"}, {"repository_name": "caliptra-rtl", "repository_url": "https://github.com/chipsalliance/caliptra-rtl", "repository_branch": "main", "repository_revision": "1af0865ba1bde17616c1e78396074a69a37a6f96"}]}
+{"cores": [{"repository_name": "ibex", "repository_url": "https://github.com/lowRISC/ibex", "repository_branch": "master", "repository_revision": "bac72d96ec713a68ed07f3e1cb341ffbf40b8228"}, {"repository_name": "Cores-VeeR-EL2", "repository_url": "https://github.com/chipsalliance/Cores-VeeR-EL2", "repository_branch": "main", "repository_revision": "0b8b335d4dc003f02d2ccf984899d6f7033968ef"}, {"repository_name": "caliptra-rtl", "repository_url": "https://github.com/chipsalliance/caliptra-rtl", "repository_branch": "main", "repository_revision": "020d3155f57155d6a25aebc3a121a361e4801047"}]}