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Updated copyright header for the files that are changed in 2021.1 (#8428
) * Updated copyright header for the files that are changed in 2021.1 Signed-off-by: suresh avula <[email protected]> * Updated copyright year for Xilinx and AMD --------- Signed-off-by: suresh avula <[email protected]>
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* A GEM style (optionally CMA backed) device manager for ZynQ based | ||
* OpenCL accelerators. | ||
* | ||
* Copyright (C) 2016-2021 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved. | ||
* | ||
* Authors: | ||
* Sonal Santan <[email protected]> | ||
|
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3 changes: 2 additions & 1 deletion
3
src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma/qdma_request.c
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3 changes: 2 additions & 1 deletion
3
src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma/qdma_st_c2h.c
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3
src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma/xdev.c
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src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma4/libqdma_export.c
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3 changes: 2 additions & 1 deletion
3
src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma4/qdma_st_c2h.c
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3 changes: 2 additions & 1 deletion
3
src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma4/xdev.c
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4 changes: 3 additions & 1 deletion
4
src/runtime_src/core/pcie/driver/linux/xocl/mgmtpf/mgmt-core.c
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@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
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@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
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@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
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/* | ||
* FPGA Manager bindings for XRT driver | ||
* | ||
* Copyright (C) 2019 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2019-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Sonal Santan | ||
* Jan Stephan <[email protected]> | ||
|
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@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
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---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2016-2018 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: [email protected] | ||
* Jan Stephan <[email protected]> | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020- Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: [email protected] | ||
* Jan Stephan <[email protected]> | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
4 changes: 3 additions & 1 deletion
4
src/runtime_src/core/pcie/driver/linux/xocl/subdev/trace_fifo_lite.c
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
4 changes: 3 additions & 1 deletion
4
src/runtime_src/core/pcie/driver/linux/xocl/subdev/trace_funnel.c
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
4 changes: 3 additions & 1 deletion
4
src/runtime_src/core/pcie/driver/linux/xocl/subdev/trace_s2mm.c
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2020-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Chien-Wei Lan <[email protected]> | ||
* | ||
|
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|
@@ -4,6 +4,7 @@ | |
* Copyright (C) 2006 Peter Korsgaard <[email protected]> | ||
* Copyright (C) 2007 Secret Lab Technologies Ltd. | ||
* Copyright (C) 2020 Chien-Wei Lan <[email protected]> | ||
* Copyright (c) 2024, Advanced Micro Devices, Inc. | ||
* | ||
* This software is licensed under the terms of the GNU General Public | ||
* License version 2, as published by the Free Software Foundation, and | ||
|
@@ -338,13 +339,13 @@ static void ulite_shutdown(struct uart_port *port) | |
mutex_unlock(&pdata->lock); | ||
} | ||
|
||
#if (LINUX_VERSION_CODE > KERNEL_VERSION(6, 1, 0)) || defined(RHEL_9_2_GE) | ||
static void ulite_set_termios(struct uart_port *port, struct ktermios *termios, | ||
const struct ktermios *old) | ||
#else | ||
#if (LINUX_VERSION_CODE > KERNEL_VERSION(6, 1, 0)) || defined(RHEL_9_2_GE) | ||
static void ulite_set_termios(struct uart_port *port, struct ktermios *termios, | ||
const struct ktermios *old) | ||
#else | ||
static void ulite_set_termios(struct uart_port *port, struct ktermios *termios, | ||
struct ktermios *old) | ||
#endif | ||
#endif | ||
{ | ||
unsigned long flags; | ||
unsigned int baud; | ||
|
@@ -554,39 +555,39 @@ static int ulite_probe(struct platform_device *pdev) | |
return ret; | ||
} | ||
|
||
/* | ||
* Sometime in Kernel version 6.5+ the platform_driver probe function will have | ||
* its return code changed from `int` to `void`. This is to enforce the notion | ||
* that the returned error code does nothing. | ||
* For now, older drivers should handle the error within this function and return | ||
* anything. Once the conversion of the return type is complete we must update | ||
* the return type from int to void and change all instances of `return 0` to | ||
* `return`. | ||
* https://elixir.bootlin.com/linux/latest/source/include/linux/platform_device.h#L211 | ||
*/ | ||
/* | ||
* Sometime in Kernel version 6.5+ the platform_driver probe function will have | ||
* its return code changed from `int` to `void`. This is to enforce the notion | ||
* that the returned error code does nothing. | ||
* For now, older drivers should handle the error within this function and return | ||
* anything. Once the conversion of the return type is complete we must update | ||
* the return type from int to void and change all instances of `return 0` to | ||
* `return`. | ||
* https://elixir.bootlin.com/linux/latest/source/include/linux/platform_device.h#L211 | ||
*/ | ||
static int ulite_remove(struct platform_device *pdev) | ||
{ | ||
struct uart_port *port = platform_get_drvdata(pdev); | ||
struct uartlite_data *pdata; | ||
|
||
if (!port) | ||
return 0; | ||
return 0; | ||
|
||
sysfs_remove_group(&pdev->dev.kobj, &ulite_attr_group); | ||
|
||
pdata = port->private_data; | ||
if (!pdata) | ||
return 0; | ||
return 0; | ||
|
||
atomic_set(&pdata->console_opened, 0); | ||
if (pdata->thread) | ||
kthread_stop(pdata->thread); | ||
|
||
uart_remove_one_port(pdata->xcl_ulite_driver, port); | ||
uart_remove_one_port(pdata->xcl_ulite_driver, port); | ||
platform_set_drvdata(pdev, NULL); | ||
port->mapbase = 0; | ||
|
||
return 0; | ||
return 0; | ||
} | ||
|
||
struct xocl_drv_private ulite_priv = { | ||
|
@@ -630,4 +631,4 @@ void __exit xocl_fini_ulite(void) | |
{ | ||
platform_driver_unregister(&ulite_platform_driver); | ||
uart_unregister_driver(&xcl_ulite_driver); | ||
} | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2016-2019 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: | ||
* Sonal Santan <[email protected]> | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,7 +1,9 @@ | ||
/* | ||
* A GEM style device manager for PCIe based OpenCL accelerators. | ||
* | ||
* Copyright (C) 2016-2021 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: Jan Stephan <[email protected]> | ||
* | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,5 +1,7 @@ | ||
/* | ||
* Copyright (C) 2016-2020 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: [email protected] | ||
* | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,5 +1,7 @@ | ||
/* | ||
* Copyright (C) 2016-2021 Xilinx, Inc. All rights reserved. | ||
* Copyright (C) 2016-2022, Xilinx Inc | ||
* Copyright (C) 2022-present Advanced Micro Devices, Inc. | ||
* All rights reserved. | ||
* | ||
* Authors: [email protected] | ||
* Jan Stephan <[email protected]> | ||
|
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