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### Ethernet example for the BDAQ53 hardware | ||
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# Ethernet example for the BDAQ53 hardware | ||
This example shows how to control a GPIO module and how to receive data via the Ethernet interface. | ||
1. Data transfer is started by setting a bit [0] in the GPIO. | ||
2. FPGA starts to send data from a 32 bit counter through a BRAM FIFO. | ||
3. The Python script checks the received data and counts the transferred bytes during a given time period. | ||
4. At the end, the average data rate is printed and the FPGA data source is stopped by clearing bit [0]. | ||
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## Build script | ||
To build this example firmware, navigate to `firmware/vivado` and start the process using the Makefile | ||
```terminal | ||
cd firmware/vivado | ||
make | ||
``` | ||
`make download`, `make synthesize` and `make clean` can be used to call the sub-tasks individually. | ||
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The firmware makes use of the free SiTcp Ethernet module ([GitHub][url1]). Put the extracted files in */firmware/src/SiTCP*. | ||
You can find build instructions in the *Firmware section* of the ([bdaq53 readme][url2]). | ||
The firmware makes use of the free SiTcp Ethernet module ([GitHub][url1]). | ||
You can find further build instructions in the *Firmware section* of the ([bdaq53 readme][url2]). | ||
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[url1]: https://github.com/BeeBeansTechnologies/SiTCP_Netlist_for_Kintex7 | ||
[url2]: https://gitlab.cern.ch/silab/bdaq53#firmware | ||
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1. Data transfer is started by setting a bit [0] in the GPIO. | ||
2. FPGA starts to send data from a 32 bit counter, as fast as possible through a FIFO. | ||
3. Python receives the data and counts bytes during a given time period. | ||
4. At the end, the average data rate is printed and the FPGA data source is stopped by clearing bit [0]. | ||
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Test for CocoTB available in */test* | ||
## Test | ||
A test for CocoTB is available under `test` |
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# Targets | ||
.PHONY: all clean | ||
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# Run the main process | ||
all: download synthesize | ||
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# Download SiTCP to the base directory | ||
download: | ||
@echo "Downloading SiTCP" | ||
@python -c "from basil.utils import utils; utils.get_si_tcp('..')" | ||
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# Start synthesis | ||
synthesize: | ||
@echo "Starrting firmware synthesis" | ||
vivado -mode batch -source run.tcl -notrace | ||
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# Clean generated files | ||
clean: | ||
@echo "Removing generated Vivado files" | ||
rm -f *.log *.jou *.str | ||
rm -rf designs reports output .Xil .ngc2edfcache ipcore.* |
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