Fix invalid constant sizing due to warning analysis happening prior t…

…o context determined type propagation

source/ast/Expression.cpp

@@ -184,8 +184,13 @@ struct Expression::PropagationVisitor {
                                                                    ConversionKind::Implicit);
                 }
 
-                if (expr.propagateType(context, newType, opRange))
+                if (expr.propagateType(context, newType, opRange)) {
+                    // We propagated the type successfully so we don't need a conversion.
+                    // We should however clear out any constant value that may have been
+                    // stored here, since it may no longer be valid given the new type.
                     needConversion = false;
+                    expr.constant = nullptr;
+                }
             }
         }
 

tests/unittests/ast/ExpressionTests.cpp

@@ -3805,3 +3805,21 @@ endfunction
     compilation.addSyntaxTree(tree);
     NO_COMPILATION_ERRORS;
 }
+
+TEST_CASE("Test ternary operation sizing regression") {
+    auto tree = SyntaxTree::fromText(R"(
+module m;
+  logic [3:0] w = (0) ? '0 : '0;
+endmodule
+)");
+
+    Compilation compilation;
+    compilation.addSyntaxTree(tree);
+    NO_COMPILATION_ERRORS;
+
+    auto& root = compilation.getRoot();
+    auto& var = root.lookupName<VariableSymbol>("m.w");
+
+    ast::EvalContext eval_ctx(ast::ASTContext(compilation.getRoot(), ast::LookupLocation::max));
+    CHECK(var.getInitializer()->eval(eval_ctx).getBitstreamWidth() == 4);
+}

tests/unittests/ast/WarningTests.cpp

@@ -1261,6 +1261,47 @@ endmodule
     CHECK(diags[6].code == diag::CaseOverlap);
 }
 
+TEST_CASE("Case statement with huge bit width selector") {
+    auto tree = SyntaxTree::fromText(R"(
+module test9(
+  input reg [100:0] sel_i,
+  input reg trg_i,
+  output reg [1:0] reg_o
+);
+  always @(posedge trg_i) begin
+    casex (sel_i)
+      -12'b00zzzzz00001,
+      12'b11: reg_o = 2'b01;
+    endcase
+  end
+endmodule
+
+module test10(
+  input reg [100:0] sel_i,
+  input reg trg_i,
+  output reg [1:0] reg_o
+);
+  always @(posedge trg_i) begin
+    casex (sel_i)
+      12'sb00xxxxx00001,
+      -12'b00zzzzz00001,
+      12'b11: reg_o = 2'b01;
+    endcase
+  end
+endmodule
+)");
+
+    Compilation compilation;
+    compilation.addSyntaxTree(tree);
+
+    auto& diags = compilation.getAllDiagnostics();
+    REQUIRE(diags.size() == 4);
+    CHECK(diags[0].code == diag::CaseDefault);
+    CHECK(diags[1].code == diag::CaseOverlap);
+    CHECK(diags[2].code == diag::CaseDefault);
+    CHECK(diags[3].code == diag::CaseOverlap);
+}
+
 TEST_CASE("Case items with unknowns that are not wildcards") {
     auto tree = SyntaxTree::fromText(R"(
 module m;