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Merge pull request #306 from boegel/zen4
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bedroge authored Jan 25, 2025
2 parents 6be3c75 + 598f098 commit 86ee8df
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3 changes: 2 additions & 1 deletion docs/software_layer/cpu_targets.md
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Expand Up @@ -7,7 +7,8 @@ In the 2023.06 version of the EESSI repository, the following CPU microarchitect
* `aarch64/neoverse_v1`: AWS Graviton 3
* `x86_64/generic`: fallback for older Intel + AMD CPUs (like Intel Sandy Bridge, ...)
* `x86_64/amd/zen2`: AMD Rome
* `x86_64/amd/zen3`: AMD Milan, AMD Milan X
* `x86_64/amd/zen3`: AMD Milan, Milan-X
* `x86_64/amd/zen4`: AMD Genoa, Genoa-X, Bergamo, Siena
* `x86_64/intel/haswell`: Intel Haswell, Broadwell
* `x86_64/intel/skylake_avx512`: Intel Skylake, Cascade Lake, Ice Lake, ...

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