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Fixed errors with VCO speed checking on H7
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David-OConnor committed Dec 17, 2023
1 parent 9c0b95b commit c6cc878
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Showing 48 changed files with 180 additions and 333 deletions.
1 change: 0 additions & 1 deletion examples/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
adc::{
Adc, AdcChannel, AdcDevice, AdcInterrupt, Align, ClockMode, InputType, OperationMode,
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9 changes: 3 additions & 6 deletions examples/can-send.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,13 +4,12 @@
#![no_std]
#![no_main]

use bxcan::{
filter::Mask32,
{Frame, StandardId},
};
use core::panic::PanicInfo;

use bxcan::{filter::Mask32, Frame, StandardId};
use cortex_m::delay::Delay;
use cortex_m_rt::entry; // The runtime
use defmt_rtt as _;
use nb::block;
use stm32_hal2::{
self,
Expand All @@ -20,8 +19,6 @@ use stm32_hal2::{
pac,
};

use defmt_rtt as _;

// This marks the entrypoint of our application. The cortex_m_rt creates some
// startup code before this, but we don't need to worry about this
#[entry]
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14 changes: 6 additions & 8 deletions examples/can.rs
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Expand Up @@ -11,20 +11,18 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
can::{self, Can},
clocks::Clocks,
gpio::{self, Edge, OutputSpeed, Pin, PinMode, PinState, Port},
pac,
};

use fdcan::{
frame::{FrameFormat, TxFrameHeader},
id::{ExtendedId, Id},
interrupt::{Interrupt, InterruptLine},
FdCan, NormalOperationMode,
};
use stm32_hal2::{
can::{self, Can},
clocks::Clocks,
gpio::{self, Edge, OutputSpeed, Pin, PinMode, PinState, Port},
pac,
};

// Code shortener to isolate typestate syntax.
type Can_ = FdCan<Can, NormalOperationMode>;
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1 change: 0 additions & 1 deletion examples/clock_cfg.rs
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Expand Up @@ -10,7 +10,6 @@
#![no_std]

use cortex_m_rt::entry;

use stm32_hal2::{
clocks::{self, ApbPrescaler, Clocks, InputSrc, MsiRng, PllCfg, PllSrc, Pllm, Pllr},
low_power, pac,
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6 changes: 2 additions & 4 deletions examples/comp.rs
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Expand Up @@ -5,13 +5,11 @@
#![no_std]

// These lines are part of our setup for debug printing.
use defmt_rtt as _;
use panic_probe as _;

// Cortex-M Import
use cortex_m::delay::Delay;
use cortex_m_rt::entry;

use defmt_rtt as _;
use panic_probe as _;
// Importing library
use stm32_hal2::{
clocks::Clocks,
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1 change: 0 additions & 1 deletion examples/flash.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
clocks::Clocks,
flash::{Bank, Flash},
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4 changes: 1 addition & 3 deletions examples/gpio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use embedded_hal::digital::OutputPin;
use stm32_hal2::{
adc::{Adc, AdcChannel, Align, CkMode, InputType, OperationMode},
clocks::Clocks,
Expand All @@ -24,8 +24,6 @@ use stm32_hal2::{
prelude::*,
};

use embedded_hal::digital::OutputPin;

// Set up an output pin in a globally-accessible mutex. This is useful for accessing
// peripherals in interrupt contexts. We use a macro imported in the
// `prelude` module to simplify this syntax, and accessing it later.
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1 change: 0 additions & 1 deletion examples/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
clocks::Clocks,
dma::{self, Dma, DmaChannel, DmaInterrupt, DmaPeriph, DmaWriteBuf},
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1 change: 0 additions & 1 deletion examples/interrupts.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal::{
adc::{Adc, AdcChannel, AdcDevice},
clocks::Clocks,
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6 changes: 2 additions & 4 deletions examples/pdm_mic_dac_output.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,8 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use defmt_rtt as _; // global logger
use panic_probe as _;
use stm32_hal2::{
self,
clocks::{Clocks, HclkPrescaler, InputSrc, PllCfg, PllSrc, SaiSrc, VosRange},
Expand All @@ -49,9 +50,6 @@ use stm32_hal2::{
timer::{BasicTimer, MasterModeSelection, Timer, TimerInterrupt},
};

use defmt_rtt as _; // global logger
use panic_probe as _;

const FS: u32 = 48_000;

const BLOCK_SIZE: usize = 500; // 1000 @ 48kHz = 21ms
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1 change: 0 additions & 1 deletion examples/rtc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal::{
clocks::Clocks,
low_power::{self, StopMode},
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1 change: 0 additions & 1 deletion examples/serial_nonblocking.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
clocks::Clocks,
dma::{self, Dma, DmaChannel, DmaConfig, DmaPeriph},
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1 change: 0 additions & 1 deletion examples/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
clocks::Clocks,
dma::{self, Dma, DmaChannel, DmaInput, DmaInterrupt, DmaPeriph, DmaWriteBuf},
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17 changes: 6 additions & 11 deletions examples/spi_imu_filtered.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,12 @@
#![no_main]
#![no_std]

use cmsis_dsp_api as dsp_api;
use cmsis_dsp_sys as dsp_sys;
use cortex_m::{self, asm, delay::Delay};

use defmt::println;
use defmt_rtt as _; // global logger
use panic_probe as _;
use stm32_hal2::{
clocks::{self, Clocks},
dma::{self, ChannelCfg, Dma, DmaChannel, DmaInterrupt, DmaPeriph},
Expand All @@ -15,14 +19,6 @@ use stm32_hal2::{
spi::{BaudRate, Spi, SpiConfig, SpiMode},
};

use cmsis_dsp_api as dsp_api;
use cmsis_dsp_sys as dsp_sys;

use defmt::println;

use defmt_rtt as _; // global logger
use panic_probe as _;

static mut WRITE_BUF: [u8; 13] = [0; 13];

// IMU readings buffer. 3 accelerometer, and 3 gyro measurements; 2 bytes each. 0-padded on the left,
Expand All @@ -37,6 +33,7 @@ pub struct IirInstWrapper {
unsafe impl Send for IirInstWrapper {}

mod imu {
use cortex_m::delay::Delay;
///! Module for TDK ICM-426xx IMUs. Stripped down in this example to include only what we need.
use stm32_hal2::{
dma::{Dma, DmaChannel, DmaPeriph},
Expand All @@ -45,8 +42,6 @@ mod imu {
spi::Spi,
};

use cortex_m::delay::Delay;

const GYRO_FULLSCALE: f32 = 34.90659; // 2,000 degrees/sec
const ACCEL_FULLSCALE: f32 = 156.9056; // 16 G

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1 change: 0 additions & 1 deletion examples/timer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@ use cortex_m::{
peripheral::NVIC,
};
use cortex_m_rt::entry;

use stm32_hal2::{
clocks::Clocks,
gpio::{Edge, Pin, PinMode, Port},
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3 changes: 0 additions & 3 deletions examples/usb_serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,16 +6,13 @@
#![no_std]

use cortex_m::{self, interrupt::free, peripheral::NVIC};

use cortex_m_rt::entry;

use stm32_hal2::{
clocks::{self, Clk48Src, Clocks, CrsSyncSrc},
gpio::{Pin, PinMode, Port},
pac,
usb::{Peripheral, UsbBus, UsbBusType},
};

use usbd_serial::{SerialPort, USB_CLASS_CDC};

static mut USB_BUS: Option<UsbBusAllocator<UsbBusType>> = None;
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7 changes: 2 additions & 5 deletions examples/waveform_generator.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,9 @@ use cortex_m::{
interrupt::{free, Mutex},
peripheral::NVIC,
};

use cortex_m_rt::entry;

use defmt_rtt as _; // global logger
use panic_probe as _;
use stm32_hal2::{
self,
clocks::Clocks,
Expand All @@ -40,9 +40,6 @@ use stm32_hal2::{
timer::{BasicTimer, MasterModeSelection, TimerDevice},
};

use defmt_rtt as _; // global logger
use panic_probe as _;

// Length of the lookup table used to generate sin waves etc.
const LUT_LEN: usize = 256;

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19 changes: 8 additions & 11 deletions src/adc.rs
Original file line number Diff line number Diff line change
@@ -1,23 +1,20 @@
//! Support for the ADC (Analog to Digital Converter) peripheral.
use cortex_m::{asm, delay::Delay, interrupt::free};

use core::ptr;

use crate::{
clocks::Clocks,
pac::{self, RCC},
util::rcc_en_reset,
};

use cfg_if::cfg_if;
use cortex_m::{asm, delay::Delay, interrupt::free};
use paste::paste;

#[cfg(not(any(feature = "f4", feature = "l552", feature = "h5")))]
use crate::dma::{self, ChannelCfg, DmaChannel};

#[cfg(any(feature = "f3", feature = "l4"))]
use crate::dma::DmaInput;
#[cfg(not(any(feature = "f4", feature = "l552", feature = "h5")))]
use crate::dma::{self, ChannelCfg, DmaChannel};
use crate::{
clocks::Clocks,
pac::{self, RCC},
util::rcc_en_reset,
};

// Address of the ADCinterval voltage reference. This address is found in the User manual. It appears
// to be the same for most STM32s. The voltage this is measured at my vary by variant; eg 3.0 vice 3.3.
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4 changes: 2 additions & 2 deletions src/can.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
//!
//! Requires the `can_bx` or `can_fd_g[h]` features. F3, F4, and L4 use BX CAN. G0, G4, L5, and H7 use FD CAN.
use crate::{pac::RCC, util::rcc_en_reset};

use cfg_if::cfg_if;

use crate::{pac::RCC, util::rcc_en_reset};

// todo: H5 support.

cfg_if! {
Expand Down
9 changes: 4 additions & 5 deletions src/clocks/baseline.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,18 +4,17 @@
// Similar in from to the H7 clocks module, but includes notable differendes.

use cfg_if::cfg_if;

#[cfg(any(feature = "l4", feature = "l5", feature = "wb", feature = "g4"))]
use crate::pac::CRS;
use crate::{
clocks::RccError,
pac::{self, FLASH, RCC},
util::rcc_en_reset,
MAX_ITERS,
};

#[cfg(any(feature = "l4", feature = "l5", feature = "wb", feature = "g4"))]
use crate::pac::CRS;

use cfg_if::cfg_if;

// todo: WB is missing second LSI2, and perhaps other things.

#[cfg(not(any(feature = "g0", feature = "wl")))]
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4 changes: 2 additions & 2 deletions src/clocks/f.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
use cfg_if::cfg_if;

use crate::{
clocks::RccError,
pac::{self, FLASH, RCC},
util::rcc_en_reset,
};

use cfg_if::cfg_if;

cfg_if! {
if #[cfg(feature = "f3")] {
#[derive(Clone, Copy)]
Expand Down
15 changes: 7 additions & 8 deletions src/clocks/h.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,17 +4,16 @@
// Similar in from to the `baseline` clocks module, but includes notable differendes.

use cfg_if::cfg_if;

#[cfg(not(any(feature = "h5", feature = "h7b3", feature = "h735")))]
use crate::pac::SYSCFG;
use crate::{
clocks::RccError,
pac::{CRS, FLASH, PWR, RCC},
MAX_ITERS,
};

#[cfg(not(any(feature = "h5", feature = "h7b3", feature = "h735")))]
use crate::pac::SYSCFG;

use cfg_if::cfg_if;

#[derive(Clone, Copy, PartialEq)]
pub enum PllSrc {
None,
Expand Down Expand Up @@ -1234,13 +1233,13 @@ impl Clocks {
// Note: The RM appears out of date: Revision "V" allgedly supports 960_000_000
// VCO speed, to allow a max core speed of 480Mhz.
let vco_speed = self.vco_output_freq(self.pll_src, 1);
if pll_input_speed <= 2_000_000 && (vco_speed < 192_000_000 || vco_speed > 960_000_000)
{
if pll_input_speed > 2_000_000 && (vco_speed < 192_000_000 || vco_speed > 960_000_000) {
return Err(RccError::Speed);
}
// 1: Medium VCO range: 150 to 420 MHz. (VCOL)
// Note: You may get power savings
if pll_input_speed > 2_000_000 && (vco_speed < 150_000_000 || vco_speed > 420_000_000) {
if pll_input_speed <= 2_000_000 && (vco_speed < 150_000_000 || vco_speed > 420_000_000)
{
return Err(RccError::Speed);
}
}
Expand Down
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