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In process of changing to EHv1. Done for GPIO. Removed for others
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David-OConnor committed Jan 16, 2024
1 parent 65f5faa commit 77b2b05
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Showing 7 changed files with 322 additions and 312 deletions.
11 changes: 6 additions & 5 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -35,11 +35,11 @@ stm32wl = { version = "0.15.1", optional = true }
defmt = "^0.3.4"

# Embedded-HAL traits and related libs. Featured-gated with `embedded-hal`.
embedded-hal = { version = "^0.2.5", features = ["unproven"], optional = true }
embedded-hal = { version = "^1.0.0", features=["defmt-03"], optional = true }
# `nb` is only included when using the embedded-hal feature.
nb = { version = "^1.0.0", optional = true }
void = { version = "^1.0.2", default-features = false, optional = true }
embedded-time = { version = "^0.12.1", optional = true }
#nb = { version = "^1.1.0", optional = true }
#void = { version = "^1.0.2", default-features = false, optional = true }
#embedded-time = { version = "^0.12.1", optional = true }

# Enabled with the `monotonic` feature.
rtic-monotonic = { version = "^1.0.0", optional = true }
Expand Down Expand Up @@ -172,7 +172,8 @@ can_bx = ["dep:bxcan"]
can_fd_g = ["fdcan/fdcan_g0_g4_l5"]
can_fd_h = ["fdcan/fdcan_h7"]
net = ["dep:smoltcp"]
embedded_hal = ["dep:embedded-hal", "dep:nb", "dep:void", "dep:embedded-time"]
#embedded_hal = ["dep:embedded-hal", "dep:nb", "dep:void", "dep:embedded-time"]
embedded_hal = ["dep:embedded-hal"]
monotonic = ["dep:rtic-monotonic"]

# These features are used to featured gate sections of code that apply
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6 changes: 2 additions & 4 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -239,10 +239,8 @@ where
pub fn new(regs: R, prf: Prf) -> Self {
// (A critical section here prevents race conditions, while preventing
// the user from needing to pass RCC in explicitly.)
with(|cs| {
let mut rcc = unsafe { &(*RCC::ptr()) };
rcc_en_reset!(apb1, fcradar1, rcc);
});
let mut rcc = unsafe { &(*RCC::ptr()) };
rcc_en_reset!(apb1, fcradar1, rcc);

regs.cr.modify(|_, w| w.prf().bit(prf as u8 != 0));

Expand Down
32 changes: 21 additions & 11 deletions src/gpio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
use core::convert::Infallible;

#[cfg(feature = "embedded_hal")]
use embedded_hal::digital::v2::{InputPin, OutputPin, ToggleableOutputPin};
use embedded_hal::digital::{InputPin, OutputPin, StatefulOutputPin, ErrorType};

use crate::pac::{self, EXTI, RCC};
#[cfg(not(feature = "h7"))]
Expand Down Expand Up @@ -1060,31 +1060,35 @@ impl Pin {

/// Toggle output voltage between low and high. Sets the `BSRR` register. Atomic.
pub fn toggle(&mut self) {
if self.is_high() {
self.set_low();
// if self.is_high() {
if Pin::is_high(self) {
Pin::set_low(self);
// self.set_low();
} else {
self.set_high();
// self.set_high();
Pin::set_high(self);
}
}
}

#[cfg(feature = "embedded_hal")]
impl InputPin for Pin {
impl ErrorType for Pin {
type Error = Infallible;
}

fn is_high(&self) -> Result<bool, Self::Error> {
#[cfg(feature = "embedded_hal")]
impl InputPin for Pin {
fn is_high(&mut self) -> Result<bool, Self::Error> {
Ok(Pin::is_high(self))
}

fn is_low(&self) -> Result<bool, Self::Error> {
fn is_low(&mut self) -> Result<bool, Self::Error> {
Ok(Pin::is_low(self))
}
}

#[cfg(feature = "embedded_hal")]
impl OutputPin for Pin {
type Error = Infallible;

fn set_low(&mut self) -> Result<(), Self::Error> {
Pin::set_low(self);
Ok(())
Expand All @@ -1097,8 +1101,14 @@ impl OutputPin for Pin {
}

#[cfg(feature = "embedded_hal")]
impl ToggleableOutputPin for Pin {
type Error = Infallible;
impl StatefulOutputPin for Pin {
fn is_set_high(&mut self) -> Result<bool, Self::Error> {
Ok(Pin::is_high(self))
}

fn is_set_low(&mut self) -> Result<bool, Self::Error> {
Ok(Pin::is_low(self))
}

fn toggle(&mut self) -> Result<(), Self::Error> {
Pin::toggle(self);
Expand Down
82 changes: 41 additions & 41 deletions src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@
use core::ops::Deref;

#[cfg(feature = "embedded_hal")]
use embedded_hal::blocking::i2c::{Read, Write, WriteRead};
// #[cfg(feature = "embedded_hal")]
// use embedded_hal::blocking::i2c::{Read, Write, WriteRead};

#[cfg(any(feature = "f3", feature = "l4"))]
use crate::dma::DmaInput;
Expand Down Expand Up @@ -736,42 +736,42 @@ where
unsafe { self.regs.isr.read().bits() }
}
}

#[cfg(feature = "embedded_hal")]
// #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
impl<R> Write for I2c<R>
where
R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
{
type Error = Error;

fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
I2c::write(self, addr, bytes)
}
}

#[cfg(feature = "embedded_hal")]
// #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
impl<R> Read for I2c<R>
where
R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
{
type Error = Error;

fn read(&mut self, addr: u8, bytes: &mut [u8]) -> Result<(), Error> {
I2c::read(self, addr, bytes)
}
}

#[cfg(feature = "embedded_hal")]
// #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
impl<R> WriteRead for I2c<R>
where
R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
{
type Error = Error;

fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
I2c::write_read(self, addr, bytes, buffer)
}
}
//
// #[cfg(feature = "embedded_hal")]
// // #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
// impl<R> Write for I2c<R>
// where
// R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
// {
// type Error = Error;
//
// fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
// I2c::write(self, addr, bytes)
// }
// }
//
// #[cfg(feature = "embedded_hal")]
// // #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
// impl<R> Read for I2c<R>
// where
// R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
// {
// type Error = Error;
//
// fn read(&mut self, addr: u8, bytes: &mut [u8]) -> Result<(), Error> {
// I2c::read(self, addr, bytes)
// }
// }
//
// #[cfg(feature = "embedded_hal")]
// // #[cfg_attr(docsrs, doc(cfg(feature = "embedded_hal")))]
// impl<R> WriteRead for I2c<R>
// where
// R: Deref<Target = pac::i2c1::RegisterBlock> + RccPeriph,
// {
// type Error = Error;
//
// fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
// I2c::write_read(self, addr, bytes, buffer)
// }
// }
70 changes: 35 additions & 35 deletions src/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,8 @@
use core::{ops::Deref, ptr};

use cfg_if::cfg_if;
#[cfg(feature = "embedded_hal")]
use embedded_hal::spi::FullDuplex;
// #[cfg(feature = "embedded_hal")]
// use embedded_hal::spi::FullDuplex;

use crate::{
pac::{self, RCC},
Expand Down Expand Up @@ -1197,36 +1197,36 @@ where
}
}

#[cfg(feature = "embedded_hal")]
impl<R> FullDuplex<u8> for Spi<R>
where
R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph,
{
type Error = SpiError;

fn read(&mut self) -> nb::Result<u8, SpiError> {
match Spi::read(self) {
Ok(r) => Ok(r),
Err(e) => Err(nb::Error::Other(e)),
}
}

fn send(&mut self, byte: u8) -> nb::Result<(), SpiError> {
match Spi::write_one(self, byte) {
Ok(r) => Ok(r),
Err(e) => Err(nb::Error::Other(e)),
}
}
}

#[cfg(feature = "embedded_hal")]
impl<R> embedded_hal::blocking::spi::transfer::Default<u8> for Spi<R> where
R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph
{
}

#[cfg(feature = "embedded_hal")]
impl<R> embedded_hal::blocking::spi::write::Default<u8> for Spi<R> where
R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph
{
}
// #[cfg(feature = "embedded_hal")]
// impl<R> FullDuplex<u8> for Spi<R>
// where
// R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph,
// {
// type Error = SpiError;
//
// fn read(&mut self) -> nb::Result<u8, SpiError> {
// match Spi::read(self) {
// Ok(r) => Ok(r),
// Err(e) => Err(nb::Error::Other(e)),
// }
// }
//
// fn send(&mut self, byte: u8) -> nb::Result<(), SpiError> {
// match Spi::write_one(self, byte) {
// Ok(r) => Ok(r),
// Err(e) => Err(nb::Error::Other(e)),
// }
// }
// }
//
// #[cfg(feature = "embedded_hal")]
// impl<R> embedded_hal::blocking::spi::transfer::Default<u8> for Spi<R> where
// R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph
// {
// }
//
// #[cfg(feature = "embedded_hal")]
// impl<R> embedded_hal::blocking::spi::write::Default<u8> for Spi<R> where
// R: Deref<Target = pac::spi1::RegisterBlock> + RccPeriph
// {
// }
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