From a122aa3478922eec5469aa7dbfe19b5b557965a1 Mon Sep 17 00:00:00 2001 From: Vladislav Abrosimov Date: Thu, 28 Dec 2023 14:36:16 +0300 Subject: [PATCH] Add switching for writing into tsc deltas --- cli/main.cpp | 4 +- cli/show.h | 7 ++ common/idataplane.h | 5 + common/idp.h | 6 +- dataplane/bus.cpp | 4 + dataplane/controlplane.cpp | 7 ++ dataplane/controlplane.h | 1 + dataplane/dataplane.cpp | 8 ++ dataplane/dataplane.h | 5 +- dataplane/worker.cpp | 217 ++++++++++++++++++++++++------------- 10 files changed, 186 insertions(+), 78 deletions(-) diff --git a/cli/main.cpp b/cli/main.cpp index 979dd4b1..ce33f170 100644 --- a/cli/main.cpp +++ b/cli/main.cpp @@ -93,7 +93,9 @@ std::vector", [](const auto& args) { call(show::fwlist, args); }}, {}, {"show shm info", "", [](const auto& args) { call(show::shm_info, args); }}, - {"show shm tsc info", "", [](const auto& args) { call(show::shm_tsc_info, args); }}, + {}, + {"tsc show shm info", "", [](const auto& args) { call(show::shm_tsc_info, args); }}, + {"tsc set state", "[true|false]", [](const auto& args) { call(show::shm_tsc_set_state, args); }}, {}, {"samples show", "", [](const auto& args) { call(show::samples, args); }}, {"samples dump", "", [](const auto& args) { call(show::samples_dump, args); }}, diff --git a/cli/show.h b/cli/show.h index 0e63a3f3..6572ce1e 100644 --- a/cli/show.h +++ b/cli/show.h @@ -869,4 +869,11 @@ void shm_tsc_info() table.print(); } +void shm_tsc_set_state(std::string state) +{ + interface::dataPlane dataplane; + bool new_state = state == "true"; + dataplane.set_shm_tsc_state(new_state); +} + } diff --git a/common/idataplane.h b/common/idataplane.h index e8b2d2cd..a61fc608 100644 --- a/common/idataplane.h +++ b/common/idataplane.h @@ -214,6 +214,11 @@ class dataPlane return get(); } + auto set_shm_tsc_state(const common::idp::get_shm_tsc_info::request& request) const + { + return get(request); + } + auto dump_physical_port(const common::idp::dump_physical_port::request& request) const { return get(request); diff --git a/common/idp.h b/common/idp.h index aca4a5ed..c8fbca06 100644 --- a/common/idp.h +++ b/common/idp.h @@ -71,6 +71,7 @@ enum class requestType : uint32_t get_counter_by_name, get_shm_info, get_shm_tsc_info, + set_shm_tsc_state, dump_physical_port, balancer_state_clear, size, // size should always be at the bottom of the list, this enum allows us to find out the size of the enum list @@ -861,6 +862,8 @@ using tsc_meta = std::tuple; /// offset using response = std::vector; +using state = bool; +using request = bool; } namespace dump_physical_port @@ -927,7 +930,8 @@ using request = std::tuple>; + dump_physical_port::request, + get_shm_tsc_info::request>>; using response = std::variant, updateGlobalBase::response, ///< + others which have eResult as response diff --git a/dataplane/bus.cpp b/dataplane/bus.cpp index c63de0cd..802c15a7 100644 --- a/dataplane/bus.cpp +++ b/dataplane/bus.cpp @@ -343,6 +343,10 @@ void cBus::clientThread(int clientSocket) { response = callWithResponse(&cControlPlane::get_shm_tsc_info, request); } + else if (type == common::idp::requestType::set_shm_tsc_state) + { + response = callWithResponse(&cControlPlane::set_shm_tsc_state, request); + } else if (type == common::idp::requestType::dump_physical_port) { response = callWithResponse(&cControlPlane::dump_physical_port, request); diff --git a/dataplane/controlplane.cpp b/dataplane/controlplane.cpp index 5732df2a..b87e4c79 100644 --- a/dataplane/controlplane.cpp +++ b/dataplane/controlplane.cpp @@ -8,6 +8,7 @@ #include #include +#include "common/idp.h" #include "common/version.h" #include "checksum.h" @@ -1239,6 +1240,12 @@ common::idp::get_shm_tsc_info::response cControlPlane::get_shm_tsc_info() return response; } +eResult cControlPlane::set_shm_tsc_state(const common::idp::get_shm_tsc_info::request& request) +{ + auto response = dataPlane->setShmTscState(request); + return response; +} + eResult cControlPlane::dump_physical_port(const common::idp::dump_physical_port::request& request) { const auto& [interface_name, direction, state] = request; diff --git a/dataplane/controlplane.h b/dataplane/controlplane.h index 56126e63..17221528 100644 --- a/dataplane/controlplane.h +++ b/dataplane/controlplane.h @@ -72,6 +72,7 @@ class cControlPlane ///< @todo: move to cDataPlane common::idp::nat64stateful_state::response nat64stateful_state(const common::idp::nat64stateful_state::request& request); common::idp::get_shm_info::response get_shm_info(); common::idp::get_shm_tsc_info::response get_shm_tsc_info(); + eResult set_shm_tsc_state(const common::idp::get_shm_tsc_info::request& request); eResult dump_physical_port(const common::idp::dump_physical_port::request& request); eResult balancer_state_clear(); diff --git a/dataplane/dataplane.cpp b/dataplane/dataplane.cpp index faee015c..a30f0b8f 100644 --- a/dataplane/dataplane.cpp +++ b/dataplane/dataplane.cpp @@ -28,6 +28,8 @@ #include #include "common.h" +#include "common/idp.h" +#include "common/result.h" #include "dataplane.h" #include "report.h" #include "sock_dev.h" @@ -1408,6 +1410,12 @@ common::idp::get_shm_tsc_info::response cDataPlane::getShmTscInfo() return result; } +eResult cDataPlane::setShmTscState(common::idp::get_shm_tsc_info::state state) +{ + tscs_active = state; + return eResult::success; +} + std::map cDataPlane::getPortStats(const tPortId& portId) const { /// unsafe diff --git a/dataplane/dataplane.h b/dataplane/dataplane.h index 7ea8afe2..676dd4b8 100644 --- a/dataplane/dataplane.h +++ b/dataplane/dataplane.h @@ -146,6 +146,7 @@ class cDataPlane std::optional getCounterValueByName(const std::string& counter_name, uint32_t coreId); common::idp::get_shm_info::response getShmInfo(); common::idp::get_shm_tsc_info::response getShmTscInfo(); + eResult setShmTscState(common::idp::get_shm_tsc_info::state new_state); template @@ -328,9 +329,11 @@ class cDataPlane rte_mempool* mempool_log; common::idp::get_shm_info::response dumps_meta; - common::idp::get_shm_tsc_info::response tscs_meta; std::map tag_to_id; + common::idp::get_shm_tsc_info::response tscs_meta; + common::idp::get_shm_tsc_info::state tscs_active; + /// modules cReport report; std::unique_ptr controlPlane; diff --git a/dataplane/worker.cpp b/dataplane/worker.cpp index 0019a480..fd920608 100644 --- a/dataplane/worker.cpp +++ b/dataplane/worker.cpp @@ -511,24 +511,36 @@ inline void cWorker::handlePackets() const auto& base = bases[localBaseId & 1]; const auto& globalbase = *base.globalBase; - auto tsc_start = rte_get_tsc_cycles(); + auto tsc_start = dataPlane->tscs_active ? rte_get_tsc_cycles() : 0; uint64_t tsc_end; - tsc_deltas->iter_num++; + if (tsc_start) + { + tsc_deltas->iter_num++; + } logicalPort_ingress_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->logicalPort_ingress_handle += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->logicalPort_ingress_handle += tsc_end - tsc_start; + tsc_start = tsc_end; + } acl_ingress_handle4(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle4 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle4 += tsc_end - tsc_start; + tsc_start = tsc_end; + } acl_ingress_handle6(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } if (globalbase.early_decap_enabled) { @@ -537,9 +549,12 @@ inline void cWorker::handlePackets() acl_ingress_stack4 = after_early_decap_stack4; after_early_decap_stack4.clear(); acl_ingress_handle4(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle4 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle4 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } if (after_early_decap_stack6.mbufsCount > 0) @@ -547,118 +562,170 @@ inline void cWorker::handlePackets() acl_ingress_stack6 = after_early_decap_stack6; after_early_decap_stack6.clear(); acl_ingress_handle6(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } } if (globalbase.tun64_enabled) { tun64_ipv4_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->tun64_ipv4_handle += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->tun64_ipv4_handle += tsc_end - tsc_start; + tsc_start = tsc_end; + } tun64_ipv6_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->tun64_ipv6_handle += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->tun64_ipv6_handle += tsc_end - tsc_start; + tsc_start = tsc_end; + } } if (globalbase.decap_enabled) { decap_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->decap_handle += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->decap_handle += tsc_end - tsc_start; + tsc_start = tsc_end; + } } if (globalbase.nat64stateful_enabled) { nat64stateful_lan_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; - + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } nat64stateful_wan_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } if (globalbase.nat64stateless_enabled) { nat64stateless_ingress_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; - + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } nat64stateless_egress_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } if (globalbase.balancer_enabled) { balancer_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; - + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } balancer_icmp_reply_handle(); // balancer replies instead of real (when client pings VS) - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; - + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } balancer_icmp_forward_handle(); // forward icmp message to other balancers (if not sent to one of this balancer's reals) - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_ingress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } route_handle4(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->route_handle4 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->route_handle4 += tsc_end - tsc_start; + tsc_start = tsc_end; + } route_handle6(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->route_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->route_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } route_tunnel_handle4(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->route_tunnel_handle4 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->route_tunnel_handle4 += tsc_end - tsc_start; + tsc_start = tsc_end; + } route_tunnel_handle6(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->route_tunnel_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->route_tunnel_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } if (globalbase.acl_egress_enabled) { acl_egress_handle4(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_egress_handle4 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_egress_handle4 += tsc_end - tsc_start; + tsc_start = tsc_end; + } acl_egress_handle6(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->acl_egress_handle6 += tsc_end - tsc_start; - tsc_start = tsc_end; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->acl_egress_handle6 += tsc_end - tsc_start; + tsc_start = tsc_end; + } } logicalPort_egress_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->logicalPort_egress_handle += tsc_end - tsc_start; - tsc_start = tsc_end; - + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->logicalPort_egress_handle += tsc_end - tsc_start; + tsc_start = tsc_end; + } controlPlane_handle(); - tsc_end = rte_get_tsc_cycles(); - tsc_deltas->controlPlane_handle += tsc_end - tsc_start; + if (tsc_start) + { + tsc_end = rte_get_tsc_cycles(); + tsc_deltas->controlPlane_handle += tsc_end - tsc_start; + } physicalPort_egress_handle(); }