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Neil Armstrong edited this page Jun 20, 2016 · 26 revisions

Oxford Semiconductor OXNAS Platform

OX820/PLX820 Based devices are needed for upstreaming/testing, please contact narmstrong(at)baylibre.com If somehow it is possible to get Documentation on registers, I'll be happy to sign any NDA in order ro improve upstream support.

Phase 1

Targets only the OX810SE SoC.

Upstream target:

  • pinctrl : Merged for 4.8
  • clock : Present since 4.7
  • clocksource : Merged for 4.8
  • arm-soc : Present since 4.7
  • arm-soc-dt : Present since 4.7
  • reset : Present since 4.7

Phase 1 is expected to be complete for 4.8.

Phase 2

Once Phase 1 is upstream, I'll submit the following:

  • usb
  • ethernet
  • sata (single port)

Amlogic GXBB

Targets Meson GXBB 64bit platform and if possible Mesob8b 32bit platform.

Phase 1

Upstream target:

  • hw random : Merged for 4.8
  • reset : Merged for 4.8
  • pwm : Submitted for 4.8
  • watchdog : Submitted for 4.8
  • AO clock : Needs HW clarification, depends on GXBB clock driver
  • scpi : Need upstream driver refactoring
  • mbox : Waiting for SCPI refactoring

Phase 2

TBD

mangOH Green + WP8548 + MDM9615

Phase 1

Upstream target:

  • pinctrl : Submitted for 4.8
  • clk : Submitted for 4.8
  • pmic : Submitted for 4.8
  • usb hsic : Submitted for 4.8
  • arm-soc : Submitted for 4.8
  • arm-soc-dt : Submitted for 4.8
  • wp + mangoh dt : Submitted for 4.8

Phase 2

This would include further support of the MDM9615 with:

  • cpufreq
  • cpuidle
  • runtime pm
  • audio
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