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boot directly throws null cap #30 error (embedded zcu102) #263
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Could you please send the report?
It’s not supposed to so there’s definitely a bug somewhere. |
Hmm. I unfortunately cannot reproduce the issue on 1.4.1 or the latest commit on our ZCU102. However, my setup is slightly different since I don't have the same ELF as you. I modified the 'hello' example in the repository to have this system description:
but I still get hello world just fine. |
I've tried inflating |
This is the report generated. It produces the above listed error. Edit: I just saw that the report above has another PD involved. I just tried it with just the described PD from above and the same error occurs. <protection_domain name="handler2" priority="200" pp="true">
<program_image path="handler2.elf" />
</protection_domain> |
Thanks for sending the report. I've made a system that produces almost the exact same report, the only differences are regarding the ELFs. I have the exact same There's a couple things that would be useful to know:
I mean that I tested the latest commit of Microkit and version 1.4.1. I wasn't sure what version you were using. |
Thank you for testing it out and your patience. To answer your questions:
We on our side have been thinking that it might be an issue with the boot process of our hardware?
I do not know if this hardware info is of any use to you. I figured it might make a difference. |
As promised, I did some further tests. Concerning Microkit:
This is the image and the elf, as well as the report.txt and the debug console printout. |
Great, thanks for sending all of that. It is late in Sydney so I won't be able to do some proper debugging until tomorrow but I quickly ran the provided image, attached is the serial output (no error, unfortunately). My next step will be to try to reproduce your setup as close as possible, this might take me a couple days, will update you when I have more info. Regarding the ZU9EG vs ZU4EV, I believe they both use Cortex-A53s but do they have the exact same amount of main memory and is the location of the main memory the same? On the ZCU102 main memory is at |
Yes, they both have Cortex-A53s and as far as I can see, both have main memory from I was wondering.. You are loading both |
Just a quirk of our boot scripts, it's not intentional. Those names point to the same image. Right now I only have some more questions, haven't had a chance to try further to reproduce it sorry:
|
That is correct. And somehow this is related to the addresses themselves.
I've been looking.. I could not find the direct location.
Yes, the device tree should tell you, where you find what interface (and memory). I was told by my colleague that the device tree generated by Vitis is basically blank and he patches all the information into it. Anyway, here it is. |
No, I don't think we have it running our ZCU102. Unless there's something specific needed from it I don't think there's any real benefit to running it in addition to seL4.
Thanks, I think the device tree confirms my suspicions, the memory node looks like this:
where as seL4 gets the main memory regions from a memory node that looks like this:
I would expect For now, do you want to try changing the memory node to match the device tree you sent me and check that the original system you opened the issue with works now? Here's a patch to the kernel to make: diff --git a/tools/dts/zynqmp.dts b/tools/dts/zynqmp.dts
index 2e9cc89ab..75d3a30bc 100644
--- a/tools/dts/zynqmp.dts
+++ b/tools/dts/zynqmp.dts
@@ -1124,7 +1124,7 @@
memory@0 {
device_type = "memory";
- reg = < 0x00 0x00 0x00 0x80000000 0x08 0x00 0x00 0x80000000 >;
+ reg = <0x00 0x00 0x00 0x7ff00000 0x08 0x00 0x00 0x80000000>;
};
gpio-keys { |
Hi,
this might be a continuation of #253. Or at least within this context, I found this bug.
For testing reasons, I set up a simple microkit configuration.
I want to write some data in a memory region
dma-out
and copy that content through PL DMA into another memory regiondma-in
while communicating with PL over AXI Lite located behind memory regionaxi-lite
. The location of the memory regions was chosen according to Xilinx Documentation (DDR Low bank without memory mapping to hardware).Microkit compiles without errors. But once I load it to actual hardware, I get:
I didn't collide with any other memory allocated in the
report.txt
and on hardware side it's an open memory region particularly for these use cases.I really dislike that microkit tells me it compiled correctly without errors and then giving me a null cap.
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