All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog, and this project adheres to Semantic Versioning.
0.17.0 - 2025-01-20
sweptsine
: support any number of harmonics
0.16.0 - 2025-01-09
cic
, configurable CIC interpolator/decimatorssweptsine
, exponential synchronize swep sine tooling for linear and non-linear transfer function/response measurements
0.15.0 - 2024-02-09
Dsm
: Delta sigma modulator/noise shaper in MASH-(1)^K architecture.
Pid
: Fixed period/rate mixup.
0.14.1 - 2024-01-15
- Fixed changelog
0.14.0 - 2024-01-15
iir::Pid
,iir:Filter
a builder for PID coefficients and the collection of standard Biquad filtersiir::Biquad::{HOLD, IDENTITY, proportional}
iir::Biquad
getter/setteriir
: support for other integers (i8, i16, i128)iir::Biquad
: support for reduced DF1 state and DF2T statesvf
: state variable filter
iir::Vec5
type alias has been removed.iir_int
: integrated intoiir
.
iir
: The biquad IIR filter API has been reworked.IIR -> Biquad
renamed.
0.13.0 - 2024-11-01
hbf
: more taps, API rework,f32
/f64
type genericismPLL
: redesign, add noise shapingUnwrapper
: simplify, redesign
0.12.1 - 2024-10-12
hbf
taps tweaks, performance tests
0.12.0 - 2024-10-12
hbf
taps
0.11.0 - 2024-09-16
hbf
FIRs, symmetric FIRs, half band filters, HBF decimators and interpolators
0.10.0 - 2023-07-20
filter
mod added to allow being generic about theFilter
trait. This is currentlyi32 -> i32
filtering (SISO, no batches) only and pretty simple but it allows filter composition, chaining, repetition, and handles parameters/configuration.pll
reworked to use FMA instead of shifts. These are faster on the target architecture and crucially important to increase dynamic range and bias. PLL now works fine even for very small feedback gains and maintains accuracy.lowpass
reworked to use the newFilter
trait. Also reworked to use FMA instead of shifts for greatly improved performance at low corner frequencies. Second order lowpass added.
0.9.2 - 2022-11-27
atan2
code refactored slightly for speed
0.9.1 2022-11-05
cossin
code reworked for accuracy and speed
0.9.0 2022-11-03
- Removed
miniconf
dependency as with miniconf >= 0.6MiniconfAtomic
is implicit.
0.8.6 - 2022-08-16
atan2
code refactored slightly for speed
0.8.5 - 2022-08-13
atan2
algorithm changed, accuracy improved from 4e-3 to 1e-5 rad max error
0.8.0 - 2022-06-07
- Miniconf dependency bumped to 0.5
0.7.1 - 2022-01-24
- Changed back to release 2018
0.7.0 - 2022-01-24
- Getter methods for
PLL
,RPLL
,Lowpass
,Unwrapper
Accu
,Unwrapper
,overflowing_sub
are now generic.- Revert
to PLL::update()
returning the phase increment as that has less bias (while it does have more noise).
0.6.0 - 2022-01-19
- Let the
wrap
return value ofoverlowing_sub()
be ai32
in analogy to the remaining API functions fori32
and the changes inidsp v0.5.0
.
0.5.0 - 2022-01-19
- The shift parameters (log2 gains, log2 time constants) have all been migrated
from
u8
tou32
to be consistent withcore
. This is also in preparation forunchecked_shr()
andunchecked_shl()
. PLL::update()
does not return the phase increment but instead the actual frequency estimate.- Additional zeros in the PLL transfer functions have been placed at Nyquist.
0.4.0 - 2021-12-13
- Deriving
Serialize
forIIR
andIIR (int)
to support miniconf updates.
0.3.0 - 2021-11-02
- Removed
nightly
feature as it was broken in 0.2.0 and hard to fix with generics. Instead usenum_cast::clamp
.
0.2.0 - 2021-11-01
- IIR is now generic over the float type (f32 and f64)
0.1.0 - 2021-09-15
Library initially released on crates.io