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target_common.h.in
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//
// Copyright (c) .NET Foundation and Contributors
// See LICENSE file in the project root for full license information.
//
//////////////////////////////////////////////////////////////////////////////
// This file was automatically generated by a tool. //
// Any changes you make here will be overwritten when it's generated again. //
//////////////////////////////////////////////////////////////////////////////
#ifndef TARGET_COMMON_H
#define TARGET_COMMON_H
/////////////////////////////////////////////////////////////////////////////////////////
// The following addresses and sizes should be filled in according to the SoC data-sheet
// they also must be coherent with what's in the linker file for nanoBooter and nanoCLR
// RAM base address
#define RAM1_MEMORY_StartAddress ((uint32_t)0x20000000)
// RAM size
#define RAM1_MEMORY_Size ((uint32_t)0x00008000)
// FLASH base address
#define FLASH1_MEMORY_StartAddress ((uint32_t)0x08000000)
// FLASH size
#define FLASH1_MEMORY_Size ((uint32_t)0x00040000)
/////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////
// set Wire Protocol packet size
// valid sizes are 1024, 512, 256, 128
// check Monitor_Ping_Source_Flags enum
#define WP_PACKET_SIZE 512U
//////////////////////////////////////////////
//////////////////////////////////////////////
#define TARGETNAMESTRING "@TARGET_NAME@"
#define PLATFORMNAMESTRING "STM32F0"
//////////////////////////////////////////////
//////////////////////////////////////////////
// set define to signal build system that this target is RAM constrained
#define TARGET_RAM_CONSTRAINED
//////////////////////////////////////////////
/////////////////////////////////////
//#define EVENTS_HEART_BEAT palToggleLine(GPIOA_LED_GREEN)
/////////////////////////////////////
#endif // TARGET_COMMON_H