diff --git a/Source/Data/ARM32-Instructions.json b/Source/Data/ARM32-Instructions.json index ef0a652f42..fff3c83d48 100644 --- a/Source/Data/ARM32-Instructions.json +++ b/Source/Data/ARM32-Instructions.json @@ -37,19 +37,19 @@ "Description": "Move from processor register to coprocessor", "OperandDescriptions": [ { - "Result": "ARM source/destination register", - "Operand1": "Coprocessor source/destination register", - "Operand2": "Coprocessor operand register", - "Operand3": "Coprocessor number", - "Operand4": "Coprocessor operation mode", + "Result": "ARM destination register", + "Operand1": "Coprocessor number", + "Operand2": "Coprocessor operation mode", + "Operand3": "Coprocessor operand register", + "Operand4": "Coprocessor source/destination register", "Operand5": "Coprocessor information" } ], "OpcodeEncodingAppend": "", "OpcodeEncoding": [ { - "Condition": "[register][register][constant][constant][constant]", - "Encoding": "[arm-coprocessor-transfer],s=status:status,l=1,rd=reg4:r,crn=reg4:o1,crm=reg4:o2,cpn=imm4:o3,opcode=imm4:o4,cp=imm4:o5" + "Condition": "[constant][constant][constant][constant][constant]", + "Encoding": "[arm-coprocessor-transfer],s=status:status,l=1,rd=reg4:r,crn=imm4:o2,crm=imm4:o3,cpn=imm4:o4,opcode=imm4:o2,cp=imm4:o5" } ] }, @@ -68,19 +68,19 @@ "Description": "Move from coprocessor to processor register", "OperandDescriptions": [ { - "Result": "ARM source/destination register", - "Operand1": "Coprocessor source/destination register", - "Operand2": "Coprocessor operand register", - "Operand3": "Coprocessor number", - "Operand4": "Coprocessor operation mode", + "Result": "ARM destination register", + "Operand1": "Coprocessor number", + "Operand2": "Coprocessor operation mode", + "Operand3": "Coprocessor operand register", + "Operand4": "Coprocessor source/destination register", "Operand5": "Coprocessor information" } ], "OpcodeEncodingAppend": "", "OpcodeEncoding": [ { - "Condition": "[register][register][constant][constant][constant]", - "Encoding": "[arm-coprocessor-transfer],s=status:status,l=0,rd=reg4:r,crn=reg4:o1,crm=reg4:o2,cpn=imm4:o3,opcode=imm4:o4,cp=imm4:o5" + "Condition": "[constant][constant][constant][constant][constant]", + "Encoding": "[arm-coprocessor-transfer],s=status:status,l=0,rd=reg4:r,crn=imm4:o2,crm=imm4:o3,cpn=imm4:o4,opcode=imm4:o2,cp=imm4:o5" } ] }, @@ -1360,13 +1360,13 @@ "FlagsUnchanged": "", "FlagsUndefined": "", "FlagsUsed": "", - "OperandCount": 2, + "OperandCount": 3, "ResultCount": 0, "Description": "Block transfer multiple registers from memory", "OpcodeEncoding": [ { - "Condition": "[register][constant]", - "Encoding": "[arm-block-transfer],p=0,u=updir:status,s=0,w=0,l=1,rn=reg4:o1,list=imm16:o2" + "Condition": "[register][constant][constant]", + "Encoding": "[arm-block-transfer],p=0,u=updir:status,s=imm1:o2,w=0,l=1,rn=reg4:o1,list=imm16:o2" } ] }, @@ -1380,13 +1380,13 @@ "FlagsUnchanged": "", "FlagsUndefined": "", "FlagsUsed": "", - "OperandCount": 2, + "OperandCount": 3, "ResultCount": 0, "Description": "Block transfer multiple registers to memory", "OpcodeEncoding": [ { - "Condition": "[register][constant]", - "Encoding": "[arm-block-transfer],p=1,u=updir:status,s=0,w=0,l=0,rn=reg4:o1,list=imm16:o2" + "Condition": "[register][constant][constant]", + "Encoding": "[arm-block-transfer],p=1,u=updir:status,s=imm1:o2,w=0,l=0,rn=reg4:o1,list=imm16:o2" } ] }, diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Adc.cs b/Source/Mosa.Compiler.ARM32/Instructions/Adc.cs index 624447026d..e789a38f3a 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Adc.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Adc.cs @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -48,7 +48,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/AdcRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/AdcRegShift.cs index db411215b8..14ccf5ae5d 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/AdcRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/AdcRegShift.cs @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Add.cs b/Source/Mosa.Compiler.ARM32/Instructions/Add.cs index 4f5389c856..54061155a7 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Add.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Add.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/AddRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/AddRegShift.cs index 552245ea21..85440992e3 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/AddRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/AddRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/And.cs b/Source/Mosa.Compiler.ARM32/Instructions/And.cs index 202d4d1e19..e53c4ad43b 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/And.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/And.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0000); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0000); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/AndRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/AndRegShift.cs index 6da656a1aa..63819fc0d2 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/AndRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/AndRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0000); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Asr.cs b/Source/Mosa.Compiler.ARM32/Instructions/Asr.cs index 79c8131879..da00af3b72 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Asr.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Asr.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append5BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Bic.cs b/Source/Mosa.Compiler.ARM32/Instructions/Bic.cs index cf41dab63f..f0d5f60eea 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Bic.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Bic.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -44,7 +44,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b1110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/BicRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/BicRegShift.cs index e840eb3765..27cd264ddd 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/BicRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/BicRegShift.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Eor.cs b/Source/Mosa.Compiler.ARM32/Instructions/Eor.cs index 74c31231ef..72e44677e5 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Eor.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Eor.cs @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0001); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -48,7 +48,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0001); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/EorRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/EorRegShift.cs index 6d411a4a52..1fe13cde4d 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/EorRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/EorRegShift.cs @@ -31,7 +31,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0001); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ldf.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ldf.cs index fc2fccbdb2..f590fcf1e7 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ldf.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ldf.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b110); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ldm.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ldm.cs index d10f3b6d32..e03c848636 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ldm.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ldm.cs @@ -12,22 +12,22 @@ namespace Mosa.Compiler.ARM32.Instructions; public sealed class Ldm : ARM32Instruction { internal Ldm() - : base(0, 2) + : base(0, 3) { } public override void Emit(Node node, OpcodeEncoder opcodeEncoder) { System.Diagnostics.Debug.Assert(node.ResultCount == 0); - System.Diagnostics.Debug.Assert(node.OperandCount == 2); + System.Diagnostics.Debug.Assert(node.OperandCount == 3); - if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant) + if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant && node.Operand3.IsConstant) { opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b100); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); - opcodeEncoder.Append1Bit(0b0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); + opcodeEncoder.Append1BitImmediate(node.Operand2); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ldr16.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ldr16.cs index 1887c84b74..1d8a097f70 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ldr16.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ldr16.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ldr32.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ldr32.cs index b65bf8792e..c16443de72 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ldr32.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ldr32.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ldr8.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ldr8.cs index e75859206f..aefe0266cd 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ldr8.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ldr8.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/LdrS16.cs b/Source/Mosa.Compiler.ARM32/Instructions/LdrS16.cs index 9fb88188c1..7b49a5ba2c 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/LdrS16.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/LdrS16.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/LdrS8.cs b/Source/Mosa.Compiler.ARM32/Instructions/LdrS8.cs index 6489c0a3c3..d246781e51 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/LdrS8.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/LdrS8.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Lsl.cs b/Source/Mosa.Compiler.ARM32/Instructions/Lsl.cs index 8645ebab8d..fd16d69a73 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Lsl.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Lsl.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append5BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Lsr.cs b/Source/Mosa.Compiler.ARM32/Instructions/Lsr.cs index c471989caa..5ccb8e0380 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Lsr.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Lsr.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append5BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mcr.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mcr.cs index 90dc811bdf..8cfc6573aa 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mcr.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mcr.cs @@ -23,18 +23,18 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) System.Diagnostics.Debug.Assert(node.ResultCount == 1); System.Diagnostics.Debug.Assert(node.OperandCount == 5); - if (node.Operand1.IsPhysicalRegister && node.Operand2.IsPhysicalRegister && node.Operand3.IsConstant && node.Operand4.IsConstant && node.Operand5.IsConstant) + if (node.Operand1.IsConstant && node.Operand2.IsConstant && node.Operand3.IsConstant && node.Operand4.IsConstant && node.Operand5.IsConstant) { opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append4Bits(0b1110); - opcodeEncoder.Append4BitImmediate(node.Operand4); + opcodeEncoder.Append4BitImmediate(node.Operand2); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); + opcodeEncoder.Append4BitImmediate(node.Operand2); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); - opcodeEncoder.Append4BitImmediate(node.Operand3); + opcodeEncoder.Append4BitImmediate(node.Operand4); opcodeEncoder.Append4BitImmediate(node.Operand5); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); + opcodeEncoder.Append4BitImmediate(node.Operand3); return; } diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mla.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mla.cs index a5950ba161..359ba95fe6 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mla.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mla.cs @@ -37,7 +37,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mov.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mov.cs index cf6a68d090..445647bb9e 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mov.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mov.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -44,7 +44,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/MovRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/MovRegShift.cs index f9c4252cc1..47bbce1c6f 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/MovRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/MovRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mrc.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mrc.cs index 6933583d76..8fda918455 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mrc.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mrc.cs @@ -23,18 +23,18 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) System.Diagnostics.Debug.Assert(node.ResultCount == 1); System.Diagnostics.Debug.Assert(node.OperandCount == 5); - if (node.Operand1.IsPhysicalRegister && node.Operand2.IsPhysicalRegister && node.Operand3.IsConstant && node.Operand4.IsConstant && node.Operand5.IsConstant) + if (node.Operand1.IsConstant && node.Operand2.IsConstant && node.Operand3.IsConstant && node.Operand4.IsConstant && node.Operand5.IsConstant) { opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append4Bits(0b1110); - opcodeEncoder.Append4BitImmediate(node.Operand4); + opcodeEncoder.Append4BitImmediate(node.Operand2); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); + opcodeEncoder.Append4BitImmediate(node.Operand2); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); - opcodeEncoder.Append4BitImmediate(node.Operand3); + opcodeEncoder.Append4BitImmediate(node.Operand4); opcodeEncoder.Append4BitImmediate(node.Operand5); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); + opcodeEncoder.Append4BitImmediate(node.Operand3); return; } diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mul.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mul.cs index baef22ba2b..26bacee862 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mul.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mul.cs @@ -37,7 +37,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Mvn.cs b/Source/Mosa.Compiler.ARM32/Instructions/Mvn.cs index ed92e985c4..1b7e817f1b 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Mvn.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Mvn.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -44,7 +44,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b1111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand1); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/MvnRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/MvnRegShift.cs index ef381102ec..cdfdc6cdf0 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/MvnRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/MvnRegShift.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Orr.cs b/Source/Mosa.Compiler.ARM32/Instructions/Orr.cs index 82c2054f2b..c4f6e0b354 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Orr.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Orr.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b1100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/OrrRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/OrrRegShift.cs index ad69fc2cfc..4120890a60 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/OrrRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/OrrRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1100); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Ror.cs b/Source/Mosa.Compiler.ARM32/Instructions/Ror.cs index ae4fe4bcb4..e8e443356a 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Ror.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Ror.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand2.Register.RegisterCode); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b1101); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(0b0000); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append5BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Rsb.cs b/Source/Mosa.Compiler.ARM32/Instructions/Rsb.cs index 1973c5dbe3..f7e3c11c10 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Rsb.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Rsb.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0011); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -44,7 +44,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0011); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/RsbRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/RsbRegShift.cs index eae2baed5e..8187312bf5 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/RsbRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/RsbRegShift.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0011); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Rsc.cs b/Source/Mosa.Compiler.ARM32/Instructions/Rsc.cs index 979d128b93..e71605f104 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Rsc.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Rsc.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/RscRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/RscRegShift.cs index 2efc0622d0..ef6b0f4abf 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/RscRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/RscRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0111); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/SMlal.cs b/Source/Mosa.Compiler.ARM32/Instructions/SMlal.cs index 97c1844125..fb5f8a15b8 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/SMlal.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/SMlal.cs @@ -38,7 +38,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result2.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/SMull.cs b/Source/Mosa.Compiler.ARM32/Instructions/SMull.cs index 1dbad31552..7b68c82cae 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/SMull.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/SMull.cs @@ -38,7 +38,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result2.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Sbc.cs b/Source/Mosa.Compiler.ARM32/Instructions/Sbc.cs index 23d7f58975..b1dfa7de82 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Sbc.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Sbc.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/SbcRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/SbcRegShift.cs index ed4aa56c2e..1e13793ca9 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/SbcRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/SbcRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0110); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Stf.cs b/Source/Mosa.Compiler.ARM32/Instructions/Stf.cs index a04088f340..27712850fc 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Stf.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Stf.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b110); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Stm.cs b/Source/Mosa.Compiler.ARM32/Instructions/Stm.cs index 8bea51c887..56d7dddcf9 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Stm.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Stm.cs @@ -12,22 +12,22 @@ namespace Mosa.Compiler.ARM32.Instructions; public sealed class Stm : ARM32Instruction { internal Stm() - : base(0, 2) + : base(0, 3) { } public override void Emit(Node node, OpcodeEncoder opcodeEncoder) { System.Diagnostics.Debug.Assert(node.ResultCount == 0); - System.Diagnostics.Debug.Assert(node.OperandCount == 2); + System.Diagnostics.Debug.Assert(node.OperandCount == 3); - if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant) + if (node.Operand1.IsPhysicalRegister && node.Operand2.IsConstant && node.Operand3.IsConstant) { opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b100); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); - opcodeEncoder.Append1Bit(0b0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); + opcodeEncoder.Append1BitImmediate(node.Operand2); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Str16.cs b/Source/Mosa.Compiler.ARM32/Instructions/Str16.cs index 666b2f5a9d..8ed59aa5d5 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Str16.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Str16.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); @@ -47,7 +47,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Str32.cs b/Source/Mosa.Compiler.ARM32/Instructions/Str32.cs index 7a320f6844..65aefb90f3 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Str32.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Str32.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Str8.cs b/Source/Mosa.Compiler.ARM32/Instructions/Str8.cs index 3449e55684..6bcb363ed8 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Str8.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Str8.cs @@ -27,7 +27,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); @@ -43,7 +43,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b01); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/StrS16.cs b/Source/Mosa.Compiler.ARM32/Instructions/StrS16.cs index bb3c4e54ca..f04b60c452 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/StrS16.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/StrS16.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/StrS8.cs b/Source/Mosa.Compiler.ARM32/Instructions/StrS8.cs index 5e3256af5e..ef0ecd472a 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/StrS8.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/StrS8.cs @@ -26,7 +26,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append4Bits(GetConditionCode(node.ConditionCode)); opcodeEncoder.Append3Bits(0b000); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.UpDirection ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsUpDirection ? 1 : 0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/Sub.cs b/Source/Mosa.Compiler.ARM32/Instructions/Sub.cs index 8ad875b01b..ebfb779882 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/Sub.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/Sub.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0010); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(0b0000); @@ -46,7 +46,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append4Bits(0b0010); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append12BitImmediate(node.Operand2); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/SubRegShift.cs b/Source/Mosa.Compiler.ARM32/Instructions/SubRegShift.cs index d7c3826550..51e3990291 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/SubRegShift.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/SubRegShift.cs @@ -29,7 +29,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append2Bits(0b00); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append4Bits(0b0010); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand3.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/UMlal.cs b/Source/Mosa.Compiler.ARM32/Instructions/UMlal.cs index e8aa764c41..f264954a32 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/UMlal.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/UMlal.cs @@ -38,7 +38,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b1); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result2.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Instructions/UMull.cs b/Source/Mosa.Compiler.ARM32/Instructions/UMull.cs index e03e9de88b..e0017bfe8b 100644 --- a/Source/Mosa.Compiler.ARM32/Instructions/UMull.cs +++ b/Source/Mosa.Compiler.ARM32/Instructions/UMull.cs @@ -38,7 +38,7 @@ public override void Emit(Node node, OpcodeEncoder opcodeEncoder) opcodeEncoder.Append1Bit(0b1); opcodeEncoder.Append1Bit(0b0); opcodeEncoder.Append1Bit(0b0); - opcodeEncoder.Append1Bit(node.StatusRegister == StatusRegister.Set ? 1 : 0); + opcodeEncoder.Append1Bit(node.IsSetFlags ? 1 : 0); opcodeEncoder.Append4Bits(node.Result.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Result2.Register.RegisterCode); opcodeEncoder.Append4Bits(node.Operand1.Register.RegisterCode); diff --git a/Source/Mosa.Compiler.ARM32/Intrinsic/Mrc.cs b/Source/Mosa.Compiler.ARM32/Intrinsic/Mrc.cs index 0595175fea..507bbf7952 100644 --- a/Source/Mosa.Compiler.ARM32/Intrinsic/Mrc.cs +++ b/Source/Mosa.Compiler.ARM32/Intrinsic/Mrc.cs @@ -12,6 +12,6 @@ internal static partial class IntrinsicMethods [IntrinsicMethod("Mosa.Compiler.ARM32.Intrinsic::Mrc")] private static void Mrc(Context context, Transform transform) { - context.SetInstruction(ARM32.Mcr, context.Result, context.Operand1, context.Operand2, context.Operand3, context.Operand4, context.Operand5); + context.SetInstruction(ARM32.Mrc, context.Result, context.Operand1, context.Operand2, context.Operand3, context.Operand4, context.Operand5); } } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseARM32Transform.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseARM32Transform.cs index f8a2a49f1b..eb34cfe18d 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseARM32Transform.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseARM32Transform.cs @@ -60,7 +60,7 @@ public static void TransformLoad(Transform transform, Context context, BaseInstr baseOperand = MoveConstantToRegister(transform, context, baseOperand); offsetOperand = LimitOffsetToRange(transform, context, offsetOperand, 12, out var upDirection); - context.SetInstruction(loadInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, result, baseOperand, offsetOperand); + context.SetInstruction(loadInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, result, baseOperand, offsetOperand); } public static void TransformStore(Transform transform, Context context, BaseInstruction storeInstruction, Operand baseOperand, Operand offsetOperand, Operand sourceOperand) @@ -69,7 +69,7 @@ public static void TransformStore(Transform transform, Context context, BaseInst baseOperand = MoveConstantToRegister(transform, context, baseOperand); offsetOperand = LimitOffsetToRange(transform, context, offsetOperand, 12, out var upDirection); - context.SetInstruction(storeInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, null, baseOperand, offsetOperand, sourceOperand); + context.SetInstruction(storeInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, null, baseOperand, offsetOperand, sourceOperand); } public static void TransformFloatingPointLoad(Transform transform, Context context, BaseInstruction loadInstruction, Operand result, Operand baseOperand, Operand offsetOperand) @@ -87,7 +87,7 @@ public static void TransformFloatingPointLoad(Transform transform, Context conte ConformBaseOffsetToContant(transform, context, ref baseOperand, ref offsetOperand); - context.SetInstruction(loadInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, result, baseOperand, offsetOperand); + context.SetInstruction(loadInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, result, baseOperand, offsetOperand); } public static void TransformFloatingPointStore(Transform transform, Context context, BaseInstruction storeInstruction, Operand baseOperand, Operand offsetOperand, Operand sourceOperand) @@ -106,7 +106,7 @@ public static void TransformFloatingPointStore(Transform transform, Context cont ConformBaseOffsetToContant(transform, context, ref baseOperand, ref offsetOperand); - context.SetInstruction(storeInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, null, baseOperand, offsetOperand, sourceOperand); + context.SetInstruction(storeInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, null, baseOperand, offsetOperand, sourceOperand); } public static Operand MoveConstantToRegister(Transform transform, Context context, Operand operand) diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Add64.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Add64.cs index 05aed5be0a..2c678c4102 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Add64.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Add64.cs @@ -26,7 +26,7 @@ public override void Transform(Context context, Transform transform) op2L = MoveConstantToRegisterOrImmediate(transform, context, op2L); op2H = MoveConstantToRegisterOrImmediate(transform, context, op2H); - context.SetInstruction(ARM32.Add, StatusRegister.Set, resultLow, op1L, op2L); + context.SetInstruction(ARM32.Add, InstructionOption.SetFlags, resultLow, op1L, op2L); context.AppendInstruction(ARM32.Adc, resultHigh, op1H, op2H); } } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/AddCarryOut32.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/AddCarryOut32.cs index cf4bcad143..3287b2903a 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/AddCarryOut32.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/AddCarryOut32.cs @@ -23,7 +23,7 @@ public override void Transform(Context context, Transform transform) operand1 = MoveConstantToRegister(transform, context, operand1); operand2 = MoveConstantToRegisterOrImmediate(transform, context, operand2); - context.SetInstruction(ARM32.Add, StatusRegister.Set, result, operand1, operand2); + context.SetInstruction(ARM32.Add, InstructionOption.SetFlags, result, operand1, operand2); context.AppendInstruction(ARM32.Mov, ConditionCode.Carry, result2, Operand.Constant32_1); context.AppendInstruction(ARM32.Mov, ConditionCode.NoCarry, result2, Operand.Constant32_0); } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ArithShiftRight64.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ArithShiftRight64.cs index c60e77875c..f8b596b00b 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ArithShiftRight64.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ArithShiftRight64.cs @@ -27,7 +27,7 @@ public override void Transform(Context context, Transform transform) var v2 = transform.VirtualRegisters.Allocate32(); context.SetInstruction(ARM32.Asr, resultHigh, op1H, op2L); - context.AppendInstruction(ARM32.Sub, StatusRegister.Set, v1, op2L, Operand.Constant32_0); + context.AppendInstruction(ARM32.Sub, InstructionOption.SetFlags, v1, op2L, Operand.Constant32_0); context.AppendInstruction(ARM32.Lsr, resultLow, op1L, op2L); context.AppendInstruction(ARM32.Rsb, v2, op2L, Operand.Constant32_0); context.AppendInstruction(ARM32.Asr, ConditionCode.Positive, resultHigh, op1H, Operand.Constant32_31); diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse32.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse32.cs index ca95a96f7c..67651afffa 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse32.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse32.cs @@ -24,7 +24,7 @@ public override void Transform(Context context, Transform transform) operand2 = MoveConstantToRegisterOrImmediate(transform, context, operand2); operand3 = MoveConstantToRegisterOrImmediate(transform, context, operand3); - context.SetInstruction(ARM32.Cmp, StatusRegister.Set, null, operand1, Operand.Constant32_0); + context.SetInstruction(ARM32.Cmp, InstructionOption.SetFlags, null, operand1, Operand.Constant32_0); context.AppendInstruction(ARM32.Mov, ConditionCode.Equal, result, operand2); context.AppendInstruction(ARM32.Mov, ConditionCode.NotEqual, result, operand3); } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse64.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse64.cs index f5941fbb72..dd5b6cfcf9 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse64.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/IfThenElse64.cs @@ -30,7 +30,7 @@ public override void Transform(Context context, Transform transform) op3H = MoveConstantToRegisterOrImmediate(transform, context, op3H); context.SetInstruction(ARM32.Orr, v1, op1L, op1H); - context.AppendInstruction(ARM32.Cmp, StatusRegister.Set, null, v1, Operand.Constant32_0); + context.AppendInstruction(ARM32.Cmp, InstructionOption.SetFlags, null, v1, Operand.Constant32_0); context.AppendInstruction(ARM32.Mov, ConditionCode.NotEqual, resultLow, resultLow, op2L); context.AppendInstruction(ARM32.Mov, ConditionCode.NotEqual, resultHigh, resultHigh, op2H); context.AppendInstruction(ARM32.Mov, ConditionCode.Equal, resultLow, resultLow, op3L); diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ShiftRight64.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ShiftRight64.cs index ddb8bf452c..5f0da32364 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ShiftRight64.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/ShiftRight64.cs @@ -41,7 +41,7 @@ public override void Transform(Context context, Transform transform) op2L = MoveConstantToRegister(transform, context, op2L); context.SetInstruction(ARM32.Rsb, v1, op2L, Operand.Constant32_32); - context.AppendInstruction(ARM32.Sub, StatusRegister.Set, v2, op2L, Operand.Constant32_32); + context.AppendInstruction(ARM32.Sub, InstructionOption.SetFlags, v2, op2L, Operand.Constant32_32); context.AppendInstruction(ARM32.Lsr, v3, op1L, op2L); context.AppendInstruction(ARM32.OrrRegShift, v4, v3, op1H, v1, Operand.Constant32_0 /* LSL */); context.AppendInstruction(ARM32.OrrRegShift, ConditionCode.Zero, resultLow, v4, op1H, v2, Operand.Constant32_2 /* ASR */); diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Sub64.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Sub64.cs index d19640a40c..047690f423 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Sub64.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Sub64.cs @@ -24,7 +24,7 @@ public override void Transform(Context context, Transform transform) op2L = MoveConstantToRegisterOrImmediate(transform, context, op2L); op2H = MoveConstantToRegisterOrImmediate(transform, context, op2H); - context.SetInstruction(ARM32.Sub, StatusRegister.Set, resultLow, op1L, op2L); + context.SetInstruction(ARM32.Sub, InstructionOption.SetFlags, resultLow, op1L, op2L); context.AppendInstruction(ARM32.Sbc, resultHigh, op1H, op2H); } } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/SubCarryOut32.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/SubCarryOut32.cs index 0e789b4de8..9f0eba7339 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/SubCarryOut32.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/SubCarryOut32.cs @@ -23,7 +23,7 @@ public override void Transform(Context context, Transform transform) operand1 = MoveConstantToRegister(transform, context, operand1); operand2 = MoveConstantToRegisterOrImmediate(transform, context, operand2); - context.SetInstruction(ARM32.Sub, StatusRegister.Set, result, operand1, operand2); + context.SetInstruction(ARM32.Sub, InstructionOption.SetFlags, result, operand1, operand2); context.AppendInstruction(ARM32.Mov, ConditionCode.Carry, result2, Operand.Constant32_1); context.AppendInstruction(ARM32.Mov, ConditionCode.NoCarry, result2, Operand.Constant32_0); } diff --git a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Truncate64x32.cs b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Truncate64x32.cs index af24d26674..582ab57242 100644 --- a/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Truncate64x32.cs +++ b/Source/Mosa.Compiler.ARM32/Transforms/BaseIR/Truncate64x32.cs @@ -24,6 +24,6 @@ public override void Transform(Context context, Transform transform) op1L = MoveConstantToRegisterOrImmediate(transform, context, op1L); - context.SetInstruction(ARM32.Mov, StatusRegister.Set, resultLow, op1L); + context.SetInstruction(ARM32.Mov, InstructionOption.SetFlags, resultLow, op1L); } } diff --git a/Source/Mosa.Compiler.ARM64/Transforms/BaseARM32Transform.cs b/Source/Mosa.Compiler.ARM64/Transforms/BaseARM32Transform.cs index de71b9bbca..1dbc65eafc 100644 --- a/Source/Mosa.Compiler.ARM64/Transforms/BaseARM32Transform.cs +++ b/Source/Mosa.Compiler.ARM64/Transforms/BaseARM32Transform.cs @@ -120,7 +120,7 @@ public static void TransformLoad(Transform transform, Context context, BaseInstr offsetOperand = MoveConstantToRegister(transform, context, offsetOperand); } - context.SetInstruction(loadInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, result, baseOperand, offsetOperand); + context.SetInstruction(loadInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, result, baseOperand, offsetOperand); } public static void TransformStore(Transform transform, Context context, BaseInstruction storeInstruction, Operand baseOperand, Operand offsetOperand, Operand sourceOperand) @@ -151,7 +151,7 @@ public static void TransformStore(Transform transform, Context context, BaseInst offsetOperand = MoveConstantToRegister(transform, context, offsetOperand); } - context.SetInstruction(storeInstruction, upDirection ? StatusRegister.UpDirection : StatusRegister.DownDirection, null, baseOperand, offsetOperand, sourceOperand); + context.SetInstruction(storeInstruction, upDirection ? InstructionOption.UpDirection : InstructionOption.None, null, baseOperand, offsetOperand, sourceOperand); } public static Operand MoveConstantToRegister(Transform transform, Context context, Operand operand) diff --git a/Source/Mosa.Compiler.Framework/Context.cs b/Source/Mosa.Compiler.Framework/Context.cs index 245ea9da1e..8487e372c0 100644 --- a/Source/Mosa.Compiler.Framework/Context.cs +++ b/Source/Mosa.Compiler.Framework/Context.cs @@ -50,14 +50,14 @@ public int Offset /// Gets or sets the label. /// /// The label. - public bool Marked - { get => Node.Marked; set => Node.Marked = value; } + public bool IsMarked + { get => Node.IsMarked; set => Node.IsMarked = value; } /// /// Gets or sets status resister setting. /// - public StatusRegister StatusRegister - { get => Node.StatusRegister; set => Node.StatusRegister = value; } + public InstructionOption Options + { get => Node.Options; set => Node.Options = value; } /// /// Gets the branch targets. @@ -484,7 +484,7 @@ public void SetInstruction(BaseInstruction instruction, Operand result) /// The instruction. /// if set to true [update status]. /// The result. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result) { Node.SetInstruction(instruction, statusRegister, result); } @@ -518,7 +518,7 @@ public void SetInstruction(BaseInstruction instruction, Operand result, Listif set to true [update status]. /// The result. /// The operand1. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result, Operand operand1) { Node.SetInstruction(instruction, statusRegister, result, operand1); } @@ -605,7 +605,7 @@ public void SetInstruction(BaseInstruction instruction, Operand result, Operand /// The result. /// The operand1. /// The operand2. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result, Operand operand1, Operand operand2) { Node.SetInstruction(instruction, statusRegister, result, operand1, operand2); } @@ -630,7 +630,7 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode condition, /// The condition. /// The result. /// The operand1. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, ConditionCode condition, Operand result, Operand operand1) { Node.SetInstruction(instruction, statusRegister, condition, result, operand1); } @@ -685,7 +685,7 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode condition, /// The result. /// The operand1. /// The operand2. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1, Operand operand2) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, ConditionCode condition, Operand result, Operand operand1, Operand operand2) { Node.SetInstruction(instruction, statusRegister, condition, result, operand1, operand2); } @@ -713,7 +713,7 @@ public void SetInstruction(BaseInstruction instruction, Operand result, Operand /// The operand1. /// The operand2. /// The operand3. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2, Operand operand3) + public void SetInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result, Operand operand1, Operand operand2, Operand operand3) { Node.SetInstruction(instruction, statusRegister, result, operand1, operand2, operand3); } @@ -848,7 +848,7 @@ public void AppendInstruction(BaseInstruction instruction, Operand result) /// The instruction. /// if set to true [update status]. /// The result. - public void AppendInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result) + public void AppendInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result) { AppendInstruction(); Node.SetInstruction(instruction, statusRegister, result); @@ -873,7 +873,7 @@ public void AppendInstruction(BaseInstruction instruction, Operand result, Opera /// if set to true [update status]. /// The result. /// The operand1. - public void AppendInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1) + public void AppendInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result, Operand operand1) { AppendInstruction(); Node.SetInstruction(instruction, statusRegister, result, operand1); @@ -954,7 +954,7 @@ public void AppendInstruction(BaseInstruction instruction, Operand result, Opera /// The result. /// The operand1. /// The operand2. - public void AppendInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2) + public void AppendInstruction(BaseInstruction instruction, InstructionOption statusRegister, Operand result, Operand operand1, Operand operand2) { AppendInstruction(); Node.SetInstruction(instruction, statusRegister, result, operand1, operand2); @@ -1032,7 +1032,7 @@ public void AppendInstruction(BaseInstruction instruction, ConditionCode conditi /// The condition. /// The result. /// The operand1. - public void AppendInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1) + public void AppendInstruction(BaseInstruction instruction, InstructionOption statusRegister, ConditionCode condition, Operand result, Operand operand1) { AppendInstruction(); Node.SetInstruction(instruction, statusRegister, condition, result, operand1); @@ -1091,7 +1091,7 @@ public void AppendInstruction(BaseInstruction instruction, ConditionCode conditi /// The result. /// The operand1. /// The operand2. - public void AppendInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1, Operand operand2) + public void AppendInstruction(BaseInstruction instruction, InstructionOption statusRegister, ConditionCode condition, Operand result, Operand operand1, Operand operand2) { AppendInstruction(); Node.SetInstruction(instruction, statusRegister, condition, result, operand1, operand2); diff --git a/Source/Mosa.Compiler.Framework/StatusRegister.cs b/Source/Mosa.Compiler.Framework/InstructionOption.cs similarity index 52% rename from Source/Mosa.Compiler.Framework/StatusRegister.cs rename to Source/Mosa.Compiler.Framework/InstructionOption.cs index 7b9b0de3ea..56ec7bb8b2 100644 --- a/Source/Mosa.Compiler.Framework/StatusRegister.cs +++ b/Source/Mosa.Compiler.Framework/InstructionOption.cs @@ -3,8 +3,13 @@ namespace Mosa.Compiler.Framework; /// -/// Status Register +/// Instruction Options /// - -public enum StatusRegister -{ NotSet = 0, Set = 1, UpDirection = 3, DownDirection = 4 }; +[Flags] +public enum InstructionOption +{ + None = 0, + SetFlags = 1, + UpDirection = 2, + Marked = 4, +}; diff --git a/Source/Mosa.Compiler.Framework/Node.cs b/Source/Mosa.Compiler.Framework/Node.cs index cf849af7b4..e42e6a129f 100644 --- a/Source/Mosa.Compiler.Framework/Node.cs +++ b/Source/Mosa.Compiler.Framework/Node.cs @@ -42,11 +42,6 @@ public sealed class Node /// private BasicBlock basicBlock; - /// - /// The additional properties of an instruction node - /// - private NodeAddition addition; - #endregion Data Members #region Properties @@ -292,7 +287,63 @@ public Operand Result2 /// public ConditionCode ConditionCode { get; set; } - public StatusRegister StatusRegister { get; set; } + /// + /// Gets or sets a value indicating whether this node is marked. + /// + public bool IsMarked + { + get + { + return Options.HasFlag(InstructionOption.Marked); + } + set + { + Options |= InstructionOption.Marked; + } + } + + /// + /// Gets or sets a value indicating whether this intruction should update the condition codes. + /// + public bool IsSetFlags + { + get + { + return Options.HasFlag(InstructionOption.SetFlags); + } + set + { + Options |= InstructionOption.SetFlags; + } + } + + /// + /// Gets or sets a value indicating whether this intruction has an up direction. + /// + public bool IsUpDirection + { + get + { + return Options.HasFlag(InstructionOption.UpDirection); + } + set + { + Options |= InstructionOption.UpDirection; + } + } + + /// + /// Gets or sets a value indicating whether this intruction has an up direction. + /// + public bool IsDownDirection + { + get + { + return !IsUpDirection; + } + } + + public InstructionOption Options { get; set; } /// /// Holds branch targets @@ -302,9 +353,6 @@ public Operand Result2 /// /// Gets the branch targets count. /// - /// - /// The branch targets count. - /// public int BranchTargetsCount => BranchTargets?.Count ?? 0; /// @@ -315,7 +363,7 @@ public void AddBranchTarget(BasicBlock block) { Debug.Assert(block != null); - (BranchTargets ?? (BranchTargets = new List(1))).Add(block); + (BranchTargets ??= new List(1)).Add(block); Block?.AddBranchInstruction(this); } @@ -333,11 +381,6 @@ public void UpdateBranchTarget(int index, BasicBlock block) Block.AddBranchInstruction(this); } - /// - /// Gets or sets a value indicating whether this is marked. - /// - public bool Marked { get; set; } - /// /// Gets or sets the number of operands /// @@ -348,25 +391,15 @@ public void UpdateBranchTarget(int index, BasicBlock block) /// public int ResultCount { get; set; } - private void CheckAddition() - { - if (addition == null) - { - addition = new NodeAddition(); - } - } - /// /// Gets or sets the phi blocks. /// - /// - /// The phi blocks. - /// - public List PhiBlocks - { - get => addition?.PhiBlocks; - set { CheckAddition(); addition.PhiBlocks = value; } - } + public List PhiBlocks { get; set; } + + /// + /// Gets or sets additional operands + /// + private Operand[] AdditionalOperands { get; set; } /// /// Gets a value indicating whether this is the start instruction. @@ -421,8 +454,7 @@ private void Clear() ClearOperands(); ConditionCode = ConditionCode.Undefined; - StatusRegister = StatusRegister.NotSet; - addition = null; + Options = InstructionOption.None; Block = null; BranchTargets = null; } @@ -435,12 +467,21 @@ public void Empty() ClearOperands(); ConditionCode = ConditionCode.Undefined; - StatusRegister = StatusRegister.NotSet; + Options = InstructionOption.None; Instruction = null; - addition = null; Block.RemoveBranchInstruction(this); BranchTargets = null; + PhiBlocks?.Clear(); + + if (AdditionalOperands != null) + { + for (int i = 0; i < AdditionalOperands.Length; i++) + { + AdditionalOperands[i] = null; + } + } + //Block.DebugCheck(); } @@ -689,8 +730,8 @@ public void RemoveOperand(int index) { case 0: operand1 = operand2; continue; case 1: operand2 = operand3; continue; - case 2: operand3 = addition.AdditionalOperands[i - 2]; continue; - case 3: addition.AdditionalOperands[i - 3] = addition.AdditionalOperands[i - 2 + 1]; continue; + case 2: operand3 = AdditionalOperands[i - 2]; continue; + case 3: AdditionalOperands[i - 3] = AdditionalOperands[i - 2 + 1]; continue; } } @@ -713,39 +754,37 @@ public List GetOperands() /// The operand. private void SetAdditionalOperand(int index, Operand operand) { - CheckAddition(); - //if (addition.AdditionalOperands == null) addition.AdditionalOperands = new Operand[253]; //Debug.Assert(index < 255, @"No Index"); Debug.Assert(index >= 3, "No Index"); SizeAdditionalOperands(index - 3 + 1); - addition.AdditionalOperands[index - 3] = operand; + AdditionalOperands[index - 3] = operand; } private void SizeAdditionalOperands(int index) { - if (addition.AdditionalOperands == null) + if (AdditionalOperands == null) { var minsize = Math.Max(index, 8); - addition.AdditionalOperands = new Operand[minsize]; + AdditionalOperands = new Operand[minsize]; return; } - if (index < addition.AdditionalOperands.Length) + if (index < AdditionalOperands.Length) return; - var old = addition.AdditionalOperands; + var old = AdditionalOperands; var newsize = Math.Max(index, old.Length * 2); - addition.AdditionalOperands = new Operand[newsize]; + AdditionalOperands = new Operand[newsize]; for (var i = 0; i < old.Length; i++) { - addition.AdditionalOperands[i] = old[i]; + AdditionalOperands[i] = old[i]; } } @@ -756,7 +795,7 @@ private void SizeAdditionalOperands(int index) /// private Operand GetAdditionalOperand(int index) { - if (addition == null || addition.AdditionalOperands == null) + if (AdditionalOperands == null) return null; Debug.Assert(index >= 3, "No Index"); @@ -765,7 +804,7 @@ private Operand GetAdditionalOperand(int index) SizeAdditionalOperands(index - 3 + 1); - return addition.AdditionalOperands[index - 3]; + return AdditionalOperands[index - 3]; } /// @@ -784,7 +823,7 @@ public override string ToString() sb.AppendFormat($"{Label:X5}:"); - if (Marked) + if (IsMarked) sb.Append('*'); else sb.Append(' '); @@ -1082,10 +1121,10 @@ public Node(BaseInstruction instruction, Operand result) /// The instruction. /// if set to true [update status]. /// The result. - public Node(BaseInstruction instruction, StatusRegister statusRegister, Operand result) + public Node(BaseInstruction instruction, InstructionOption options, Operand result) : this(instruction, result) { - StatusRegister = statusRegister; + Options = options; } /// @@ -1234,11 +1273,11 @@ public void SetInstruction(BaseInstruction instruction, Operand result) /// The instruction. /// if set to true [update status]. /// The result. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, Operand result) { SetInstruction(instruction, 0, 1); Result = result; - StatusRegister = statusRegister; + Options = options; } /// @@ -1301,12 +1340,12 @@ public void SetInstruction(BaseInstruction instruction, Operand result, Operand /// if set to true [update status]. /// The result. /// The operand1. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, Operand result, Operand operand1) { SetInstruction(instruction, 1, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; - StatusRegister = statusRegister; + Options = options; } /// @@ -1438,7 +1477,7 @@ public void SetInstruction(BaseInstruction instruction, Operand result, Operand /// The operand4. public void SetInstruction(BaseInstruction instruction, Operand result, Operand operand1, Operand operand2, Operand operand3, Operand operand4, Operand operand5) { - SetInstruction(instruction, 4, (byte)(result == null ? 0 : 1)); + SetInstruction(instruction, 5, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; Operand2 = operand2; @@ -1454,8 +1493,8 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode conditionC Operand1 = operand1; Operand2 = operand2; Operand3 = operand3; + Operand4 = operand4; ConditionCode = conditionCode; - SetOperand(3, operand4); } /// @@ -1466,13 +1505,13 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode conditionC /// The result. /// The operand1. /// The operand2. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, Operand result, Operand operand1, Operand operand2) { SetInstruction(instruction, 2, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; Operand2 = operand2; - StatusRegister = statusRegister; + Options = options; } /// @@ -1498,13 +1537,13 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode condition, /// if set to true [update status]. /// The result. /// The operand1. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, ConditionCode condition, Operand result, Operand operand1) { SetInstruction(instruction, 1, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; ConditionCode = condition; - StatusRegister = statusRegister; + Options = options; } /// @@ -1584,14 +1623,14 @@ public void SetInstruction(BaseInstruction instruction, ConditionCode condition, /// The result. /// The operand1. /// The operand2. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, ConditionCode condition, Operand result, Operand operand1, Operand operand2) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, ConditionCode condition, Operand result, Operand operand1, Operand operand2) { SetInstruction(instruction, 2, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; Operand2 = operand2; ConditionCode = condition; - StatusRegister = statusRegister; + Options = options; } /// @@ -1604,14 +1643,14 @@ public void SetInstruction(BaseInstruction instruction, StatusRegister statusReg /// The operand1. /// The operand2. /// The operand3. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2, Operand operand3) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, Operand result, Operand operand1, Operand operand2, Operand operand3) { SetInstruction(instruction, 3, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; Operand2 = operand2; Operand3 = operand3; - StatusRegister = statusRegister; + Options = options; } /// @@ -1624,15 +1663,15 @@ public void SetInstruction(BaseInstruction instruction, StatusRegister statusReg /// The operand1. /// The operand2. /// The operand3. - public void SetInstruction(BaseInstruction instruction, StatusRegister statusRegister, Operand result, Operand operand1, Operand operand2, Operand operand3, Operand operand4) + public void SetInstruction(BaseInstruction instruction, InstructionOption options, Operand result, Operand operand1, Operand operand2, Operand operand3, Operand operand4) { - SetInstruction(instruction, 3, (byte)(result == null ? 0 : 1)); + SetInstruction(instruction, 4, (byte)(result == null ? 0 : 1)); Result = result; Operand1 = operand1; Operand2 = operand2; Operand3 = operand3; Operand4 = operand4; - StatusRegister = statusRegister; + Options = options; } #endregion SetInstructions diff --git a/Source/Mosa.Compiler.Framework/NodeAddition.cs b/Source/Mosa.Compiler.Framework/NodeAddition.cs deleted file mode 100644 index de52ec2169..0000000000 --- a/Source/Mosa.Compiler.Framework/NodeAddition.cs +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright (c) MOSA Project. Licensed under the New BSD License. - -namespace Mosa.Compiler.Framework; - -/// -/// Instruction Node Addition -/// -public sealed class NodeAddition -{ - #region Properties - - /// - /// Gets or sets the phi blocks. - /// - /// - /// The phi blocks. - /// - public List PhiBlocks { get; set; } - - /// - /// Gets or sets additional operands - /// - public Operand[] AdditionalOperands { get; set; } - - #endregion Properties -} diff --git a/Source/Mosa.Compiler.Framework/RegisterAllocator/BaseRegisterAllocator.cs b/Source/Mosa.Compiler.Framework/RegisterAllocator/BaseRegisterAllocator.cs index 03d9afef29..27174da1a9 100644 --- a/Source/Mosa.Compiler.Framework/RegisterAllocator/BaseRegisterAllocator.cs +++ b/Source/Mosa.Compiler.Framework/RegisterAllocator/BaseRegisterAllocator.cs @@ -1458,7 +1458,7 @@ protected void InsertSpillMoves() SpillMoves++; - context.Marked = true; + context.IsMarked = true; } } } diff --git a/Source/Mosa.Compiler.Framework/RegisterAllocator/MoveResolver.cs b/Source/Mosa.Compiler.Framework/RegisterAllocator/MoveResolver.cs index 28525bc20c..e24a8e135a 100644 --- a/Source/Mosa.Compiler.Framework/RegisterAllocator/MoveResolver.cs +++ b/Source/Mosa.Compiler.Framework/RegisterAllocator/MoveResolver.cs @@ -238,7 +238,7 @@ public int InsertResolvingMoves(BaseArchitecture architecture, Operand stackFram break; } - context.Marked = true; + context.IsMarked = true; } return Moves.Count; diff --git a/Source/Mosa.Compiler.x64/Transforms/Optimizations/Manual/Special/Deadcode.cs b/Source/Mosa.Compiler.x64/Transforms/Optimizations/Manual/Special/Deadcode.cs index 583bc0e2a4..f5f4626e1a 100644 --- a/Source/Mosa.Compiler.x64/Transforms/Optimizations/Manual/Special/Deadcode.cs +++ b/Source/Mosa.Compiler.x64/Transforms/Optimizations/Manual/Special/Deadcode.cs @@ -21,7 +21,7 @@ public override bool Match(Context context, Transform transform) if (context.Instruction.IsCall) return false; - if (context.StatusRegister == StatusRegister.Set) + if (context.Node.IsSetFlags) return false; if (context.Result.IsUsed) diff --git a/Source/Mosa.Compiler.x86/Transforms/Optimizations/Manual/Special/Deadcode.cs b/Source/Mosa.Compiler.x86/Transforms/Optimizations/Manual/Special/Deadcode.cs index e1f93ee9ed..a1ab87f162 100644 --- a/Source/Mosa.Compiler.x86/Transforms/Optimizations/Manual/Special/Deadcode.cs +++ b/Source/Mosa.Compiler.x86/Transforms/Optimizations/Manual/Special/Deadcode.cs @@ -23,7 +23,7 @@ public override bool Match(Context context, Transform transform) if (context.Instruction.IsCall) return false; - if (context.StatusRegister == StatusRegister.Set) + if (context.Options == InstructionOption.SetFlags) return false; if (context.Result.IsUsed) diff --git a/Source/Mosa.Kernel.BareMetal.ARM32/BoardType.cs b/Source/Mosa.Kernel.BareMetal.ARM32/BoardType.cs new file mode 100644 index 0000000000..bdffc74d68 --- /dev/null +++ b/Source/Mosa.Kernel.BareMetal.ARM32/BoardType.cs @@ -0,0 +1,16 @@ +// Copyright (c) MOSA Project. Licensed under the New BSD License. + +namespace Mosa.Kernel.BareMetal.ARM32; + +/// +/// Board Type +/// +public enum BoardType +{ + Unknown = 0, + RaspberryPi1 = 1, + RaspberryPi2 = 2, + RaspberryPi3 = 3, + RaspberryPi4 = 4, + RaspberryPi5 = 5, +} diff --git a/Source/Mosa.Kernel.BareMetal.ARM32/MMIO.cs b/Source/Mosa.Kernel.BareMetal.ARM32/MMIO.cs new file mode 100644 index 0000000000..3cda6dab79 --- /dev/null +++ b/Source/Mosa.Kernel.BareMetal.ARM32/MMIO.cs @@ -0,0 +1,31 @@ +// Copyright (c) MOSA Project. Licensed under the New BSD License. + +using Mosa.Runtime; + +namespace Mosa.Kernel.BareMetal.ARM32; + +/// +/// MMIO +/// +public static class MMIO +{ + internal static Pointer MMIOBas; + + public static void Setup() + { + MMIOBas = GetMMIOBase(SystemBoard.BoardType); + } + + private static Pointer GetMMIOBase(BoardType boardType) + { + switch (boardType) + { + case BoardType.RaspberryPi1: return new Pointer(0x20000000); + case BoardType.RaspberryPi3: return new Pointer(0x3F000000); + case BoardType.RaspberryPi4: return new Pointer(0x3F000000); + case BoardType.RaspberryPi5: return new Pointer(0xFE000000); + case BoardType.Unknown: return new Pointer(0x20000000); // default + default: return Pointer.Zero; + } + } +} diff --git a/Source/Mosa.Kernel.BareMetal.ARM32/PlatformPlug.cs b/Source/Mosa.Kernel.BareMetal.ARM32/PlatformPlug.cs index 1b748afcfe..c28cc4764f 100644 --- a/Source/Mosa.Kernel.BareMetal.ARM32/PlatformPlug.cs +++ b/Source/Mosa.Kernel.BareMetal.ARM32/PlatformPlug.cs @@ -1,6 +1,7 @@ // Copyright (c) MOSA Project. Licensed under the New BSD License. using Mosa.DeviceSystem; +using Mosa.Runtime; using Mosa.Runtime.Plug; namespace Mosa.Kernel.BareMetal.ARM32; @@ -11,17 +12,11 @@ public static class PlatformPlug private const uint InitialGCMemoryPoolAddress = 0x03000000; // @ 48MB private const uint InitialGCMemoryPoolSize = 16 * 1024 * 1024; // [Size=16MB] - [Plug("Mosa.Kernel.BareMetal.Platform::EntryPoint")] - public static void EntryPoint() + [Plug("Mosa.Kernel.BareMetal.Platform::Initialization")] + public static void Initialization() { - //var eax = Native.GetMultibootEAX(); - //var ebx = Native.GetMultibootEBX(); - - //Multiboot.Setup(new Pointer(ebx), eax); - - //SSE.Setup(); - //SerialDebug.Setup(); - //PIC.Setup(); + SystemBoard.Setup(); + MMIO.Setup(); } [Plug("Mosa.Kernel.BareMetal.Platform::GetBootReservedRegion")] @@ -76,23 +71,23 @@ public static class InterruptPlug public static class IOPlugPlug { - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In8")] - //public static byte In8(ushort address) => Native.In8(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In8")] + public static byte In8(ushort address) => new Pointer(address).Load8(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In16")] - //public static ushort In16(ushort address) => Native.In16(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In16")] + public static ushort In16(ushort address) => new Pointer(address).Load16(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In32")] - //public static uint In32(ushort address) => Native.In32(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In32")] + public static uint In32(ushort address) => new Pointer(address).Load32(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out8")] - //public static void Out8(ushort address, byte data) => Native.Out8(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out8")] + public static void Out8(ushort address, byte data) => new Pointer(address).Store8(data); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out16")] - //public static void Out16(ushort address, ushort data) => Native.Out16(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out16")] + public static void Out16(ushort address, ushort data) => new Pointer(address).Store16(data); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out32")] - //public static void Out32(ushort address, uint data) => Native.Out32(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out32")] + public static void Out32(ushort address, uint data) => new Pointer(address).Store32(data); } public static class SchedulerPlug diff --git a/Source/Mosa.Kernel.BareMetal.ARM32/FPU.cs b/Source/Mosa.Kernel.BareMetal.ARM32/SerialController.cs similarity index 61% rename from Source/Mosa.Kernel.BareMetal.ARM32/FPU.cs rename to Source/Mosa.Kernel.BareMetal.ARM32/SerialController.cs index b391d0973c..61a14e1eb6 100644 --- a/Source/Mosa.Kernel.BareMetal.ARM32/FPU.cs +++ b/Source/Mosa.Kernel.BareMetal.ARM32/SerialController.cs @@ -1,16 +1,17 @@ // Copyright (c) MOSA Project. Licensed under the New BSD License. -using Mosa.Runtime.ARM32; +using Mosa.Runtime; namespace Mosa.Kernel.BareMetal.ARM32; /// -/// GDT +/// SerialController /// -public static class FPU +public static class SerialController { + internal static Pointer UARTBase; + public static void Setup() { - Native.Nop(); } } diff --git a/Source/Mosa.Kernel.BareMetal.ARM32/SystemBoard.cs b/Source/Mosa.Kernel.BareMetal.ARM32/SystemBoard.cs new file mode 100644 index 0000000000..0f6b1649a8 --- /dev/null +++ b/Source/Mosa.Kernel.BareMetal.ARM32/SystemBoard.cs @@ -0,0 +1,37 @@ +// Copyright (c) MOSA Project. Licensed under the New BSD License. + +using Mosa.Runtime.ARM32; + +namespace Mosa.Kernel.BareMetal.ARM32; + +/// +/// MMIO +/// +public static class SystemBoard +{ + internal static BoardType BoardType; + + public static void Setup() + { + BoardType = GetBoardType(); + } + + private static BoardType GetBoardType() + { + var value = Native.Mrc(15, 0, 0, 0, 0); + + return GetBoardType(value); + } + + private static BoardType GetBoardType(uint register) + { + switch (register) + { + case 0xB76: return BoardType.RaspberryPi1; + case 0xC07: return BoardType.RaspberryPi2; + case 0xD03: return BoardType.RaspberryPi3; + case 0xD08: return BoardType.RaspberryPi4; + default: return BoardType.Unknown; + } + } +} diff --git a/Source/Mosa.Kernel.BareMetal.ARM64/PlatformPlug.cs b/Source/Mosa.Kernel.BareMetal.ARM64/PlatformPlug.cs index c721b0cd02..a761e99942 100644 --- a/Source/Mosa.Kernel.BareMetal.ARM64/PlatformPlug.cs +++ b/Source/Mosa.Kernel.BareMetal.ARM64/PlatformPlug.cs @@ -1,6 +1,7 @@ // Copyright (c) MOSA Project. Licensed under the New BSD License. using Mosa.DeviceSystem; +using Mosa.Runtime; using Mosa.Runtime.Plug; namespace Mosa.Kernel.BareMetal.ARM64; @@ -11,17 +12,9 @@ public static class PlatformPlug private const uint InitialGCMemoryPoolAddress = 0x03000000; // @ 48MB private const uint InitialGCMemoryPoolSize = 16 * 1024 * 1024; // [Size=16MB] - [Plug("Mosa.Kernel.BareMetal.Platform::EntryPoint")] - public static void EntryPoint() + [Plug("Mosa.Kernel.BareMetal.Platform::Initialization")] + public static void Initialization() { - //var eax = Native.GetMultibootEAX(); - //var ebx = Native.GetMultibootEBX(); - - //Multiboot.Setup(new Pointer(ebx), eax); - - //SSE.Setup(); - //SerialDebug.Setup(); - //PIC.Setup(); } [Plug("Mosa.Kernel.BareMetal.Platform::GetBootReservedRegion")] @@ -76,23 +69,23 @@ public static class InterruptPlug public static class IOPlugPlug { - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In8")] - //public static byte In8(ushort address) => Native.In8(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In8")] + public static byte In8(ushort address) => new Pointer(address).Load8(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In16")] - //public static ushort In16(ushort address) => Native.In16(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In16")] + public static ushort In16(ushort address) => new Pointer(address).Load16(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::In32")] - //public static uint In32(ushort address) => Native.In32(address); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::In32")] + public static uint In32(ushort address) => new Pointer(address).Load32(); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out8")] - //public static void Out8(ushort address, byte data) => Native.Out8(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out8")] + public static void Out8(ushort address, byte data) => new Pointer(address).Store8(data); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out16")] - //public static void Out16(ushort address, ushort data) => Native.Out16(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out16")] + public static void Out16(ushort address, ushort data) => new Pointer(address).Store16(data); - //[Plug("Mosa.Kernel.BareMetal.Platform+IO::Out32")] - //public static void Out32(ushort address, uint data) => Native.Out32(address, data); + [Plug("Mosa.Kernel.BareMetal.Platform+IO::Out32")] + public static void Out32(ushort address, uint data) => new Pointer(address).Store32(data); } public static class SchedulerPlug diff --git a/Source/Mosa.Kernel.BareMetal.x64/PlatformPlug.cs b/Source/Mosa.Kernel.BareMetal.x64/PlatformPlug.cs index 94ca58ce5e..bbf7913108 100644 --- a/Source/Mosa.Kernel.BareMetal.x64/PlatformPlug.cs +++ b/Source/Mosa.Kernel.BareMetal.x64/PlatformPlug.cs @@ -17,8 +17,8 @@ public static class PlatformPlug public static void ForceInclude() { } - [Plug("Mosa.Kernel.BareMetal.Platform::EntryPoint")] - public static void EntryPoint() + [Plug("Mosa.Kernel.BareMetal.Platform::Initialization")] + public static void Initialization() { var rax = Native.GetMultibootRAX(); var rbx = Native.GetMultibootRBX(); @@ -30,7 +30,9 @@ public static void EntryPoint() RTC.Setup(); if (BootSettings.EnableDebugOutput) + { SerialController.Setup(SerialController.COM1); + } } [Plug("Mosa.Kernel.BareMetal.Platform::GetBootReservedRegion")] diff --git a/Source/Mosa.Kernel.BareMetal.x86/PlatformPlug.cs b/Source/Mosa.Kernel.BareMetal.x86/PlatformPlug.cs index 67623abf6e..c80aa01d53 100644 --- a/Source/Mosa.Kernel.BareMetal.x86/PlatformPlug.cs +++ b/Source/Mosa.Kernel.BareMetal.x86/PlatformPlug.cs @@ -17,8 +17,8 @@ public static class PlatformPlug public static void ForceInclude() { } - [Plug("Mosa.Kernel.BareMetal.Platform::EntryPoint")] - public static void EntryPoint() + [Plug("Mosa.Kernel.BareMetal.Platform::Initialization")] + public static void Initialization() { var eax = Native.GetMultibootEAX(); var ebx = Native.GetMultibootEBX(); @@ -30,7 +30,9 @@ public static void EntryPoint() RTC.Setup(); if (BootSettings.EnableDebugOutput) + { SerialController.Setup(SerialController.COM1); + } } [Plug("Mosa.Kernel.BareMetal.Platform::GetBootReservedRegion")] diff --git a/Source/Mosa.Kernel.BareMetal/Boot.cs b/Source/Mosa.Kernel.BareMetal/Boot.cs index 2554e62a36..861e43d08f 100644 --- a/Source/Mosa.Kernel.BareMetal/Boot.cs +++ b/Source/Mosa.Kernel.BareMetal/Boot.cs @@ -49,7 +49,7 @@ public static void PlatformInitialization() Console.ForegroundColor = ConsoleColor.LightGreen; Console.Write("> Platform initialization..."); - Platform.EntryPoint(); + Platform.Initialization(); Console.ForegroundColor = ConsoleColor.DarkGray; Console.WriteLine(" [Completed]"); } diff --git a/Source/Mosa.Kernel.BareMetal/Platform.cs b/Source/Mosa.Kernel.BareMetal/Platform.cs index 01f8236563..e37faa2453 100644 --- a/Source/Mosa.Kernel.BareMetal/Platform.cs +++ b/Source/Mosa.Kernel.BareMetal/Platform.cs @@ -9,7 +9,7 @@ public static class Platform { // These methods will be plugged and implemented elsewhere in the platform specific implementation - public static void EntryPoint() + public static void Initialization() { } public static AddressRange GetBootReservedRegion() => new(0, 0); diff --git a/Source/Mosa.Runtime.ARM32/Native.cs b/Source/Mosa.Runtime.ARM32/Native.cs index b923883917..d8deb4c033 100644 --- a/Source/Mosa.Runtime.ARM32/Native.cs +++ b/Source/Mosa.Runtime.ARM32/Native.cs @@ -5,7 +5,7 @@ namespace Mosa.Runtime.ARM32; /// -/// Provides stub methods for selected x86 native assembly instructions. +/// Provides stub methods for selected ARM32 native assembly instructions. /// public static class Native { diff --git a/Source/Mosa.Runtime.ARM64/Native.cs b/Source/Mosa.Runtime.ARM64/Native.cs index 1b900ec46f..fe8efe779d 100644 --- a/Source/Mosa.Runtime.ARM64/Native.cs +++ b/Source/Mosa.Runtime.ARM64/Native.cs @@ -5,7 +5,7 @@ namespace Mosa.Runtime.ARM64; /// -/// Provides stub methods for selected x86 native assembly instructions. +/// Provides stub methods for selected ARM64 native assembly instructions. /// public static class Native { diff --git a/Source/Mosa.Utility.SourceCodeGenerator/BuildInstructionFiles.cs b/Source/Mosa.Utility.SourceCodeGenerator/BuildInstructionFiles.cs index daaa8eb219..a866d42ee2 100644 --- a/Source/Mosa.Utility.SourceCodeGenerator/BuildInstructionFiles.cs +++ b/Source/Mosa.Utility.SourceCodeGenerator/BuildInstructionFiles.cs @@ -853,9 +853,9 @@ private static void GetCodes(string part, ref string code, ref string postcode) case "forward32": code = "EmitForward32"; return; case "supress8": code = "SuppressByte"; return; case "conditional": code = "Append4Bits"; postcode = "GetConditionCode(node.ConditionCode)"; return; - case "status": code = "Append1Bit"; postcode = " == StatusRegister.Set ? 1 : 0"; return; - case "updir": code = "Append1Bit"; postcode = " == StatusRegister.UpDirection ? 1 : 0"; return; - case "downdir": code = "Append1Bit"; postcode = " == StatusRegister.DownDirection ? 1 : 0"; return; + case "status": code = "Append1Bit"; postcode = ".IsSetFlags ? 1 : 0"; return; + case "updir": code = "Append1Bit"; postcode = ".IsUpDirection ? 1 : 0"; return; + case "downdir": code = "Append1Bit"; postcode = ".IsDownDirection ? 1 : 0"; return; case "fp": code = "Append1Bit"; postcode = ".IsR4 ? 0 : 1"; return; case "int": code = "Append1Bit"; postcode = ".IsInteger ? 1 : 0"; return; case "float": code = "Append1Bit"; postcode = ".IsFloatingPoint ? 1 : 0"; return; @@ -923,7 +923,7 @@ private static string GetOperand(string part) "r1" => "node.Result", "r2" => "node.Result2", "label" => "node.BranchTargets[0].Label", - "status" => "node.StatusRegister", + "status" => "node", _ => part }; }