From cf61abe63deb262dccf35b2d4c4ac1f0804d1800 Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Sun, 10 Nov 2024 12:32:22 +0100 Subject: [PATCH 1/2] Fix F4 BSP without UART_DEV. --- hw/bsp/stm32f4/family.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c index 866a09d6fe..b94df6656e 100644 --- a/hw/bsp/stm32f4/family.c +++ b/hw/bsp/stm32f4/family.c @@ -49,6 +49,7 @@ void OTG_HS_IRQHandler(void) { //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ +#ifdef UART_DEV UART_HandleTypeDef UartHandle = { .Instance = UART_DEV, .Init = { @@ -61,6 +62,7 @@ UART_HandleTypeDef UartHandle = { .OverSampling = UART_OVERSAMPLING_16 } }; +#endif void board_init(void) { board_clock_init(); @@ -229,7 +231,7 @@ int board_uart_write(void const *buf, int len) { HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff); return len; #else - (void) buf; (void) len; (void) UartHandle; + (void) buf; (void) len; return 0; #endif } From 2ee7618b130a5c09b15c84ef94072cf0e0522720 Mon Sep 17 00:00:00 2001 From: HiFiPhile Date: Sun, 10 Nov 2024 12:33:20 +0100 Subject: [PATCH 2/2] FIx recurrent suspend ISR. --- src/portable/synopsys/dwc2/dcd_dwc2.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index fe67de8dc1..8f7ae45a33 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -449,7 +449,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { dwc2->dcfg |= DCFG_NZLSOHSK; // Enable required interrupts - dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_USBSUSPM | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM; + dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM; // TX FIFO empty level for interrupt is complete empty uint32_t gahbcfg = dwc2->gahbcfg; @@ -914,7 +914,7 @@ void dcd_int_handler(uint8_t rhport) { if (int_status & GINTSTS_ENUMDNE) { // ENUMDNE is the end of reset where speed of the link is detected dwc2->gintsts = GINTSTS_ENUMDNE; - + dwc2->gintmsk |= GINTMSK_USBSUSPM; tusb_speed_t speed; switch ((dwc2->dsts & DSTS_ENUMSPD_Msk) >> DSTS_ENUMSPD_Pos) { case DSTS_ENUMSPD_HS: @@ -939,11 +939,13 @@ void dcd_int_handler(uint8_t rhport) { if (int_status & GINTSTS_USBSUSP) { dwc2->gintsts = GINTSTS_USBSUSP; + dwc2->gintmsk &= ~GINTMSK_USBSUSPM; dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); } if (int_status & GINTSTS_WKUINT) { dwc2->gintsts = GINTSTS_WKUINT; + dwc2->gintmsk |= GINTMSK_USBSUSPM; dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); } @@ -963,6 +965,7 @@ void dcd_int_handler(uint8_t rhport) { if(int_status & GINTSTS_SOF) { dwc2->gintsts = GINTSTS_SOF; + dwc2->gintmsk |= GINTMSK_USBSUSPM; const uint32_t frame = (dwc2->dsts & DSTS_FNSOF) >> DSTS_FNSOF_Pos; // Disable SOF interrupt if SOF was not explicitly enabled since SOF was used for remote wakeup detection