Linux does not boot with L1 and L2 disabled

[jzbydniewski]

Observed with HS58. When I disable L1 and L2 cache by setting ARC_CACHE=n I can see Linux doesn't boot. No signs of life are shown on UART console.

Debugging with gdb shows it crash with 'invalid mem access' message

backtrace:

I can't reproduce this on nSIM, but that's likely because it doesn't emulate L1/L2 anyway.

[abrodkin]

@jzbydniewski backtrace above is unfortunately quite misleading as a lot has happened between real problem and halting of the CPU at die(). Nice thing about the Linux kernel tough, even if nothing gets printed to the console, you may just inspect contents of the internal buffer by symbol __log_buf - it will have all what was meant to be printed.
Of that information we're interested in the usual crash dump, and in particular contents of ECR & ERET registers.
Please try to get that data and then based on ERET contents let's see which instruction corresponds to that address in your Linux kernel image.

[xxkent]

I can reproduce this problem on HAPS but don't see any messages in UART and __log_buf. I'll see what the problem is there.

[xxkent]

In this case, the error occurred when attempting to execute atomic instructions. Atomic operations like 'ex' and 'atld' don't work when L1D$ and L2D$ are off. If the L1 caches are disabled, then the atomics will automatically be translated in uncached transactions which will target the next level memory, which will be the NoC. The CLN will return error.

Update for 'HS5x Databook: 13.6 Atomic Operations': Atomic instructions are supported by the CLN only on Shared memory, and on locations held in the L2-cache. An error response is returned for other targets.