diff --git a/docs/compiling_hardware.md b/docs/compiling_hardware.md index c2e2ce62..c41ebfdb 100644 --- a/docs/compiling_hardware.md +++ b/docs/compiling_hardware.md @@ -35,7 +35,7 @@ The resulting bitstream will be placed in the directory where you ran the comman !!! note The above command will use a single seed to synthesize the hardware. It is often advantageous to synthesize with multiple seeds to increase the probability of finding a design that meets timing. If you have enough memory, you can synthesize with multiple seeds in parallel. (Requires GNU Parallel to be installed.) - + To do so, you can specify multiple seeds when running the command. For example, to synthesize with seeds 1, 2, 3, and 4, run: ```bash diff --git a/docs/compiling_software.md b/docs/compiling_software.md index d7297ada..ea6ce4b2 100644 --- a/docs/compiling_software.md +++ b/docs/compiling_software.md @@ -113,4 +113,4 @@ mkdocs serve Note that this does not automatically rebuild the hardware and software API reference. You need to rerun `meson compile docs` to do that. - \ No newline at end of file + diff --git a/docs/ensogen.md b/docs/ensogen.md index 62642f56..a36b37cc 100644 --- a/docs/ensogen.md +++ b/docs/ensogen.md @@ -7,7 +7,7 @@ EnsōGen is a software packet generator built on top of the Ensō NIC interface. EnsōGen is built as part of Ensō. Make sure to follow the instructions in [Compiling Software](compiling_software.md) to build Ensō and that you have the [`enso` command](enso_cli.md) installed. To run EnsōGen, you first need to set up the NIC with the right parameters. By default, you should run the `enso` command as follows: - + ```bash enso --fpga --fallback-queues 4 --enable-rr ``` @@ -25,7 +25,7 @@ Both `` and `` are optional but it's recommende Recall that you may obtain the PCIe address of all Ensō NICs in your system by running `scripts/list_enso_nics.sh`. -The `scripts/ensogen.sh` script makes it easier to run EnsōGen by automatically figuring out the hardware rate limiter parameters based on the input pcap file and the desired rate. +The `scripts/ensogen.sh` script makes it easier to run EnsōGen by automatically figuring out the hardware rate limiter parameters based on the input pcap file and the desired rate. You may also choose to run EnsōGen manually. Run the following command to see the available options: diff --git a/docs/hardware/modules/basic_data_mover.md b/docs/hardware/modules/basic_data_mover.md index 5d0d0594..b4c6bfda 100644 --- a/docs/hardware/modules/basic_data_mover.md +++ b/docs/hardware/modules/basic_data_mover.md @@ -50,4 +50,4 @@ - hp_flags: hyper_pipe ## State machines -![Diagram_state_machine_0]( stm_basic_data_mover_00.svg "Diagram") \ No newline at end of file +![Diagram_state_machine_0]( stm_basic_data_mover_00.svg "Diagram") diff --git a/docs/hardware/modules/basic_data_mover.svg b/docs/hardware/modules/basic_data_mover.svg index 2046b6a4..5e68cd8f 100644 --- a/docs/hardware/modules/basic_data_mover.svg +++ b/docs/hardware/modules/basic_data_mover.svg @@ -1 +1 @@ - clk rst meta_valid metadata_t pkt_buffer_readvalid pkt_buffer_readdata emptylist_in_ready disable_pcie pcie_rx_pkt_ready pcie_rx_pkt_almost_full pcie_rx_meta_ready pcie_rx_meta_almost_full pcie_tx_pkt_sop pcie_tx_pkt_eop pcie_tx_pkt_valid [511:0] pcie_tx_pkt_data [5:0] pcie_tx_pkt_empty eth_pkt_ready eth_pkt_almost_full meta_ready [PKTBUF_AWIDTH-1:0] pkt_buffer_address pkt_buffer_read [PKT_AWIDTH-1:0] emptylist_in_data emptylist_in_valid pcie_rx_pkt_sop pcie_rx_pkt_eop pcie_rx_pkt_valid [511:0] pcie_rx_pkt_data [5:0] pcie_rx_pkt_empty pcie_rx_meta_valid pcie_rx_meta_data pcie_tx_pkt_ready eth_pkt_sop eth_pkt_eop eth_pkt_valid [511:0] eth_pkt_data [5:0] eth_pkt_empty \ No newline at end of file + clk rst meta_valid metadata_t pkt_buffer_readvalid pkt_buffer_readdata emptylist_in_ready disable_pcie pcie_rx_pkt_ready pcie_rx_pkt_almost_full pcie_rx_meta_ready pcie_rx_meta_almost_full pcie_tx_pkt_sop pcie_tx_pkt_eop pcie_tx_pkt_valid [511:0] pcie_tx_pkt_data [5:0] pcie_tx_pkt_empty eth_pkt_ready eth_pkt_almost_full meta_ready [PKTBUF_AWIDTH-1:0] pkt_buffer_address pkt_buffer_read [PKT_AWIDTH-1:0] emptylist_in_data emptylist_in_valid pcie_rx_pkt_sop pcie_rx_pkt_eop pcie_rx_pkt_valid [511:0] pcie_rx_pkt_data [5:0] pcie_rx_pkt_empty pcie_rx_meta_valid pcie_rx_meta_data pcie_tx_pkt_ready eth_pkt_sop eth_pkt_eop eth_pkt_valid [511:0] eth_pkt_data [5:0] eth_pkt_empty diff --git a/docs/hardware/modules/configurator.svg b/docs/hardware/modules/configurator.svg index 3cd349d8..fc62a115 100644 --- a/docs/hardware/modules/configurator.svg +++ b/docs/hardware/modules/configurator.svg @@ -1 +1 @@ - clk rst in_config_data in_config_valid out_conf_ft_ready out_conf_ts_ready out_conf_rl_ready in_config_ready flow_table_config_t out_conf_ft_valid timestamp_config_t out_conf_ts_valid rate_limit_config_t out_conf_rl_valid \ No newline at end of file + clk rst in_config_data in_config_valid out_conf_ft_ready out_conf_ts_ready out_conf_rl_ready in_config_ready flow_table_config_t out_conf_ft_valid timestamp_config_t out_conf_ts_valid rate_limit_config_t out_conf_rl_valid diff --git a/docs/hardware/modules/dc_back_pressure.svg b/docs/hardware/modules/dc_back_pressure.svg index 905f409e..ef55828a 100644 --- a/docs/hardware/modules/dc_back_pressure.svg +++ b/docs/hardware/modules/dc_back_pressure.svg @@ -1 +1 @@ - FULL_LEVEL clk rst [31:0] csr_readdata csr_address csr_read csr_write [31:0] csr_writedata almost_full \ No newline at end of file + FULL_LEVEL clk rst [31:0] csr_readdata csr_address csr_read csr_write [31:0] csr_writedata almost_full diff --git a/docs/hardware/modules/esram_wrapper.svg b/docs/hardware/modules/esram_wrapper.svg index 0cbe0b7a..9a45a9a5 100644 --- a/docs/hardware/modules/esram_wrapper.svg +++ b/docs/hardware/modules/esram_wrapper.svg @@ -1 +1 @@ - clk_esram_ref wren [PKTBUF_AWIDTH-1:0] wraddress [519:0] wrdata rden [PKTBUF_AWIDTH-1:0] rdaddress esram_pll_lock clk_esram clk_esram rd_valid [519:0] rddata \ No newline at end of file + clk_esram_ref wren [PKTBUF_AWIDTH-1:0] wraddress [519:0] wrdata rden [PKTBUF_AWIDTH-1:0] rdaddress esram_pll_lock clk_esram clk_esram rd_valid [519:0] rddata diff --git a/docs/hardware/modules/flow_director.svg b/docs/hardware/modules/flow_director.svg index 0102d5a8..f2fc3a80 100644 --- a/docs/hardware/modules/flow_director.svg +++ b/docs/hardware/modules/flow_director.svg @@ -1 +1 @@ - clk rst in_meta_data in_meta_valid out_meta_ready [31:0] nb_fallback_queues enable_rr in_meta_ready out_meta_data out_meta_valid \ No newline at end of file + clk rst in_meta_data in_meta_valid out_meta_ready [31:0] nb_fallback_queues enable_rr in_meta_ready out_meta_data out_meta_valid diff --git a/docs/hardware/modules/flow_table_wrapper.md b/docs/hardware/modules/flow_table_wrapper.md index 376fb00b..83b02d83 100644 --- a/docs/hardware/modules/flow_table_wrapper.md +++ b/docs/hardware/modules/flow_table_wrapper.md @@ -37,4 +37,4 @@ - FT_3: bram_true2port ## State machines -![Diagram_state_machine_0]( stm_flow_table_wrapper_00.svg "Diagram") \ No newline at end of file +![Diagram_state_machine_0]( stm_flow_table_wrapper_00.svg "Diagram") diff --git a/docs/hardware/modules/flow_table_wrapper.svg b/docs/hardware/modules/flow_table_wrapper.svg index 213e03c7..5cecc4e7 100644 --- a/docs/hardware/modules/flow_table_wrapper.svg +++ b/docs/hardware/modules/flow_table_wrapper.svg @@ -1 +1 @@ - clk rst in_meta_data in_meta_valid out_meta_ready flow_table_config_t in_control_valid in_meta_ready out_meta_data out_meta_valid in_control_ready out_control_done [31:0] eviction_cnt \ No newline at end of file + clk rst in_meta_data in_meta_valid out_meta_ready flow_table_config_t in_control_valid in_meta_ready out_meta_data out_meta_valid in_control_ready out_control_done [31:0] eviction_cnt diff --git a/docs/hardware/modules/hash_func.svg b/docs/hardware/modules/hash_func.svg index 0ad772ac..d638cc0a 100644 --- a/docs/hardware/modules/hash_func.svg +++ b/docs/hardware/modules/hash_func.svg @@ -1 +1 @@ - clk rst stall [31:0] initval tuple_t tuple_in tuple_in_valid hashed_valid [31:0] hashed \ No newline at end of file + clk rst stall [31:0] initval tuple_t tuple_in tuple_in_valid hashed_valid [31:0] hashed diff --git a/docs/hardware/modules/hyper_pipe.svg b/docs/hardware/modules/hyper_pipe.svg index 62498b0c..3dc7016f 100644 --- a/docs/hardware/modules/hyper_pipe.svg +++ b/docs/hardware/modules/hyper_pipe.svg @@ -1 +1 @@ - WIDTH NUM_PIPES clk [WIDTH-1:0] din [WIDTH-1:0] dout \ No newline at end of file + WIDTH NUM_PIPES clk [WIDTH-1:0] din [WIDTH-1:0] dout diff --git a/docs/hardware/modules/hyper_pipe_root.svg b/docs/hardware/modules/hyper_pipe_root.svg index f46c7165..3a3dc41a 100644 --- a/docs/hardware/modules/hyper_pipe_root.svg +++ b/docs/hardware/modules/hyper_pipe_root.svg @@ -1 +1 @@ - clk rst clk_datamover rst_datamover in_sop in_eop [511:0] in_data [5:0] in_empty in_valid [511:0] out_data out_valid out_sop out_eop [5:0] out_empty out_almost_full esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] esram_pkt_buf_wraddress [519:0] esram_pkt_buf_wrdata esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] esram_pkt_buf_rdaddress esram_pkt_buf_rd_valid [519:0] esram_pkt_buf_rddata reg_in_sop reg_in_eop [511:0] reg_in_data [5:0] reg_in_empty reg_in_valid [511:0] reg_out_data reg_out_valid reg_out_sop reg_out_eop [5:0] reg_out_empty reg_out_almost_full reg_esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_wraddress [519:0] reg_esram_pkt_buf_wrdata reg_esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_rdaddress reg_esram_pkt_buf_rd_valid [519:0] reg_esram_pkt_buf_rddata \ No newline at end of file + clk rst clk_datamover rst_datamover in_sop in_eop [511:0] in_data [5:0] in_empty in_valid [511:0] out_data out_valid out_sop out_eop [5:0] out_empty out_almost_full esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] esram_pkt_buf_wraddress [519:0] esram_pkt_buf_wrdata esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] esram_pkt_buf_rdaddress esram_pkt_buf_rd_valid [519:0] esram_pkt_buf_rddata reg_in_sop reg_in_eop [511:0] reg_in_data [5:0] reg_in_empty reg_in_valid [511:0] reg_out_data reg_out_valid reg_out_sop reg_out_eop [5:0] reg_out_empty reg_out_almost_full reg_esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_wraddress [519:0] reg_esram_pkt_buf_wrdata reg_esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_rdaddress reg_esram_pkt_buf_rd_valid [519:0] reg_esram_pkt_buf_rddata diff --git a/docs/hardware/modules/hyper_pipe_rst.svg b/docs/hardware/modules/hyper_pipe_rst.svg index b34daf7d..e3d2060d 100644 --- a/docs/hardware/modules/hyper_pipe_rst.svg +++ b/docs/hardware/modules/hyper_pipe_rst.svg @@ -1 +1 @@ - WIDTH NUM_PIPES clk rst [WIDTH-1:0] din [WIDTH-1:0] dout \ No newline at end of file + WIDTH NUM_PIPES clk rst [WIDTH-1:0] din [WIDTH-1:0] dout diff --git a/docs/hardware/modules/input_comp.svg b/docs/hardware/modules/input_comp.svg index 61c3aefe..9500195e 100644 --- a/docs/hardware/modules/input_comp.svg +++ b/docs/hardware/modules/input_comp.svg @@ -1 +1 @@ - clk rst eth_sop eth_eop [511:0] eth_data [5:0] eth_empty eth_valid [PKT_AWIDTH-1:0] emptylist_out_data emptylist_out_valid pkt_ready meta_ready [PKTBUF_AWIDTH-1:0] pkt_buffer_address pkt_buffer_write flit_t pkt_buffer_writedata emptylist_out_ready pkt_sop pkt_eop pkt_valid [511:0] pkt_data [5:0] pkt_empty meta_valid metadata_t meta_data \ No newline at end of file + clk rst eth_sop eth_eop [511:0] eth_data [5:0] eth_empty eth_valid [PKT_AWIDTH-1:0] emptylist_out_data emptylist_out_valid pkt_ready meta_ready [PKTBUF_AWIDTH-1:0] pkt_buffer_address pkt_buffer_write flit_t pkt_buffer_writedata emptylist_out_ready pkt_sop pkt_eop pkt_valid [511:0] pkt_data [5:0] pkt_empty meta_valid metadata_t meta_data diff --git a/docs/hardware/modules/my_stats.md b/docs/hardware/modules/my_stats.md index 2898e2eb..97b0dc1e 100644 --- a/docs/hardware/modules/my_stats.md +++ b/docs/hardware/modules/my_stats.md @@ -39,12 +39,12 @@ - unnamed: ( @(posedge clk_status) ) - **Type:** always - **Description** - //////////////////////// /////////////////////// + //////////////////////// /////////////////////// - unnamed: ( @(posedge clk_rx) ) - **Type:** always - **Description** - //////////////////////// /////////////////////// + //////////////////////// /////////////////////// - unnamed: ( @(posedge clk_tx) ) - **Type:** always - **Description** - //////////////////////// /////////////////////// + //////////////////////// /////////////////////// diff --git a/docs/hardware/modules/my_stats.svg b/docs/hardware/modules/my_stats.svg index 3120b12d..38c92f58 100644 --- a/docs/hardware/modules/my_stats.svg +++ b/docs/hardware/modules/my_stats.svg @@ -1 +1 @@ - arst clk_tx tx_ready tx_valid [511:0] tx_data tx_sop tx_eop [5:0] tx_empty clk_rx rx_sop rx_eop [5:0] rx_empty [511:0] rx_data rx_valid rx_ready clk_status [29:0] status_addr status_read status_write [31:0] status_writedata o_rx_sop o_rx_eop [5:0] o_rx_empty [511:0] o_rx_data o_rx_valid [31:0] status_readdata status_readdata_valid \ No newline at end of file + arst clk_tx tx_ready tx_valid [511:0] tx_data tx_sop tx_eop [5:0] tx_empty clk_rx rx_sop rx_eop [5:0] rx_empty [511:0] rx_data rx_valid rx_ready clk_status [29:0] status_addr status_read status_write [31:0] status_writedata o_rx_sop o_rx_eop [5:0] o_rx_empty [511:0] o_rx_data o_rx_valid [31:0] status_readdata status_readdata_valid diff --git a/docs/hardware/modules/parser.svg b/docs/hardware/modules/parser.svg index be536bb9..71761775 100644 --- a/docs/hardware/modules/parser.svg +++ b/docs/hardware/modules/parser.svg @@ -1 +1 @@ - clk rst disable_pcie [511:0] in_pkt_data in_pkt_valid in_pkt_sop in_pkt_eop [5:0] in_pkt_empty out_pkt_ready in_meta_data in_meta_valid out_meta_ready in_pkt_ready [511:0] out_pkt_data out_pkt_valid out_pkt_sop out_pkt_eop [5:0] out_pkt_empty in_meta_ready out_meta_data out_meta_valid \ No newline at end of file + clk rst disable_pcie [511:0] in_pkt_data in_pkt_valid in_pkt_sop in_pkt_eop [5:0] in_pkt_empty out_pkt_ready in_meta_data in_meta_valid out_meta_ready in_pkt_ready [511:0] out_pkt_data out_pkt_valid out_pkt_sop out_pkt_eop [5:0] out_pkt_empty in_meta_ready out_meta_data out_meta_valid diff --git a/docs/hardware/modules/pcie/bram_mux.svg b/docs/hardware/modules/pcie/bram_mux.svg index 0cbe968a..0990f6a5 100644 --- a/docs/hardware/modules/pcie/bram_mux.svg +++ b/docs/hardware/modules/pcie/bram_mux.svg @@ -1 +1 @@ - NB_BRAMS clk in out \ No newline at end of file + NB_BRAMS clk in out diff --git a/docs/hardware/modules/pcie/cpu_to_fpga.md b/docs/hardware/modules/pcie/cpu_to_fpga.md index bbaebae5..76b44901 100644 --- a/docs/hardware/modules/pcie/cpu_to_fpga.md +++ b/docs/hardware/modules/pcie/cpu_to_fpga.md @@ -75,4 +75,4 @@ - dsc_queue_request_fifo: fifo_wrapper_infill_mlab ## State machines -![Diagram_state_machine_0]( stm_cpu_to_fpga_00.svg "Diagram")![Diagram_state_machine_1]( stm_cpu_to_fpga_11.svg "Diagram") \ No newline at end of file +![Diagram_state_machine_0]( stm_cpu_to_fpga_00.svg "Diagram")![Diagram_state_machine_1]( stm_cpu_to_fpga_11.svg "Diagram") diff --git a/docs/hardware/modules/pcie/cpu_to_fpga.svg b/docs/hardware/modules/pcie/cpu_to_fpga.svg index 4a5b0b01..c5818c7f 100644 --- a/docs/hardware/modules/pcie/cpu_to_fpga.svg +++ b/docs/hardware/modules/pcie/cpu_to_fpga.svg @@ -1 +1 @@ - NB_QUEUES QUEUE_ID_WIDTH clk rst out_pkt_ready [31:0] out_pkt_occup tx_compl_buf_ready [31:0] tx_compl_buf_occup out_config_ready pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable [RB_AWIDTH:0] rb_size [30:0] inflight_desc_limit out_pkt_sop out_pkt_eop out_pkt_valid [511:0] out_pkt_data [5:0] out_pkt_empty tx_compl_buf_data tx_compl_buf_valid out_config_data out_config_valid pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data pcie_rddm_waitrequest q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [31:0] queue_full_signals [31:0] dsc_cnt [31:0] empty_tail_cnt [31:0] dsc_read_cnt [31:0] pkt_read_cnt [31:0] batch_cnt [31:0] max_inflight_dscs [31:0] max_nb_req_dscs \ No newline at end of file + NB_QUEUES QUEUE_ID_WIDTH clk rst out_pkt_ready [31:0] out_pkt_occup tx_compl_buf_ready [31:0] tx_compl_buf_occup out_config_ready pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable [RB_AWIDTH:0] rb_size [30:0] inflight_desc_limit out_pkt_sop out_pkt_eop out_pkt_valid [511:0] out_pkt_data [5:0] out_pkt_empty tx_compl_buf_data tx_compl_buf_valid out_config_data out_config_valid pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data pcie_rddm_waitrequest q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [31:0] queue_full_signals [31:0] dsc_cnt [31:0] empty_tail_cnt [31:0] dsc_read_cnt [31:0] pkt_read_cnt [31:0] batch_cnt [31:0] max_inflight_dscs [31:0] max_nb_req_dscs diff --git a/docs/hardware/modules/pcie/fpga_to_cpu.md b/docs/hardware/modules/pcie/fpga_to_cpu.md index 20a52f7b..82fbedcb 100644 --- a/docs/hardware/modules/pcie/fpga_to_cpu.md +++ b/docs/hardware/modules/pcie/fpga_to_cpu.md @@ -45,4 +45,4 @@ | dma_pkt_flit_drop_cnt | output | [31:0] | | ## State machines -![Diagram_state_machine_0]( stm_fpga_to_cpu_00.svg "Diagram") \ No newline at end of file +![Diagram_state_machine_0]( stm_fpga_to_cpu_00.svg "Diagram") diff --git a/docs/hardware/modules/pcie/fpga_to_cpu.svg b/docs/hardware/modules/pcie/fpga_to_cpu.svg index d4f9f491..9f8f6b7e 100644 --- a/docs/hardware/modules/pcie/fpga_to_cpu.svg +++ b/docs/hardware/modules/pcie/fpga_to_cpu.svg @@ -1 +1 @@ - clk rst pkt_buf_in_data pkt_buf_in_valid pkt_meta_with_queues_t metadata_buf_in_valid tx_compl_buf_in_data tx_compl_buf_in_valid [RB_AWIDTH:0] pkt_rb_size [RB_AWIDTH:0] dsc_rb_size pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response pkt_buf_in_ready [F2C_RB_AWIDTH:0] pkt_buf_occup metadata_buf_in_ready [F2C_RB_AWIDTH:0] metadata_buf_occup tx_compl_buf_in_ready [31:0] tx_compl_buf_occup [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount [31:0] pcie_core_full_cnt [31:0] dma_dsc_cnt [31:0] dma_dsc_drop_cnt [31:0] dma_pkt_flit_cnt [31:0] dma_pkt_flit_drop_cnt \ No newline at end of file + clk rst pkt_buf_in_data pkt_buf_in_valid pkt_meta_with_queues_t metadata_buf_in_valid tx_compl_buf_in_data tx_compl_buf_in_valid [RB_AWIDTH:0] pkt_rb_size [RB_AWIDTH:0] dsc_rb_size pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response pkt_buf_in_ready [F2C_RB_AWIDTH:0] pkt_buf_occup metadata_buf_in_ready [F2C_RB_AWIDTH:0] metadata_buf_occup tx_compl_buf_in_ready [31:0] tx_compl_buf_occup [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount [31:0] pcie_core_full_cnt [31:0] dma_dsc_cnt [31:0] dma_dsc_drop_cnt [31:0] dma_pkt_flit_cnt [31:0] dma_pkt_flit_drop_cnt diff --git a/docs/hardware/modules/pcie/jtag_mmio_arbiter.svg b/docs/hardware/modules/pcie/jtag_mmio_arbiter.svg index ae79f912..829edaef 100644 --- a/docs/hardware/modules/pcie/jtag_mmio_arbiter.svg +++ b/docs/hardware/modules/pcie/jtag_mmio_arbiter.svg @@ -1 +1 @@ - PKT_QUEUE_RD_DELAY pcie_clk jtag_clk pcie_reset_n [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [29:0] status_addr status_read status_write [31:0] status_writedata pcie_readdatavalid_0 [511:0] pcie_readdata_0 [31:0] status_readdata status_readdata_valid rx_dsc_q_table_tails rx_dsc_q_table_heads rx_dsc_q_table_l_addrs rx_dsc_q_table_h_addrs tx_dsc_q_table_tails tx_dsc_q_table_heads tx_dsc_q_table_l_addrs tx_dsc_q_table_h_addrs pkt_q_table_tails pkt_q_table_heads pkt_q_table_l_addrs pkt_q_table_h_addrs [31:0] control_regs \ No newline at end of file + PKT_QUEUE_RD_DELAY pcie_clk jtag_clk pcie_reset_n [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [29:0] status_addr status_read status_write [31:0] status_writedata pcie_readdatavalid_0 [511:0] pcie_readdata_0 [31:0] status_readdata status_readdata_valid rx_dsc_q_table_tails rx_dsc_q_table_heads rx_dsc_q_table_l_addrs rx_dsc_q_table_h_addrs tx_dsc_q_table_tails tx_dsc_q_table_heads tx_dsc_q_table_l_addrs tx_dsc_q_table_h_addrs pkt_q_table_tails pkt_q_table_heads pkt_q_table_l_addrs pkt_q_table_h_addrs [31:0] control_regs diff --git a/docs/hardware/modules/pcie/pcie_core.svg b/docs/hardware/modules/pcie/pcie_core.svg index a8c8c599..26746f38 100644 --- a/docs/hardware/modules/pcie/pcie_core.svg +++ b/docs/hardware/modules/pcie/pcie_core.svg @@ -1 +1 @@ - wire refclk_clk wire pcie_rstn_npor wire pcie_rstn_pin_perst wire wrdm_desc_valid wire [173:0] wrdm_desc_data wire wrdm_prio_valid wire [173:0] wrdm_prio_data wire rddm_desc_valid wire [173:0] rddm_desc_data wire rddm_prio_valid wire [173:0] rddm_prio_data wire [63:0] bas_address wire [63:0] bas_byteenable wire bas_read wire bas_write wire [511:0] bas_writedata wire [3:0] bas_burstcount wire xcvr_rx_in0 wire xcvr_rx_in1 wire xcvr_rx_in2 wire xcvr_rx_in3 wire xcvr_rx_in4 wire xcvr_rx_in5 wire xcvr_rx_in6 wire xcvr_rx_in7 wire xcvr_rx_in8 wire xcvr_rx_in9 wire xcvr_rx_in10 wire xcvr_rx_in11 wire xcvr_rx_in12 wire xcvr_rx_in13 wire xcvr_rx_in14 wire xcvr_rx_in15 [511:0] readdata_0 readdatavalid_0 rddm_waitrequest wire wrdm_desc_ready wire wrdm_prio_ready wire wrdm_tx_valid wire [31:0] wrdm_tx_data wire rddm_desc_ready wire rddm_prio_ready wire rddm_tx_valid wire [31:0] rddm_tx_data wire bas_waitrequest wire [511:0] bas_readdata wire bas_readdatavalid wire [1:0] bas_response wire xcvr_tx_out0 wire xcvr_tx_out1 wire xcvr_tx_out2 wire xcvr_tx_out3 wire xcvr_tx_out4 wire xcvr_tx_out5 wire xcvr_tx_out6 wire xcvr_tx_out7 wire xcvr_tx_out8 wire xcvr_tx_out9 wire xcvr_tx_out10 wire xcvr_tx_out11 wire xcvr_tx_out12 wire xcvr_tx_out13 wire xcvr_tx_out14 wire xcvr_tx_out15 pcie_clk pcie_reset_n [511:0] writedata_0 [PCIE_ADDR_WIDTH-1:0] address_0 write_0 read_0 [63:0] byteenable_0 [511:0] rddm_writedata [63:0] rddm_address rddm_write [63:0] rddm_byteenable \ No newline at end of file + wire refclk_clk wire pcie_rstn_npor wire pcie_rstn_pin_perst wire wrdm_desc_valid wire [173:0] wrdm_desc_data wire wrdm_prio_valid wire [173:0] wrdm_prio_data wire rddm_desc_valid wire [173:0] rddm_desc_data wire rddm_prio_valid wire [173:0] rddm_prio_data wire [63:0] bas_address wire [63:0] bas_byteenable wire bas_read wire bas_write wire [511:0] bas_writedata wire [3:0] bas_burstcount wire xcvr_rx_in0 wire xcvr_rx_in1 wire xcvr_rx_in2 wire xcvr_rx_in3 wire xcvr_rx_in4 wire xcvr_rx_in5 wire xcvr_rx_in6 wire xcvr_rx_in7 wire xcvr_rx_in8 wire xcvr_rx_in9 wire xcvr_rx_in10 wire xcvr_rx_in11 wire xcvr_rx_in12 wire xcvr_rx_in13 wire xcvr_rx_in14 wire xcvr_rx_in15 [511:0] readdata_0 readdatavalid_0 rddm_waitrequest wire wrdm_desc_ready wire wrdm_prio_ready wire wrdm_tx_valid wire [31:0] wrdm_tx_data wire rddm_desc_ready wire rddm_prio_ready wire rddm_tx_valid wire [31:0] rddm_tx_data wire bas_waitrequest wire [511:0] bas_readdata wire bas_readdatavalid wire [1:0] bas_response wire xcvr_tx_out0 wire xcvr_tx_out1 wire xcvr_tx_out2 wire xcvr_tx_out3 wire xcvr_tx_out4 wire xcvr_tx_out5 wire xcvr_tx_out6 wire xcvr_tx_out7 wire xcvr_tx_out8 wire xcvr_tx_out9 wire xcvr_tx_out10 wire xcvr_tx_out11 wire xcvr_tx_out12 wire xcvr_tx_out13 wire xcvr_tx_out14 wire xcvr_tx_out15 pcie_clk pcie_reset_n [511:0] writedata_0 [PCIE_ADDR_WIDTH-1:0] address_0 write_0 read_0 [63:0] byteenable_0 [511:0] rddm_writedata [63:0] rddm_address rddm_write [63:0] rddm_byteenable diff --git a/docs/hardware/modules/pcie/pcie_top.svg b/docs/hardware/modules/pcie/pcie_top.svg index e7af9619..68db4700 100644 --- a/docs/hardware/modules/pcie/pcie_top.svg +++ b/docs/hardware/modules/pcie/pcie_top.svg @@ -1 +1 @@ - pcie_clk pcie_reset_n pcie_wrdm_desc_ready pcie_wrdm_prio_ready pcie_wrdm_tx_valid [31:0] pcie_wrdm_tx_data pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable pcie_rx_pkt_buf_data pcie_rx_pkt_buf_valid pcie_rx_meta_buf_data pcie_rx_meta_buf_valid pcie_tx_pkt_ready [31:0] pcie_tx_pkt_occup out_config_ready clk_status [29:0] status_addr status_read status_write [31:0] status_writedata pcie_wrdm_desc_valid [173:0] pcie_wrdm_desc_data pcie_wrdm_prio_valid [173:0] pcie_wrdm_prio_data pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount pcie_readdatavalid_0 [511:0] pcie_readdata_0 pcie_rddm_waitrequest pcie_rx_pkt_buf_ready [F2C_RB_AWIDTH:0] pcie_rx_pkt_buf_occup pcie_rx_meta_buf_ready [F2C_RB_AWIDTH:0] pcie_rx_meta_buf_occup pcie_tx_pkt_sop pcie_tx_pkt_eop pcie_tx_pkt_valid [511:0] pcie_tx_pkt_data [5:0] pcie_tx_pkt_empty out_config_data out_config_valid disable_pcie sw_reset [31:0] nb_fallback_queues enable_rr eth_port_nb [31:0] pcie_core_full_cnt [31:0] rx_dma_dsc_cnt [31:0] rx_dma_dsc_drop_cnt [31:0] rx_dma_pkt_flit_cnt [31:0] rx_dma_pkt_flit_drop_cnt [31:0] cpu_dsc_buf_full_cnt [31:0] cpu_dsc_buf_in_cnt [31:0] cpu_dsc_buf_out_cnt [31:0] cpu_pkt_buf_full_cnt [31:0] cpu_pkt_buf_in_cnt [31:0] cpu_pkt_buf_out_cnt [31:0] st_ord_in_cnt [31:0] st_ord_out_cnt [31:0] rx_ignored_head_cnt [31:0] tx_q_full_signals [31:0] tx_dsc_cnt [31:0] tx_empty_tail_cnt [31:0] tx_dsc_read_cnt [31:0] tx_pkt_read_cnt [31:0] tx_batch_cnt [31:0] tx_max_inflight_dscs [31:0] tx_max_nb_req_dscs [31:0] tx_dma_pkt_cnt [31:0] rx_pkt_head_upd_cnt [31:0] tx_dsc_tail_upd_cnt [31:0] top_full_signals_1 [31:0] top_full_signals_2 [31:0] status_readdata status_readdata_valid \ No newline at end of file + pcie_clk pcie_reset_n pcie_wrdm_desc_ready pcie_wrdm_prio_ready pcie_wrdm_tx_valid [31:0] pcie_wrdm_tx_data pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable pcie_rx_pkt_buf_data pcie_rx_pkt_buf_valid pcie_rx_meta_buf_data pcie_rx_meta_buf_valid pcie_tx_pkt_ready [31:0] pcie_tx_pkt_occup out_config_ready clk_status [29:0] status_addr status_read status_write [31:0] status_writedata pcie_wrdm_desc_valid [173:0] pcie_wrdm_desc_data pcie_wrdm_prio_valid [173:0] pcie_wrdm_prio_data pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount pcie_readdatavalid_0 [511:0] pcie_readdata_0 pcie_rddm_waitrequest pcie_rx_pkt_buf_ready [F2C_RB_AWIDTH:0] pcie_rx_pkt_buf_occup pcie_rx_meta_buf_ready [F2C_RB_AWIDTH:0] pcie_rx_meta_buf_occup pcie_tx_pkt_sop pcie_tx_pkt_eop pcie_tx_pkt_valid [511:0] pcie_tx_pkt_data [5:0] pcie_tx_pkt_empty out_config_data out_config_valid disable_pcie sw_reset [31:0] nb_fallback_queues enable_rr eth_port_nb [31:0] pcie_core_full_cnt [31:0] rx_dma_dsc_cnt [31:0] rx_dma_dsc_drop_cnt [31:0] rx_dma_pkt_flit_cnt [31:0] rx_dma_pkt_flit_drop_cnt [31:0] cpu_dsc_buf_full_cnt [31:0] cpu_dsc_buf_in_cnt [31:0] cpu_dsc_buf_out_cnt [31:0] cpu_pkt_buf_full_cnt [31:0] cpu_pkt_buf_in_cnt [31:0] cpu_pkt_buf_out_cnt [31:0] st_ord_in_cnt [31:0] st_ord_out_cnt [31:0] rx_ignored_head_cnt [31:0] tx_q_full_signals [31:0] tx_dsc_cnt [31:0] tx_empty_tail_cnt [31:0] tx_dsc_read_cnt [31:0] tx_pkt_read_cnt [31:0] tx_batch_cnt [31:0] tx_max_inflight_dscs [31:0] tx_max_nb_req_dscs [31:0] tx_dma_pkt_cnt [31:0] rx_pkt_head_upd_cnt [31:0] tx_dsc_tail_upd_cnt [31:0] top_full_signals_1 [31:0] top_full_signals_2 [31:0] status_readdata status_readdata_valid diff --git a/docs/hardware/modules/pcie/queue_manager.svg b/docs/hardware/modules/pcie/queue_manager.svg index c1c134be..2a69470b 100644 --- a/docs/hardware/modules/pcie/queue_manager.svg +++ b/docs/hardware/modules/pcie/queue_manager.svg @@ -1 +1 @@ - NB_QUEUES EXTRA_META_BITS UNIT_POINTER QUEUE_ID_WIDTH IN_FIFO_DEPTH OUT_FIFO_DEPTH ALMOST_FULL_THRESHOLD clk rst in_pass_through [QUEUE_ID_WIDTH-1:0] in_queue_id [$clog2(MAX_PKT_SIZE):0] in_size [EXTRA_META_BITS-1:0] in_meta_extra in_meta_valid out_meta_ready q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [RB_AWIDTH:0] rb_size in_meta_ready queue_state_t out_drop [EXTRA_META_BITS-1:0] out_meta_extra out_meta_valid [31:0] full_cnt [31:0] in_cnt [31:0] out_cnt \ No newline at end of file + NB_QUEUES EXTRA_META_BITS UNIT_POINTER QUEUE_ID_WIDTH IN_FIFO_DEPTH OUT_FIFO_DEPTH ALMOST_FULL_THRESHOLD clk rst in_pass_through [QUEUE_ID_WIDTH-1:0] in_queue_id [$clog2(MAX_PKT_SIZE):0] in_size [EXTRA_META_BITS-1:0] in_meta_extra in_meta_valid out_meta_ready q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [RB_AWIDTH:0] rb_size in_meta_ready queue_state_t out_drop [EXTRA_META_BITS-1:0] out_meta_extra out_meta_valid [31:0] full_cnt [31:0] in_cnt [31:0] out_cnt diff --git a/docs/hardware/modules/pcie/rx_dsc_queue_manager.svg b/docs/hardware/modules/pcie/rx_dsc_queue_manager.svg index 2bec33ca..a8de6cc5 100644 --- a/docs/hardware/modules/pcie/rx_dsc_queue_manager.svg +++ b/docs/hardware/modules/pcie/rx_dsc_queue_manager.svg @@ -1 +1 @@ - NB_QUEUES clk rst pkt_meta_with_queues_t in_meta_valid out_meta_ready q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [RB_AWIDTH:0] rb_size in_meta_ready pkt_meta_with_queues_t out_meta_valid [31:0] full_cnt [31:0] in_cnt [31:0] out_cnt \ No newline at end of file + NB_QUEUES clk rst pkt_meta_with_queues_t in_meta_valid out_meta_ready q_table_tails q_table_heads q_table_l_addrs q_table_h_addrs [RB_AWIDTH:0] rb_size in_meta_ready pkt_meta_with_queues_t out_meta_valid [31:0] full_cnt [31:0] in_cnt [31:0] out_cnt diff --git a/docs/hardware/modules/pdu_gen.svg b/docs/hardware/modules/pdu_gen.svg index 0eba575a..8d9a8a38 100644 --- a/docs/hardware/modules/pdu_gen.svg +++ b/docs/hardware/modules/pdu_gen.svg @@ -1 +1 @@ - OUT_PKT_Q_DEPTH OUT_META_Q_DEPTH PKT_Q_ALMOST_FULL_THRESHOLD META_Q_ALMOST_FULL_THRESHOLD clk rst in_sop in_eop [511:0] in_data [5:0] in_empty in_valid in_meta_valid in_meta_data pcie_pkt_buf_ready pcie_meta_buf_ready in_ready in_meta_ready pcie_pkt_buf_data pcie_pkt_buf_valid pcie_meta_buf_data pcie_meta_buf_valid [31:0] out_pkt_queue_occup [31:0] out_meta_queue_occup \ No newline at end of file + OUT_PKT_Q_DEPTH OUT_META_Q_DEPTH PKT_Q_ALMOST_FULL_THRESHOLD META_Q_ALMOST_FULL_THRESHOLD clk rst in_sop in_eop [511:0] in_data [5:0] in_empty in_valid in_meta_valid in_meta_data pcie_pkt_buf_ready pcie_meta_buf_ready in_ready in_meta_ready pcie_pkt_buf_data pcie_pkt_buf_valid pcie_meta_buf_data pcie_meta_buf_valid [31:0] out_pkt_queue_occup [31:0] out_meta_queue_occup diff --git a/docs/hardware/modules/rate_limiter.svg b/docs/hardware/modules/rate_limiter.svg index 2ad4a239..1b710f89 100644 --- a/docs/hardware/modules/rate_limiter.svg +++ b/docs/hardware/modules/rate_limiter.svg @@ -1 +1 @@ - clk rst [511:0] in_pkt_data in_pkt_valid in_pkt_sop in_pkt_eop [5:0] in_pkt_empty out_pkt_ready rate_limit_config_t conf_rl_valid in_pkt_ready [511:0] out_pkt_data out_pkt_valid out_pkt_sop out_pkt_eop [5:0] out_pkt_empty conf_rl_ready \ No newline at end of file + clk rst [511:0] in_pkt_data in_pkt_valid in_pkt_sop in_pkt_eop [5:0] in_pkt_empty out_pkt_ready rate_limit_config_t conf_rl_valid in_pkt_ready [511:0] out_pkt_data out_pkt_valid out_pkt_sop out_pkt_eop [5:0] out_pkt_empty conf_rl_ready diff --git a/docs/hardware/modules/timestamp.svg b/docs/hardware/modules/timestamp.svg index e2bc8f26..f1cc9897 100644 --- a/docs/hardware/modules/timestamp.svg +++ b/docs/hardware/modules/timestamp.svg @@ -1 +1 @@ - TIMESTAMP_WIDTH TIMESTAMP_OFFSET clk rst [511:0] rx_in_pkt_data rx_in_pkt_valid rx_in_pkt_sop rx_in_pkt_eop [5:0] rx_in_pkt_empty rx_out_pkt_ready [511:0] tx_in_pkt_data tx_in_pkt_valid tx_in_pkt_sop tx_in_pkt_eop [5:0] tx_in_pkt_empty tx_out_pkt_ready timestamp_config_t conf_ts_valid rx_in_pkt_ready [511:0] rx_out_pkt_data rx_out_pkt_valid rx_out_pkt_sop rx_out_pkt_eop [5:0] rx_out_pkt_empty tx_in_pkt_ready [511:0] tx_out_pkt_data tx_out_pkt_valid tx_out_pkt_sop tx_out_pkt_eop [5:0] tx_out_pkt_empty conf_ts_ready \ No newline at end of file + TIMESTAMP_WIDTH TIMESTAMP_OFFSET clk rst [511:0] rx_in_pkt_data rx_in_pkt_valid rx_in_pkt_sop rx_in_pkt_eop [5:0] rx_in_pkt_empty rx_out_pkt_ready [511:0] tx_in_pkt_data tx_in_pkt_valid tx_in_pkt_sop tx_in_pkt_eop [5:0] tx_in_pkt_empty tx_out_pkt_ready timestamp_config_t conf_ts_valid rx_in_pkt_ready [511:0] rx_out_pkt_data rx_out_pkt_valid rx_out_pkt_sop rx_out_pkt_eop [5:0] rx_out_pkt_empty tx_in_pkt_ready [511:0] tx_out_pkt_data tx_out_pkt_valid tx_out_pkt_sop tx_out_pkt_eop [5:0] tx_out_pkt_empty conf_ts_ready diff --git a/docs/hardware/modules/top.md b/docs/hardware/modules/top.md index b709e618..2fcafb70 100644 --- a/docs/hardware/modules/top.md +++ b/docs/hardware/modules/top.md @@ -121,4 +121,3 @@ - pcie: pcie_top - **Description** ///////////////PCIe logic //////////////// - diff --git a/docs/hardware/modules/top.svg b/docs/hardware/modules/top.svg index 76b82e13..51db9b80 100644 --- a/docs/hardware/modules/top.svg +++ b/docs/hardware/modules/top.svg @@ -1 +1 @@ - clk rst clk_datamover rst_datamover clk_pcie rst_pcie in_sop in_eop [511:0] in_data [5:0] in_empty in_valid out_almost_full pcie_wrdm_desc_ready pcie_wrdm_prio_ready pcie_wrdm_tx_valid [31:0] pcie_wrdm_tx_data pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable esram_pkt_buf_rd_valid [519:0] esram_pkt_buf_rddata clk_status [29:0] status_addr status_read status_write [31:0] status_writedata [511:0] out_data out_valid out_sop out_eop [5:0] out_empty eth_port_nb pcie_wrdm_desc_valid [173:0] pcie_wrdm_desc_data pcie_wrdm_prio_valid [173:0] pcie_wrdm_prio_data pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount pcie_readdatavalid_0 [511:0] pcie_readdata_0 pcie_rddm_waitrequest reg_esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_wraddress [519:0] reg_esram_pkt_buf_wrdata reg_esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_rdaddress [31:0] status_readdata status_readdata_valid \ No newline at end of file + clk rst clk_datamover rst_datamover clk_pcie rst_pcie in_sop in_eop [511:0] in_data [5:0] in_empty in_valid out_almost_full pcie_wrdm_desc_ready pcie_wrdm_prio_ready pcie_wrdm_tx_valid [31:0] pcie_wrdm_tx_data pcie_rddm_desc_ready pcie_rddm_prio_ready pcie_rddm_tx_valid [31:0] pcie_rddm_tx_data pcie_bas_waitrequest [511:0] pcie_bas_readdata pcie_bas_readdatavalid [1:0] pcie_bas_response [PCIE_ADDR_WIDTH-1:0] pcie_address_0 pcie_write_0 pcie_read_0 [511:0] pcie_writedata_0 [63:0] pcie_byteenable_0 [63:0] pcie_rddm_address pcie_rddm_write [511:0] pcie_rddm_writedata [63:0] pcie_rddm_byteenable esram_pkt_buf_rd_valid [519:0] esram_pkt_buf_rddata clk_status [29:0] status_addr status_read status_write [31:0] status_writedata [511:0] out_data out_valid out_sop out_eop [5:0] out_empty eth_port_nb pcie_wrdm_desc_valid [173:0] pcie_wrdm_desc_data pcie_wrdm_prio_valid [173:0] pcie_wrdm_prio_data pcie_rddm_desc_valid [173:0] pcie_rddm_desc_data pcie_rddm_prio_valid [173:0] pcie_rddm_prio_data [63:0] pcie_bas_address [63:0] pcie_bas_byteenable pcie_bas_read pcie_bas_write [511:0] pcie_bas_writedata [3:0] pcie_bas_burstcount pcie_readdatavalid_0 [511:0] pcie_readdata_0 pcie_rddm_waitrequest reg_esram_pkt_buf_wren [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_wraddress [519:0] reg_esram_pkt_buf_wrdata reg_esram_pkt_buf_rden [PKTBUF_AWIDTH-1:0] reg_esram_pkt_buf_rdaddress [31:0] status_readdata status_readdata_valid diff --git a/frontend/enso/ensogen.py b/frontend/enso/ensogen.py index 5736bf88..ee8fc07c 100644 --- a/frontend/enso/ensogen.py +++ b/frontend/enso/ensogen.py @@ -254,8 +254,9 @@ def update_stats(self) -> None: # Retrieve the latest stats. with tempfile.TemporaryDirectory() as tmp: local_stats = f"{tmp}/stats.csv" - download_file(self.nic.host_name, self.stats_file, local_stats, - self.log_file) + download_file( + self.nic.host_name, self.stats_file, local_stats, self.log_file + ) parsed_stats = EnsoGenStats(local_stats) stats_summary = parsed_stats.get_summary(calculate_tx_mean) diff --git a/hardware/input_gen/generate_synthetic_trace.cpp b/hardware/input_gen/generate_synthetic_trace.cpp index b891cac9..8c8684ad 100644 --- a/hardware/input_gen/generate_synthetic_trace.cpp +++ b/hardware/input_gen/generate_synthetic_trace.cpp @@ -30,6 +30,13 @@ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include +#include +#include +#include +#include +#include + #include #include #include @@ -37,28 +44,16 @@ #include #include -#include -#include -#include -#include -#include -#include - - constexpr uint32_t kMaxPktSize = 1518; constexpr char kDstMac[] = "aa:aa:aa:aa:aa:aa"; constexpr char kSrcMac[] = "bb:bb:bb:bb:bb:bb"; -static constexpr uint32_t ip(uint8_t a, uint8_t b, uint8_t c, uint8_t d) { - return (((uint32_t) a) << 24) - | (((uint32_t) b) << 16) - | (((uint32_t) c) << 8) - | ((uint32_t) d); +static constexpr uint32_t ip(uint8_t a, uint8_t b, uint8_t c, uint8_t d) { + return (((uint32_t)a) << 24) | (((uint32_t)b) << 16) | (((uint32_t)c) << 8) | + ((uint32_t)d); } - -int main(int argc, char const *argv[]) -{ +int main(int argc, char const* argv[]) { if (argc != 6) { std::cerr << "Usage: " << argv[0] << " NB_PKTS PKT_SIZE NB_SRC NB_DST " << "OUTPUT_PCAP" << std::endl; @@ -83,8 +78,8 @@ int main(int argc, char const *argv[]) struct ether_addr dst_mac = *ether_aton(kDstMac); struct ether_addr src_mac = *ether_aton(kSrcMac); - pcap_t *pd; - pcap_dumper_t *pdumper; + pcap_t* pd; + pcap_dumper_t* pdumper; pd = pcap_open_dead(DLT_EN10MB, 65535); pdumper = pcap_dump_open(pd, output_pcap.c_str()); @@ -94,12 +89,12 @@ int main(int argc, char const *argv[]) uint8_t pkt[kMaxPktSize]; memset(pkt, 0, kMaxPktSize); - struct ether_header* l2_hdr = (struct ether_header*) &pkt; - struct iphdr* l3_hdr = (struct iphdr*) (l2_hdr + 1); - struct udphdr* l4_hdr = (struct udphdr*) (l3_hdr + 1); + struct ether_header* l2_hdr = (struct ether_header*)&pkt; + struct iphdr* l3_hdr = (struct iphdr*)(l2_hdr + 1); + struct udphdr* l4_hdr = (struct udphdr*)(l3_hdr + 1); - *((struct ether_addr*) &l2_hdr->ether_dhost) = dst_mac; - *((struct ether_addr*) &l2_hdr->ether_shost) = src_mac; + *((struct ether_addr*)&l2_hdr->ether_dhost) = dst_mac; + *((struct ether_addr*)&l2_hdr->ether_shost) = src_mac; l2_hdr->ether_type = htons(ETHERTYPE_IP); l3_hdr->ihl = 5; @@ -117,7 +112,7 @@ int main(int argc, char const *argv[]) uint32_t dst_ip = ip(192, 168, 0, 0); uint32_t mss = - pkt_size - sizeof(*l2_hdr) - sizeof(*l3_hdr) - sizeof(*l4_hdr) - 4; + pkt_size - sizeof(*l2_hdr) - sizeof(*l3_hdr) - sizeof(*l4_hdr) - 4; int nb_pkts = 0; @@ -137,11 +132,11 @@ int main(int argc, char const *argv[]) l4_hdr->len = htons(sizeof(*l4_hdr) + mss); ++(ts.tv_usec); - pcap_dump((u_char*) pdumper, &pkt_hdr, pkt); + pcap_dump((u_char*)pdumper, &pkt_hdr, pkt); ++nb_pkts; if (nb_pkts >= total_nb_packets) { - break; + break; } } } diff --git a/hardware/src/common/alt_aeuex_avalon_mm_read_combine.v b/hardware/src/common/alt_aeuex_avalon_mm_read_combine.v index 8b0572c6..62356239 100644 --- a/hardware/src/common/alt_aeuex_avalon_mm_read_combine.v +++ b/hardware/src/common/alt_aeuex_avalon_mm_read_combine.v @@ -1,13 +1,13 @@ // (C) 2001-2019 Intel Corporation. All rights reserved. -// Your use of Intel Corporation's design tools, logic functions and other -// software and tools, and its AMPP partner logic functions, and any output -// files from any of the foregoing (including device programming or simulation -// files), and any associated documentation or information are expressly subject -// to the terms and conditions of the Intel Program License Subscription -// Agreement, Intel FPGA IP License Agreement, or other applicable -// license agreement, including, without limitation, that your use is for the -// sole purpose of programming logic devices manufactured by Intel and sold by -// Intel or its authorized distributors. Please refer to the applicable +// Your use of Intel Corporation's design tools, logic functions and other +// software and tools, and its AMPP partner logic functions, and any output +// files from any of the foregoing (including device programming or simulation +// files), and any associated documentation or information are expressly subject +// to the terms and conditions of the Intel Program License Subscription +// Agreement, Intel FPGA IP License Agreement, or other applicable +// license agreement, including, without limitation, that your use is for the +// sole purpose of programming logic devices manufactured by Intel and sold by +// Intel or its authorized distributors. Please refer to the applicable // agreement for further details. @@ -29,9 +29,9 @@ module alt_aeuex_avalon_mm_read_combine #( output reg [DAT_WIDTH-1:0] host_readdata, output reg host_readdata_valid, output host_waitrequest, - + input [NUM_CLIENTS-1:0] client_readdata_valid, - input [NUM_CLIENTS*DAT_WIDTH-1:0] client_readdata + input [NUM_CLIENTS*DAT_WIDTH-1:0] client_readdata ); ///////////////////////// @@ -66,9 +66,9 @@ generate for (i=0; ilength); - uint32_t good_transmission_length = (uint32_t)std::min( - tx_args.total_remaining_good_bytes, - (uint64_t)tx_args.current_enso_pipe->good_bytes); + uint32_t good_transmission_length = + (uint32_t)std::min(tx_args.total_remaining_good_bytes, + (uint64_t)tx_args.current_enso_pipe->good_bytes); uint64_t phys_addr = tx_args.current_enso_pipe->phys_addr; @@ -861,10 +861,9 @@ int main(int argc, char** argv) { } else { // Send and receive packets within the same thread. - std::thread rx_tx_thread = - std::thread([&parsed_args, &rx_stats, total_bytes_to_send, - total_good_bytes_to_send, pkts_in_last_buffer, &enso_pipes, - &tx_stats] { + std::thread rx_tx_thread = std::thread( + [&parsed_args, &rx_stats, total_bytes_to_send, total_good_bytes_to_send, + pkts_in_last_buffer, &enso_pipes, &tx_stats] { std::this_thread::sleep_for(std::chrono::milliseconds(500)); for (uint32_t i = 0; i < parsed_args.nb_queues; ++i) { diff --git a/software/src/enso/pipe.cpp b/software/src/enso/pipe.cpp index c057e296..a4a16b02 100644 --- a/software/src/enso/pipe.cpp +++ b/software/src/enso/pipe.cpp @@ -86,9 +86,7 @@ void RxPipe::Free(uint32_t nb_bytes) { advance_pipe(&internal_rx_pipe_, nb_bytes); } -void RxPipe::Prefetch() { - prefetch_pipe(&internal_rx_pipe_); -} +void RxPipe::Prefetch() { prefetch_pipe(&internal_rx_pipe_); } void RxPipe::Clear() { fully_advance_pipe(&internal_rx_pipe_); } diff --git a/software/src/pcie.cpp b/software/src/pcie.cpp index 388c3a91..d6aedc4a 100644 --- a/software/src/pcie.cpp +++ b/software/src/pcie.cpp @@ -332,7 +332,6 @@ __get_new_tails(struct NotificationBufPair* notification_buf_pair) { return nb_consumed_notifications; } - uint16_t get_new_tails(struct NotificationBufPair* notification_buf_pair) { return __get_new_tails(notification_buf_pair); } diff --git a/software/src/pcie.h b/software/src/pcie.h index d1cb8276..08ccf932 100644 --- a/software/src/pcie.h +++ b/software/src/pcie.h @@ -93,7 +93,7 @@ int dma_init(struct NotificationBufPair* notification_buf_pair, /** * Get latest tails for the pipes associated with the given notification buffer. - * + * * @param notification_buf_pair Notification buffer to get data from. * @return Number of notifications received. */ @@ -150,7 +150,7 @@ void fully_advance_pipe(struct RxEnsoPipeInternal* enso_pipe); /** * Prefetches a given Enso Pipe. - * + * * @param enso_pipe Enso pipe to prefetch. */ void prefetch_pipe(struct RxEnsoPipeInternal* enso_pipe);