diff --git a/.cproject b/.cproject
index 1798d45..d9be8c6 100644
--- a/.cproject
+++ b/.cproject
@@ -24,7 +24,7 @@
-
+
@@ -158,7 +158,7 @@
-
+
diff --git a/.mxproject b/.mxproject
index a4074a1..5a799b5 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,34 +1,32 @@
[PreviousLibFiles]
-LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;
+LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;
[PreviousUsedCubeIDEFiles]
-SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/dma.c;Core/Src/i2c.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32l4xx_it.c;Core/Src/stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;;;
+SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/dma.c;Core/Src/i2c.c;Core/Src/usart.c;Core/Src/stm32l4xx_it.c;Core/Src/stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;;;
HeaderPath=Drivers/STM32L4xx_HAL_Driver/Inc;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32L4xx/Include;Drivers/CMSIS/Include;Core/Inc;
CDefines=USE_HAL_DRIVER;STM32L476xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousGenFiles]
AdvancedFolderStructure=true
-HeaderFileListSize=8
+HeaderFileListSize=7
HeaderFiles#0=../Core/Inc/gpio.h
HeaderFiles#1=../Core/Inc/dma.h
HeaderFiles#2=../Core/Inc/i2c.h
-HeaderFiles#3=../Core/Inc/tim.h
-HeaderFiles#4=../Core/Inc/usart.h
-HeaderFiles#5=../Core/Inc/stm32l4xx_it.h
-HeaderFiles#6=../Core/Inc/stm32l4xx_hal_conf.h
-HeaderFiles#7=../Core/Inc/main.h
+HeaderFiles#3=../Core/Inc/usart.h
+HeaderFiles#4=../Core/Inc/stm32l4xx_it.h
+HeaderFiles#5=../Core/Inc/stm32l4xx_hal_conf.h
+HeaderFiles#6=../Core/Inc/main.h
HeaderFolderListSize=1
HeaderPath#0=../Core/Inc
HeaderFiles=;
-SourceFileListSize=8
+SourceFileListSize=7
SourceFiles#0=../Core/Src/gpio.c
SourceFiles#1=../Core/Src/dma.c
SourceFiles#2=../Core/Src/i2c.c
-SourceFiles#3=../Core/Src/tim.c
-SourceFiles#4=../Core/Src/usart.c
-SourceFiles#5=../Core/Src/stm32l4xx_it.c
-SourceFiles#6=../Core/Src/stm32l4xx_hal_msp.c
-SourceFiles#7=../Core/Src/main.c
+SourceFiles#3=../Core/Src/usart.c
+SourceFiles#4=../Core/Src/stm32l4xx_it.c
+SourceFiles#5=../Core/Src/stm32l4xx_hal_msp.c
+SourceFiles#6=../Core/Src/main.c
SourceFolderListSize=1
SourcePath#0=../Core/Src
SourceFiles=;
diff --git a/Core/External/Proto/Buffer/Request/request_buffer.cpp b/Core/External/Proto/Buffer/Request/request_buffer.cpp
index 3aeb2f2..b580be9 100644
--- a/Core/External/Proto/Buffer/Request/request_buffer.cpp
+++ b/Core/External/Proto/Buffer/Request/request_buffer.cpp
@@ -1,41 +1,39 @@
#include "request_buffer.h"
-template
-RequestBuffer::RequestBuffer() : index(0), size(0), bytes{0} {
+RequestBuffer::RequestBuffer() : index(0), size(0), bytes{nullptr} {
}
-//template
-//uint8_t* RequestBuffer::get_raw_buffer() {
-// return this->bytes[0];
-//}
-
-template
-void RequestBuffer::set_raw_buffer(uint8_t* src) {
+void RequestBuffer::set_raw_buffer(uint8_t* src) {
this->bytes = src;
};
-template
-uint32_t RequestBuffer::get_size() const {
+void RequestBuffer::clear() {
+ this->index = 0;
+}
+
+uint32_t RequestBuffer::get_size() const {
return index;
}
-template
-uint32_t RequestBuffer::get_max_size() const {
+uint32_t RequestBuffer::get_max_size() const {
return size;
}
-template
-bool RequestBuffer::peek(uint8_t &byte) const {
+void RequestBuffer::set_max_size(uint32_t value) {
+ this->size = value;
+}
+
+bool RequestBuffer::peek(uint8_t &byte) const {
bool result = this->index < this->size;
if (result) {
- byte = *this->bytes[this->index];
+ byte = this->bytes[this->index];
}
return result;
}
-template
-bool RequestBuffer::advance() {
+
+bool RequestBuffer::advance() {
const bool result = this->index < this->size;
if (result) {
++this->index;
@@ -43,8 +41,7 @@ bool RequestBuffer::advance() {
return result;
}
-template
-bool RequestBuffer::advance(const uint32_t src) {
+bool RequestBuffer::advance(const uint32_t src) {
this->index += src;
const bool result = this->index < this->size;
if (result) {
@@ -54,15 +51,12 @@ bool RequestBuffer::advance(const uint32_t src) {
return result;
}
-template
-bool RequestBuffer::pop(uint8_t &byte) {
+bool RequestBuffer::pop(uint8_t &byte) {
bool result = this->index < this->size;
if (result) {
- byte = *this->bytes[this->index];
+ byte = this->bytes[this->index];
++this->index;
}
return result;
}
-
-template class RequestBuffer;
\ No newline at end of file
diff --git a/Core/External/Proto/Buffer/Request/request_buffer.h b/Core/External/Proto/Buffer/Request/request_buffer.h
index 795d9b8..3df0943 100644
--- a/Core/External/Proto/Buffer/Request/request_buffer.h
+++ b/Core/External/Proto/Buffer/Request/request_buffer.h
@@ -5,34 +5,27 @@
#include
-#define DEFAULT_REQUEST_BUFFER_SIZE 6
-
/**
* Represents request buffer implementation for protocol buffers serialization.
- *
- * @tparam BUFFER_SIZE - given size of the internal request buffer.
*/
-template
class RequestBuffer : public EmbeddedProto::ReadBufferInterface {
public:
RequestBuffer();
~RequestBuffer() override = default;
-// /**
-// * Retrieves raw buffer used for direct data injection.
-// *
-// * @return raw buffer reference.
-// */
-// uint8_t* get_raw_buffer();
-
/**
- * Retrieves raw buffer used for direct data injection.
+ * Sets raw buffer used for direct data injection.
*
- * @return raw buffer reference.
+ * @param src - given buffer to be set.
*/
void set_raw_buffer(uint8_t* src);
+ /**
+ * Resets index value for buffer.
+ */
+ void clear();
+
/**
* @see EmbeddedProto::ReadBufferInterface
*/
@@ -43,6 +36,13 @@ class RequestBuffer : public EmbeddedProto::ReadBufferInterface {
*/
[[nodiscard]] uint32_t get_max_size() const override;
+ /**
+ * Sets buffer max size.
+ *
+ * @param value - given buffer max size.
+ */
+ void set_max_size(uint32_t value);
+
/**
* @see EmbeddedProto::ReadBufferInterface
*/
@@ -72,12 +72,12 @@ class RequestBuffer : public EmbeddedProto::ReadBufferInterface {
/**
* Represents max size of the buffer.
*/
- uint32_t size = BUFFER_SIZE;
+ uint32_t size;
/**
* Represents current buffer data.
*/
- uint8_t *bytes[BUFFER_SIZE];
+ uint8_t *bytes;
};
#endif //LIGHT_DETECTOR_REQUEST_BUFFER_H
diff --git a/Core/External/Proto/Buffer/Response/response_buffer.cpp b/Core/External/Proto/Buffer/Response/response_buffer.cpp
index d7c6145..a53e6a6 100644
--- a/Core/External/Proto/Buffer/Response/response_buffer.cpp
+++ b/Core/External/Proto/Buffer/Response/response_buffer.cpp
@@ -1,52 +1,46 @@
#include "response_buffer.h"
-template
-ResponseBuffer::ResponseBuffer() : bytes_used(0), bytes{0} {
+ResponseBuffer::ResponseBuffer() : index(0), size(0), bytes{nullptr} {
}
-template
-uint8_t *ResponseBuffer::get_raw_buffer() {
- return bytes[0];
+uint8_t *ResponseBuffer::get_raw_buffer() {
+ return bytes;
}
-template
-void ResponseBuffer::clear() {
- bytes_used = 0;
+void ResponseBuffer::clear() {
+ index = 0;
}
-template
-uint32_t ResponseBuffer::get_size() const {
- return bytes_used;
+uint32_t ResponseBuffer::get_size() const {
+ return index;
}
-template
-uint32_t ResponseBuffer::get_max_size() const {
- return BUFFER_SIZE;
+uint32_t ResponseBuffer::get_max_size() const {
+ return size;
}
-template
-uint32_t ResponseBuffer::get_available_size() const {
- return -bytes_used;
+void ResponseBuffer::set_max_size(uint32_t value) {
+ this->size = value;
}
-template
-bool ResponseBuffer::push(const uint8_t byte) {
- bool result = BUFFER_SIZE > bytes_used;
+uint32_t ResponseBuffer::get_available_size() const {
+ return -index;
+}
+
+bool ResponseBuffer::push(const uint8_t byte) {
+ bool result = size > index;
if (result) {
- (*bytes[bytes_used]) = byte;
- ++bytes_used;
+ bytes[index] = byte;
+ ++index;
}
return result;
}
-template
-bool ResponseBuffer::push(const uint8_t *src, const uint32_t length) {
- bool result = BUFFER_SIZE >= (bytes_used + length);
+bool ResponseBuffer::push(const uint8_t *src, const uint32_t length) {
+ bool result = size >= (index + length);
if (result) {
- memcpy(bytes + bytes_used, src, length);
- bytes_used += length;
+ memcpy(bytes + index, src, length);
+ index += length;
}
return result;
-}
-
-template class ResponseBuffer;
\ No newline at end of file
+}
\ No newline at end of file
diff --git a/Core/External/Proto/Buffer/Response/response_buffer.h b/Core/External/Proto/Buffer/Response/response_buffer.h
index f12c26d..39160e2 100644
--- a/Core/External/Proto/Buffer/Response/response_buffer.h
+++ b/Core/External/Proto/Buffer/Response/response_buffer.h
@@ -6,14 +6,9 @@
#include
#include
-#define DEFAULT_RESPONSE_BUFFER_SIZE 6
-
/**
* Represents response buffer implementation for protocol buffers serialization.
- *
- * @tparam BUFFER_SIZE - given size of the internal response buffer.
*/
-template
class ResponseBuffer : public EmbeddedProto::WriteBufferInterface {
public:
ResponseBuffer();
@@ -42,6 +37,13 @@ class ResponseBuffer : public EmbeddedProto::WriteBufferInterface {
*/
[[nodiscard]] uint32_t get_max_size() const override;
+ /**
+ * Sets buffer max size.
+ *
+ * @param value - given buffer max size.
+ */
+ void set_max_size(uint32_t value);
+
/**
* @see EmbeddedProto::WriteBufferInterface
*/
@@ -61,12 +63,17 @@ class ResponseBuffer : public EmbeddedProto::WriteBufferInterface {
/**
* Represents amount of currently used bytes by buffer.
*/
- uint32_t bytes_used;
+ uint32_t index;
+
+ /**
+ * Represents max size of the buffer.
+ */
+ uint32_t size;
/**
* Represents current buffer data.
*/
- uint8_t *bytes[BUFFER_SIZE];
+ uint8_t *bytes;
};
#endif //LIGHT_DETECTOR_RESPONSE_BUFFER_H
diff --git a/Core/External/Proto/Codec/proto_codec.cpp b/Core/External/Proto/Codec/proto_codec.cpp
index 4784bc3..8a2c1bf 100644
--- a/Core/External/Proto/Codec/proto_codec.cpp
+++ b/Core/External/Proto/Codec/proto_codec.cpp
@@ -1,34 +1,32 @@
#include "proto_codec.h"
+#include "indicator.h"
-RequestBuffer ProtoCodec::request_buffer =
- RequestBuffer();
+RequestBuffer ProtoCodec::request_buffer = RequestBuffer();
-ResponseBuffer ProtoCodec::response_buffer =
- ResponseBuffer();
+ResponseBuffer ProtoCodec::response_buffer = ResponseBuffer();
light_detector::RequestContainer ProtoCodec::request_container =
light_detector::RequestContainer();
-RequestBuffer& ProtoCodec::get_request_buffer() {
- return request_buffer;
+RequestBuffer* ProtoCodec::get_request_buffer() {
+ return &request_buffer;
}
-ResponseBuffer& ProtoCodec::get_response_buffer() {
- return response_buffer;
+ResponseBuffer* ProtoCodec::get_response_buffer() {
+ return &response_buffer;
}
int ProtoCodec::decode_request_container() {
request_container.clear();
if (request_container.deserialize(request_buffer) == ::EmbeddedProto::Error::NO_ERRORS) {
+ State::get_request_container_sequence()->add(request_container);
-
- State::get_request_container_sequence().add(request_container);
+ request_buffer.clear();
return EXIT_SUCCESS;
}
-
return EXIT_FAILURE;
}
diff --git a/Core/External/Proto/Codec/proto_codec.h b/Core/External/Proto/Codec/proto_codec.h
index 85391f8..4627896 100644
--- a/Core/External/Proto/Codec/proto_codec.h
+++ b/Core/External/Proto/Codec/proto_codec.h
@@ -22,14 +22,14 @@ class ProtoCodec {
*
* @return common instance of request buffer.
*/
- static RequestBuffer& get_request_buffer();
+ static RequestBuffer* get_request_buffer();
/**
* Retrieves common response buffer instance.
*
* @return common instance of response buffer.
*/
- static ResponseBuffer& get_response_buffer();
+ static ResponseBuffer* get_response_buffer();
/**
* Attempts to decode request container, looking for raw data from request buffer. If the decoding is
@@ -51,12 +51,12 @@ class ProtoCodec {
/**
* Represents common instance of request buffer.
*/
- static RequestBuffer request_buffer;
+ static RequestBuffer request_buffer;
/**
* Represents common instance of response buffer.
*/
- static ResponseBuffer response_buffer;
+ static ResponseBuffer response_buffer;
/**
* Represents common request container instance.
diff --git a/Core/External/Proto/Generated/request.h b/Core/External/Proto/Generated/request.h
index 197897b..bc61d63 100644
--- a/Core/External/Proto/Generated/request.h
+++ b/Core/External/Proto/Generated/request.h
@@ -32,7 +32,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
RequestContainer() = default;
RequestContainer(const RequestContainer& rhs )
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -61,7 +60,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
RequestContainer(const RequestContainer&& rhs ) noexcept
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -93,15 +91,13 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
enum class FieldNumber : uint32_t
{
NOT_SET = 0,
- MSGID = 1,
- DATABUS = 2,
- INFOBUS = 3,
- SETTINGSBUS = 4
+ DATABUS = 1,
+ INFOBUS = 2,
+ SETTINGSBUS = 3
};
RequestContainer& operator=(const RequestContainer& rhs)
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -131,7 +127,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
RequestContainer& operator=(const RequestContainer&& rhs) noexcept
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -159,14 +154,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
return *this;
}
- static constexpr char const* MSGID_NAME = "msgId";
- inline void clear_msgId() { msgId_.clear(); }
- inline void set_msgId(const uint32_t& value) { msgId_ = value; }
- inline void set_msgId(const uint32_t&& value) { msgId_ = value; }
- inline uint32_t& mutable_msgId() { return msgId_.get(); }
- inline const uint32_t& get_msgId() const { return msgId_.get(); }
- inline uint32_t msgId() const { return msgId_.get(); }
-
FieldNumber get_which_content() const { return which_content_; }
static constexpr char const* DATABUS_NAME = "dataBus";
@@ -294,11 +281,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
{
::EmbeddedProto::Error return_value = ::EmbeddedProto::Error::NO_ERRORS;
- if((0U != msgId_.get()) && (::EmbeddedProto::Error::NO_ERRORS == return_value))
- {
- return_value = msgId_.serialize_with_id(static_cast(FieldNumber::MSGID), buffer, false);
- }
-
switch(which_content_)
{
case FieldNumber::DATABUS:
@@ -342,10 +324,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
id_tag = static_cast(id_number);
switch(id_tag)
{
- case FieldNumber::MSGID:
- return_value = msgId_.deserialize_check_type(buffer, wire_type);
- break;
-
case FieldNumber::DATABUS:
case FieldNumber::INFOBUS:
case FieldNumber::SETTINGSBUS:
@@ -381,7 +359,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
void clear() override
{
- clear_msgId();
clear_content();
}
@@ -391,9 +368,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
char const* name = nullptr;
switch(fieldNumber)
{
- case FieldNumber::MSGID:
- name = MSGID_NAME;
- break;
case FieldNumber::DATABUS:
name = DATABUS_NAME;
break;
@@ -463,8 +437,7 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
left_chars.size -= n_chars_used;
}
- left_chars = msgId_.to_string(left_chars, indent_level + 2, MSGID_NAME, true);
- left_chars = to_string_content(left_chars, indent_level + 2, false);
+ left_chars = to_string_content(left_chars, indent_level + 2, true);
if( 0 == indent_level)
{
@@ -489,7 +462,6 @@ class RequestContainer final: public ::EmbeddedProto::MessageInterface
private:
- EmbeddedProto::uint32 msgId_ = 0U;
FieldNumber which_content_ = FieldNumber::NOT_SET;
union content
diff --git a/Core/External/Proto/Generated/response.h b/Core/External/Proto/Generated/response.h
index 2d62751..f38b154 100644
--- a/Core/External/Proto/Generated/response.h
+++ b/Core/External/Proto/Generated/response.h
@@ -32,7 +32,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
ResponseContainer() = default;
ResponseContainer(const ResponseContainer& rhs )
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -61,7 +60,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
ResponseContainer(const ResponseContainer&& rhs ) noexcept
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -93,15 +91,13 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
enum class FieldNumber : uint32_t
{
NOT_SET = 0,
- MSGID = 1,
- DATABUS = 2,
- INFOBUS = 3,
- SETTINGSBUS = 4
+ DATABUS = 1,
+ INFOBUS = 2,
+ SETTINGSBUS = 3
};
ResponseContainer& operator=(const ResponseContainer& rhs)
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -131,7 +127,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
ResponseContainer& operator=(const ResponseContainer&& rhs) noexcept
{
- set_msgId(rhs.get_msgId());
if(rhs.get_which_content() != which_content_)
{
// First delete the old object in the oneof.
@@ -159,14 +154,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
return *this;
}
- static constexpr char const* MSGID_NAME = "msgId";
- inline void clear_msgId() { msgId_.clear(); }
- inline void set_msgId(const uint32_t& value) { msgId_ = value; }
- inline void set_msgId(const uint32_t&& value) { msgId_ = value; }
- inline uint32_t& mutable_msgId() { return msgId_.get(); }
- inline const uint32_t& get_msgId() const { return msgId_.get(); }
- inline uint32_t msgId() const { return msgId_.get(); }
-
FieldNumber get_which_content() const { return which_content_; }
static constexpr char const* DATABUS_NAME = "dataBus";
@@ -294,11 +281,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
{
::EmbeddedProto::Error return_value = ::EmbeddedProto::Error::NO_ERRORS;
- if((0U != msgId_.get()) && (::EmbeddedProto::Error::NO_ERRORS == return_value))
- {
- return_value = msgId_.serialize_with_id(static_cast(FieldNumber::MSGID), buffer, false);
- }
-
switch(which_content_)
{
case FieldNumber::DATABUS:
@@ -342,10 +324,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
id_tag = static_cast(id_number);
switch(id_tag)
{
- case FieldNumber::MSGID:
- return_value = msgId_.deserialize_check_type(buffer, wire_type);
- break;
-
case FieldNumber::DATABUS:
case FieldNumber::INFOBUS:
case FieldNumber::SETTINGSBUS:
@@ -381,7 +359,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
void clear() override
{
- clear_msgId();
clear_content();
}
@@ -391,9 +368,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
char const* name = nullptr;
switch(fieldNumber)
{
- case FieldNumber::MSGID:
- name = MSGID_NAME;
- break;
case FieldNumber::DATABUS:
name = DATABUS_NAME;
break;
@@ -463,8 +437,7 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
left_chars.size -= n_chars_used;
}
- left_chars = msgId_.to_string(left_chars, indent_level + 2, MSGID_NAME, true);
- left_chars = to_string_content(left_chars, indent_level + 2, false);
+ left_chars = to_string_content(left_chars, indent_level + 2, true);
if( 0 == indent_level)
{
@@ -489,7 +462,6 @@ class ResponseContainer final: public ::EmbeddedProto::MessageInterface
private:
- EmbeddedProto::uint32 msgId_ = 0U;
FieldNumber which_content_ = FieldNumber::NOT_SET;
union content
diff --git a/Core/External/Scheduler/Handler/scheduler_handler.cpp b/Core/External/Scheduler/Handler/scheduler_handler.cpp
index 9b68347..741f838 100644
--- a/Core/External/Scheduler/Handler/scheduler_handler.cpp
+++ b/Core/External/Scheduler/Handler/scheduler_handler.cpp
@@ -3,6 +3,8 @@
int SchedulerHandler::handle_request() {
if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE) == SET) {
+ //__HAL_UART_CLEAR_IT(&huart2, UART_CLEAR_NEF|UART_CLEAR_OREF);
+
if (try_process_request_container() != EXIT_SUCCESS) {
return EXIT_FAILURE;
}
@@ -16,8 +18,10 @@ int SchedulerHandler::handle_request() {
int SchedulerHandler::handle_response() {
auto request_container_sequence = State::get_request_container_sequence();
- if (!request_container_sequence.is_empty()) {
- return request_container_sequence.traverse_with_break(
+ if (!request_container_sequence->is_empty()) {
+// Indicator::toggle_action_success();
+
+ return request_container_sequence->traverse_with_break(
[](const light_detector::RequestContainer &content) -> int {
return SchedulerHandler::try_process_response_container(content);
});
@@ -29,33 +33,27 @@ int SchedulerHandler::handle_response() {
int SchedulerHandler::try_process_request_container() {
auto request_buffer = ProtoCodec::get_request_buffer();
-// uint8_t test[100] = {0, 0, 0, 0, 0, 0};
+ uint8_t max_size;
- HAL_UART_Receive(
- &huart2, &request_buffer.get_raw_buffer()[0], 100, 100000);
+ if (HAL_UART_Receive(
+ &huart2, &max_size, 1, POLL_TIMEOUT) != HAL_OK) {
+ return EXIT_FAILURE;
+ }
-// request_buffer.get_raw_buffer()[0] = test[0];
-// request_buffer.get_raw_buffer()[1] = test[1];
-// request_buffer.get_raw_buffer()[2] = test[2];
-// request_buffer.get_raw_buffer()[3] = test[3];
-// request_buffer.get_raw_buffer()[4] = test[4];
-// request_buffer.get_raw_buffer()[5] = test[5];
+ request_buffer->set_max_size(max_size);
-// if (request_buffer.get_raw_buffer()[0] != 1 && request_buffer.get_raw_buffer()[4] != 1) {
-// Indicator::toggle_action_success();
-// }
+ uint8_t raw_buffer[max_size];
+
+ if (HAL_UART_Receive(&huart2, raw_buffer, max_size, POLL_TIMEOUT) != HAL_OK) {
+ return EXIT_FAILURE;
+ }
-// HAL_UART_Receive(
-// &huart2, request_buffer.get_raw_buffer(), request_buffer.get_size(), 100000);
+ request_buffer->set_raw_buffer(raw_buffer);
return ProtoCodec::decode_request_container();
}
int SchedulerHandler::try_process_response_container(const light_detector::RequestContainer &content) {
- if (content.msgId() == 1) {
- Indicator::toggle_action_success();
- }
-
if (ProtoHelper::is_data_bus_request_container(content)) {
if (SchedulerHandler::process_data_bus_request_content_response(content) != EXIT_SUCCESS) {
@@ -79,8 +77,21 @@ int SchedulerHandler::try_process_response_container(const light_detector::Reque
int SchedulerHandler::try_transmit_response_container() {
auto response_buffer = ProtoCodec::get_response_buffer();
- HAL_UART_Transmit(
- &huart2, response_buffer.get_raw_buffer(), response_buffer.get_size(), 1000);
+ if (HAL_UART_Transmit(
+ &huart2,
+ (uint8_t *) response_buffer->get_size(),
+ 1,
+ TRANSMIT_TIMEOUT) != HAL_OK) {
+ return EXIT_FAILURE;
+ }
+
+ if (HAL_UART_Transmit(
+ &huart2,
+ response_buffer->get_raw_buffer(),
+ response_buffer->get_size(),
+ TRANSMIT_TIMEOUT) != HAL_OK) {
+ return EXIT_FAILURE;
+ }
return EXIT_SUCCESS;
}
@@ -111,7 +122,7 @@ int SchedulerHandler::process_data_bus_request_content_of_raw_data_type_response
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::DataBusResponseContent data_bus_response_content;
@@ -139,7 +150,7 @@ int SchedulerHandler::process_data_bus_request_content_of_full_data_type_respons
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::DataBusResponseContent data_bus_response_content;
@@ -166,7 +177,7 @@ int SchedulerHandler::process_data_bus_request_content_of_infrared_data_type_res
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::DataBusResponseContent data_bus_response_content;
@@ -193,7 +204,7 @@ int SchedulerHandler::process_data_bus_request_content_of_visible_data_type_resp
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::DataBusResponseContent data_bus_response_content;
@@ -242,7 +253,7 @@ int SchedulerHandler::process_info_bus_request_content_of_gain_info_type_respons
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::InfoBusResponseContent info_bus_response_content;
@@ -269,7 +280,7 @@ int SchedulerHandler::process_info_bus_request_content_of_integral_time_info_typ
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::InfoBusResponseContent info_bus_response_content;
@@ -296,7 +307,7 @@ int SchedulerHandler::process_info_bus_request_content_of_processed_requests_inf
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::InfoBusResponseContent info_bus_response_content;
@@ -320,7 +331,7 @@ int SchedulerHandler::process_info_bus_request_content_of_device_available_info_
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::InfoBusResponseContent info_bus_response_content;
@@ -367,7 +378,7 @@ int SchedulerHandler::process_settings_bus_request_content_of_reset_settings_typ
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::SettingsBusResponseContent settings_bus_response_content;
@@ -396,7 +407,7 @@ int SchedulerHandler::process_settings_bus_request_content_of_set_gain_settings_
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::SettingsBusResponseContent settings_bus_response_content;
@@ -425,7 +436,7 @@ int SchedulerHandler::process_settings_bus_request_content_of_set_integral_time_
const light_detector::RequestContainer &content) {
light_detector::ResponseContainer response_container;
- response_container.set_msgId(content.get_msgId());
+// response_container.set_msgId(content.get_msgId());
light_detector::SettingsBusResponseContent settings_bus_response_content;
diff --git a/Core/External/Scheduler/Handler/scheduler_handler.h b/Core/External/Scheduler/Handler/scheduler_handler.h
index ec8115f..e8d4481 100644
--- a/Core/External/Scheduler/Handler/scheduler_handler.h
+++ b/Core/External/Scheduler/Handler/scheduler_handler.h
@@ -14,6 +14,9 @@
#include "indicator.h"
#include "state.h"
+#define POLL_TIMEOUT (10000)
+#define TRANSMIT_TIMEOUT (10000)
+
extern UART_HandleTypeDef huart2;
/**
diff --git a/Core/External/Scheduler/scheduler.cpp b/Core/External/Scheduler/scheduler.cpp
index 8d29508..848dbc5 100644
--- a/Core/External/Scheduler/scheduler.cpp
+++ b/Core/External/Scheduler/scheduler.cpp
@@ -1,13 +1,7 @@
#include "scheduler.h"
void Scheduler::schedule_tick() {
- State::get_task_sequence().add([]() -> int {
- if (SchedulerHandler::handle_request() != EXIT_SUCCESS) {
- Indicator::toggle_invalid_request();
-
- return EXIT_FAILURE;
- }
-
+ State::get_task_sequence()->add([]() -> int {
if (SchedulerHandler::handle_response() != EXIT_SUCCESS) {
Indicator::toggle_invalid_response();
@@ -19,7 +13,7 @@ void Scheduler::schedule_tick() {
}
void Scheduler::schedule_status_check() {
- State::get_task_sequence().add([]() -> int {
+ State::get_task_sequence()->add([]() -> int {
if (State::is_device_configured() && TSL2591X::is_available()) {
Indicator::toggle_action_success();
} else {
@@ -33,7 +27,7 @@ void Scheduler::schedule_status_check() {
}
void Scheduler::schedule_configuration() {
- State::get_task_sequence().add([]() -> int {
+ State::get_task_sequence()->add([]() -> int {
if (TSL2591X::is_available()) {
TSL2591X::init();
@@ -41,8 +35,6 @@ void Scheduler::schedule_configuration() {
Indicator::toggle_initialization_success();
- HAL_TIM_Base_Start_IT(&htim16);
-
return EXIT_SUCCESS;
} else {
Indicator::toggle_initialization_failure();
@@ -50,4 +42,16 @@ void Scheduler::schedule_configuration() {
return EXIT_FAILURE;
}
});
-}
\ No newline at end of file
+}
+
+void Scheduler::schedule_receive() {
+ State::get_task_sequence()->add([]() -> int {
+ if (SchedulerHandler::handle_request() != EXIT_SUCCESS) {
+// Indicator::toggle_invalid_request();
+
+ return EXIT_FAILURE;
+ }
+
+ return EXIT_SUCCESS;
+ });
+}
diff --git a/Core/External/Scheduler/scheduler.h b/Core/External/Scheduler/scheduler.h
index 9c2dfd0..1a7d026 100644
--- a/Core/External/Scheduler/scheduler.h
+++ b/Core/External/Scheduler/scheduler.h
@@ -1,8 +1,6 @@
#ifndef LIGHT_DETECTOR_SCHEDULER_H
#define LIGHT_DETECTOR_SCHEDULER_H
-#include "tim.h"
-
#include "scheduler_handler.h"
#include "state.h"
#include "indicator.h"
@@ -27,6 +25,11 @@ class Scheduler {
* Schedules device configuration action.
*/
static void schedule_configuration();
+
+ /**
+ * Schedules UART receive poll action.
+ */
+ static void schedule_receive();
};
#endif //LIGHT_DETECTOR_SCHEDULER_H
diff --git a/Core/External/State/state.cpp b/Core/External/State/state.cpp
index 1964375..ee7c1ee 100644
--- a/Core/External/State/state.cpp
+++ b/Core/External/State/state.cpp
@@ -19,7 +19,7 @@ bool State::is_device_configured() {
}
void State::set_device_configured(bool value) {
- device_configured = true;
+ device_configured = value;
}
int State::get_processed_requests() {
@@ -38,10 +38,10 @@ Mutex& State::get_button_mutex() {
return button_mutex;
}
-Sequence>& State::get_task_sequence() {
- return task_sequence;
+Sequence>* State::get_task_sequence() {
+ return &task_sequence;
}
-Sequence& State::get_request_container_sequence() {
- return request_container_sequence;
+Sequence* State::get_request_container_sequence() {
+ return &request_container_sequence;
}
\ No newline at end of file
diff --git a/Core/External/State/state.h b/Core/External/State/state.h
index 1902a36..5bd1235 100644
--- a/Core/External/State/state.h
+++ b/Core/External/State/state.h
@@ -57,14 +57,14 @@ class State {
*
* @return retrieved task sequence.
*/
- static Sequence>& get_task_sequence();
+ static Sequence>* get_task_sequence();
/**
* Retrieves request container sequence.
*
* @return retrieved request container sequence.
*/
- static Sequence& get_request_container_sequence();
+ static Sequence* get_request_container_sequence();
private:
/**
diff --git a/Core/External/Tools/Indicator/indicator.cpp b/Core/External/Tools/Indicator/indicator.cpp
index 8c44ca0..1749287 100644
--- a/Core/External/Tools/Indicator/indicator.cpp
+++ b/Core/External/Tools/Indicator/indicator.cpp
@@ -37,19 +37,26 @@ void Indicator::toggle_action_failure() {
};
void Indicator::toggle_invalid_request() {
- for (int i = 0; i < 3; i++) {
+ for (int i = 0; i < 2; i++) {
HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_5);
- HAL_Delay(500);
+ HAL_Delay(400);
}
HAL_Delay(1000);
}
void Indicator::toggle_invalid_response() {
- for (int i = 0; i < 3; i++) {
+ for (int i = 0; i < 2; i++) {
HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_5);
HAL_Delay(900);
}
HAL_Delay(2000);
-}
\ No newline at end of file
+}
+
+void Indicator::toggle_n(uint8_t n) {
+ for (int i = 0; i < n; i++) {
+ HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_5);
+ HAL_Delay(200);
+ }
+}
diff --git a/Core/External/Tools/Indicator/indicator.h b/Core/External/Tools/Indicator/indicator.h
index f5692b8..e964be6 100644
--- a/Core/External/Tools/Indicator/indicator.h
+++ b/Core/External/Tools/Indicator/indicator.h
@@ -13,6 +13,11 @@ class Indicator {
*/
static void toggle_initialization_success();
+ /**
+ * Indicated initialization process success.
+ */
+ static void toggle_n(uint8_t n);
+
/**
* Indicated initialization process failure.
*/
diff --git a/Core/External/Tools/Sequence/sequence.cpp b/Core/External/Tools/Sequence/sequence.cpp
index f15a2a8..6558071 100644
--- a/Core/External/Tools/Sequence/sequence.cpp
+++ b/Core/External/Tools/Sequence/sequence.cpp
@@ -1,4 +1,5 @@
#include "sequence.h"
+#include "indicator.h"
template
int Sequence::traverse_with_break(std::function callback) {
@@ -33,7 +34,7 @@ void Sequence::traverse_with_skip(std::function callback) {
}
template
-void Sequence::add(T src) {
+void Sequence::add(const T& src) {
sequence.push(src);
}
diff --git a/Core/External/Tools/Sequence/sequence.h b/Core/External/Tools/Sequence/sequence.h
index 28ba88d..ee9a6d1 100644
--- a/Core/External/Tools/Sequence/sequence.h
+++ b/Core/External/Tools/Sequence/sequence.h
@@ -39,7 +39,7 @@ class Sequence {
*
* @param src - given value to be added to the sequence.
*/
- void add(T src);
+ void add(const T& src);
/**
* Checks if the sequence is empty.
diff --git a/Core/Inc/dma.h b/Core/Inc/dma.h
index c57a626..2b6d6a6 100644
--- a/Core/Inc/dma.h
+++ b/Core/Inc/dma.h
@@ -21,7 +21,7 @@
#ifndef __DMA_H__
#define __DMA_H__
-#include "stm32l4xx_hal.h"
+#include "main.h"
#ifdef __cplusplus
extern "C" {
@@ -41,8 +41,6 @@ extern "C" {
void MX_DMA_Init(void);
-void Error_Handler(void);
-
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
diff --git a/Core/Inc/gpio.h b/Core/Inc/gpio.h
index 6c009f4..fa2ec1d 100644
--- a/Core/Inc/gpio.h
+++ b/Core/Inc/gpio.h
@@ -21,7 +21,7 @@
#ifndef __GPIO_H__
#define __GPIO_H__
-#include "stm32l4xx_hal.h"
+#include "main.h"
#ifdef __cplusplus
extern "C" {
@@ -39,8 +39,6 @@ extern "C" {
void MX_GPIO_Init(void);
-void Error_Handler(void);
-
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
diff --git a/Core/Inc/i2c.h b/Core/Inc/i2c.h
index 9742299..7d34595 100644
--- a/Core/Inc/i2c.h
+++ b/Core/Inc/i2c.h
@@ -21,7 +21,7 @@
#ifndef __I2C_H__
#define __I2C_H__
-#include "stm32l4xx_hal.h"
+#include "main.h"
#ifdef __cplusplus
extern "C" {
@@ -39,8 +39,6 @@ extern "C" {
void MX_I2C1_Init(void);
-void Error_Handler(void);
-
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 5d365c0..15b7880 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -53,6 +53,7 @@ extern "C" {
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
/* USER CODE BEGIN EFP */
diff --git a/Core/Inc/stm32l4xx_hal_conf.h b/Core/Inc/stm32l4xx_hal_conf.h
index 85f399c..e2720e4 100644
--- a/Core/Inc/stm32l4xx_hal_conf.h
+++ b/Core/Inc/stm32l4xx_hal_conf.h
@@ -77,7 +77,7 @@
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_SWPMI_MODULE_ENABLED */
-#define HAL_TIM_MODULE_ENABLED
+/*#define HAL_TIM_MODULE_ENABLED */
/*#define HAL_TSC_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
diff --git a/Core/Inc/stm32l4xx_it.h b/Core/Inc/stm32l4xx_it.h
index a74a632..0a5e820 100644
--- a/Core/Inc/stm32l4xx_it.h
+++ b/Core/Inc/stm32l4xx_it.h
@@ -57,11 +57,12 @@ void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel6_IRQHandler(void);
void DMA1_Channel7_IRQHandler(void);
-void TIM1_UP_TIM16_IRQHandler(void);
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
void USART2_IRQHandler(void);
void EXTI15_10_IRQHandler(void);
+void DMA2_Channel6_IRQHandler(void);
+void DMA2_Channel7_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
diff --git a/Core/Inc/tim.h b/Core/Inc/tim.h
deleted file mode 100644
index 7764721..0000000
--- a/Core/Inc/tim.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file tim.h
- * @brief This file contains all the function prototypes for
- * the tim.c file
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2024 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __TIM_H__
-#define __TIM_H__
-
-#include "stm32l4xx_hal.h"
-
-extern TIM_HandleTypeDef htim16;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-
-/* USER CODE BEGIN Includes */
-
-/* USER CODE END Includes */
-
-
-/* USER CODE BEGIN Private defines */
-
-/* USER CODE END Private defines */
-
-void MX_TIM16_Init(void);
-
-void Error_Handler(void);
-
-/* USER CODE BEGIN Prototypes */
-
-/* USER CODE END Prototypes */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __TIM_H__ */
-
diff --git a/Core/Inc/usart.h b/Core/Inc/usart.h
index 9cc735a..e722c5f 100644
--- a/Core/Inc/usart.h
+++ b/Core/Inc/usart.h
@@ -21,7 +21,7 @@
#ifndef __USART_H__
#define __USART_H__
-#include "stm32l4xx_hal.h"
+#include "main.h"
#ifdef __cplusplus
extern "C" {
@@ -39,8 +39,6 @@ extern "C" {
void MX_USART2_UART_Init(void);
-void Error_Handler(void);
-
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
diff --git a/Core/Src/dma.cpp b/Core/Src/dma.cpp
index bfde087..0f0094b 100644
--- a/Core/Src/dma.cpp
+++ b/Core/Src/dma.cpp
@@ -40,6 +40,7 @@ void MX_DMA_Init(void)
{
/* DMA controller clock enable */
+ __HAL_RCC_DMA2_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
@@ -49,6 +50,12 @@ void MX_DMA_Init(void)
/* DMA1_Channel7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel7_IRQn);
+ /* DMA2_Channel6_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA2_Channel6_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA2_Channel6_IRQn);
+ /* DMA2_Channel7_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA2_Channel7_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA2_Channel7_IRQn);
}
diff --git a/Core/Src/i2c.cpp b/Core/Src/i2c.cpp
index 990ac91..91b9797 100644
--- a/Core/Src/i2c.cpp
+++ b/Core/Src/i2c.cpp
@@ -40,7 +40,7 @@ void MX_I2C1_Init(void)
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
- hi2c1.Init.Timing = 0x00000E14;
+ hi2c1.Init.Timing = 0x10909CEC;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
@@ -109,8 +109,8 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
/* I2C1 DMA Init */
/* I2C1_RX Init */
- hdma_i2c1_rx.Instance = DMA1_Channel7;
- hdma_i2c1_rx.Init.Request = DMA_REQUEST_3;
+ hdma_i2c1_rx.Instance = DMA2_Channel6;
+ hdma_i2c1_rx.Init.Request = DMA_REQUEST_5;
hdma_i2c1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_i2c1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_i2c1_rx.Init.MemInc = DMA_MINC_ENABLE;
@@ -126,8 +126,8 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
__HAL_LINKDMA(i2cHandle,hdmarx,hdma_i2c1_rx);
/* I2C1_TX Init */
- hdma_i2c1_tx.Instance = DMA1_Channel6;
- hdma_i2c1_tx.Init.Request = DMA_REQUEST_3;
+ hdma_i2c1_tx.Instance = DMA2_Channel7;
+ hdma_i2c1_tx.Init.Request = DMA_REQUEST_5;
hdma_i2c1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_i2c1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_i2c1_tx.Init.MemInc = DMA_MINC_ENABLE;
diff --git a/Core/Src/main.cpp b/Core/Src/main.cpp
index 5d02887..c53fd57 100644
--- a/Core/Src/main.cpp
+++ b/Core/Src/main.cpp
@@ -1,11 +1,25 @@
/* USER CODE BEGIN Header */
-
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2024 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "dma.h"
#include "i2c.h"
-#include "tim.h"
#include "usart.h"
#include "gpio.h"
@@ -44,23 +58,6 @@ void SystemClock_Config(void);
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
-/**
- * Represents timer callback.
- *
- * @param htim - incoming timer tick data.
- */
-void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) {
- HAL_TIM_Base_Stop_IT(&htim16);
-
- if (htim == &htim16) {
- Scheduler::schedule_tick();
- } else {
- __NOP();
- }
-
- HAL_TIM_Base_Start_IT(&htim16);
-}
-
/**
* Represents button click callback.
*
@@ -112,7 +109,6 @@ int main(void) {
MX_DMA_Init();
MX_I2C1_Init();
MX_USART2_UART_Init();
- MX_TIM16_Init();
/* USER CODE BEGIN 2 */
Scheduler::schedule_configuration();
@@ -122,7 +118,30 @@ int main(void) {
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
- State::get_task_sequence().traverse_with_skip([](const std::function &callback) -> int {
+// if (!State::is_device_configured()) {
+// if (TSL2591X::is_available()) {
+// TSL2591X::init();
+//
+// State::set_device_configured(true);
+//
+// Indicator::toggle_initialization_success();
+// } else {
+// Indicator::toggle_initialization_failure();
+// }
+// }
+// uint8_t te[2];
+//
+// HAL_UART_Receive(&huart2, te, 2, 2000);
+//
+// if (te[1] == 2) {
+// Indicator::toggle_action_success();
+// }
+
+ Scheduler::schedule_receive();
+
+ Scheduler::schedule_tick();
+
+ State::get_task_sequence()->traverse_with_skip([](const std::function &callback) -> int {
return callback();
});
@@ -137,40 +156,50 @@ int main(void) {
* @brief System Clock Configuration
* @retval None
*/
-void SystemClock_Config(void) {
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
- /** Configure the main internal regulator output voltage
- */
- if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
- Error_Handler();
- }
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- /** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_ON;
- RCC_OscInitStruct.MSICalibrationValue = 0;
- RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- Error_Handler();
- }
+ /** Configure the main internal regulator output voltage
+ */
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+ {
+ Error_Handler();
+ }
- /** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
- | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
- Error_Handler();
- }
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 40;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
}
/* USER CODE BEGIN 4 */
@@ -181,13 +210,15 @@ void SystemClock_Config(void) {
* @brief This function is executed in case of error occurrence.
* @retval None
*/
-void Error_Handler(void) {
- /* USER CODE BEGIN Error_Handler_Debug */
- /* User can add his own implementation to report the HAL error return state */
- __disable_irq();
- while (1) {
- }
- /* USER CODE END Error_Handler_Debug */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
@@ -205,4 +236,4 @@ void assert_failed(uint8_t *file, uint32_t line)
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
-#endif /* USE_FULL_ASSERT */
\ No newline at end of file
+#endif /* USE_FULL_ASSERT */
diff --git a/Core/Src/stm32l4xx_it.cpp b/Core/Src/stm32l4xx_it.cpp
index 63875b9..d29c7f3 100644
--- a/Core/Src/stm32l4xx_it.cpp
+++ b/Core/Src/stm32l4xx_it.cpp
@@ -58,7 +58,8 @@
extern DMA_HandleTypeDef hdma_i2c1_rx;
extern DMA_HandleTypeDef hdma_i2c1_tx;
extern I2C_HandleTypeDef hi2c1;
-extern TIM_HandleTypeDef htim16;
+extern DMA_HandleTypeDef hdma_usart2_rx;
+extern DMA_HandleTypeDef hdma_usart2_tx;
extern UART_HandleTypeDef huart2;
/* USER CODE BEGIN EV */
@@ -210,7 +211,7 @@ void DMA1_Channel6_IRQHandler(void)
/* USER CODE BEGIN DMA1_Channel6_IRQn 0 */
/* USER CODE END DMA1_Channel6_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_i2c1_tx);
+ HAL_DMA_IRQHandler(&hdma_usart2_rx);
/* USER CODE BEGIN DMA1_Channel6_IRQn 1 */
/* USER CODE END DMA1_Channel6_IRQn 1 */
@@ -224,26 +225,12 @@ void DMA1_Channel7_IRQHandler(void)
/* USER CODE BEGIN DMA1_Channel7_IRQn 0 */
/* USER CODE END DMA1_Channel7_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_i2c1_rx);
+ HAL_DMA_IRQHandler(&hdma_usart2_tx);
/* USER CODE BEGIN DMA1_Channel7_IRQn 1 */
/* USER CODE END DMA1_Channel7_IRQn 1 */
}
-/**
- * @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
- */
-void TIM1_UP_TIM16_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
-
- /* USER CODE END TIM1_UP_TIM16_IRQn 0 */
- HAL_TIM_IRQHandler(&htim16);
- /* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
-
- /* USER CODE END TIM1_UP_TIM16_IRQn 1 */
-}
-
/**
* @brief This function handles I2C1 event interrupt.
*/
@@ -300,6 +287,34 @@ void EXTI15_10_IRQHandler(void)
/* USER CODE END EXTI15_10_IRQn 1 */
}
+/**
+ * @brief This function handles DMA2 channel6 global interrupt.
+ */
+void DMA2_Channel6_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Channel6_IRQn 0 */
+
+ /* USER CODE END DMA2_Channel6_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_i2c1_rx);
+ /* USER CODE BEGIN DMA2_Channel6_IRQn 1 */
+
+ /* USER CODE END DMA2_Channel6_IRQn 1 */
+}
+
+/**
+ * @brief This function handles DMA2 channel7 global interrupt.
+ */
+void DMA2_Channel7_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Channel7_IRQn 0 */
+
+ /* USER CODE END DMA2_Channel7_IRQn 0 */
+ HAL_DMA_IRQHandler(&hdma_i2c1_tx);
+ /* USER CODE BEGIN DMA2_Channel7_IRQn 1 */
+
+ /* USER CODE END DMA2_Channel7_IRQn 1 */
+}
+
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
diff --git a/Core/Src/tim.cpp b/Core/Src/tim.cpp
deleted file mode 100644
index 9f616f5..0000000
--- a/Core/Src/tim.cpp
+++ /dev/null
@@ -1,98 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file tim.c
- * @brief This file provides code for the configuration
- * of the TIM instances.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2024 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-/* Includes ------------------------------------------------------------------*/
-#include "tim.h"
-
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-TIM_HandleTypeDef htim16;
-
-/* TIM16 init function */
-void MX_TIM16_Init(void)
-{
-
- /* USER CODE BEGIN TIM16_Init 0 */
-
- /* USER CODE END TIM16_Init 0 */
-
- /* USER CODE BEGIN TIM16_Init 1 */
-
- /* USER CODE END TIM16_Init 1 */
- htim16.Instance = TIM16;
- htim16.Init.Prescaler = 13;
- htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim16.Init.Period = 65535;
- htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim16.Init.RepetitionCounter = 0;
- htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim16) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM16_Init 2 */
-
- /* USER CODE END TIM16_Init 2 */
-
-}
-
-void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
-{
-
- if(tim_baseHandle->Instance==TIM16)
- {
- /* USER CODE BEGIN TIM16_MspInit 0 */
-
- /* USER CODE END TIM16_MspInit 0 */
- /* TIM16 clock enable */
- __HAL_RCC_TIM16_CLK_ENABLE();
-
- /* TIM16 interrupt Init */
- HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
- /* USER CODE BEGIN TIM16_MspInit 1 */
-
- /* USER CODE END TIM16_MspInit 1 */
- }
-}
-
-void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
-{
-
- if(tim_baseHandle->Instance==TIM16)
- {
- /* USER CODE BEGIN TIM16_MspDeInit 0 */
-
- /* USER CODE END TIM16_MspDeInit 0 */
- /* Peripheral clock disable */
- __HAL_RCC_TIM16_CLK_DISABLE();
-
- /* TIM16 interrupt Deinit */
- HAL_NVIC_DisableIRQ(TIM1_UP_TIM16_IRQn);
- /* USER CODE BEGIN TIM16_MspDeInit 1 */
-
- /* USER CODE END TIM16_MspDeInit 1 */
- }
-}
-
-/* USER CODE BEGIN 1 */
-
-/* USER CODE END 1 */
diff --git a/Core/Src/usart.cpp b/Core/Src/usart.cpp
index 6016419..8e895a5 100644
--- a/Core/Src/usart.cpp
+++ b/Core/Src/usart.cpp
@@ -25,6 +25,8 @@
/* USER CODE END 0 */
UART_HandleTypeDef huart2;
+DMA_HandleTypeDef hdma_usart2_rx;
+DMA_HandleTypeDef hdma_usart2_tx;
/* USART2 init function */
@@ -39,7 +41,7 @@ void MX_USART2_UART_Init(void)
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
- huart2.Init.BaudRate = 115200;
+ huart2.Init.BaudRate = 9600;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
@@ -93,6 +95,41 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ /* USART2 DMA Init */
+ /* USART2_RX Init */
+ hdma_usart2_rx.Instance = DMA1_Channel6;
+ hdma_usart2_rx.Init.Request = DMA_REQUEST_2;
+ hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
+ hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_usart2_rx.Init.Mode = DMA_NORMAL;
+ hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx);
+
+ /* USART2_TX Init */
+ hdma_usart2_tx.Instance = DMA1_Channel7;
+ hdma_usart2_tx.Init.Request = DMA_REQUEST_2;
+ hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+ hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+ hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE;
+ hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+ hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+ hdma_usart2_tx.Init.Mode = DMA_NORMAL;
+ hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW;
+ if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx);
+
/* USART2 interrupt Init */
HAL_NVIC_SetPriority(USART2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART2_IRQn);
@@ -119,6 +156,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
+ /* USART2 DMA DeInit */
+ HAL_DMA_DeInit(uartHandle->hdmarx);
+ HAL_DMA_DeInit(uartHandle->hdmatx);
+
/* USART2 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART2_IRQn);
/* USER CODE BEGIN USART2_MspDeInit 1 */
diff --git a/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h b/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h
deleted file mode 100644
index 301ca3b..0000000
--- a/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h
+++ /dev/null
@@ -1,5084 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32l4xx_ll_tim.h
- * @author MCD Application Team
- * @brief Header file of TIM LL module.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L4xx_LL_TIM_H
-#define __STM32L4xx_LL_TIM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l4xx.h"
-
-/** @addtogroup STM32L4xx_LL_Driver
- * @{
- */
-
-#if defined (TIM1) || defined (TIM8) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defined (TIM15) || defined (TIM16) || defined (TIM17) || defined (TIM6) || defined (TIM7)
-
-/** @defgroup TIM_LL TIM
- * @{
- */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Variables TIM Private Variables
- * @{
- */
-static const uint8_t OFFSET_TAB_CCMRx[] =
-{
- 0x00U, /* 0: TIMx_CH1 */
- 0x00U, /* 1: TIMx_CH1N */
- 0x00U, /* 2: TIMx_CH2 */
- 0x00U, /* 3: TIMx_CH2N */
- 0x04U, /* 4: TIMx_CH3 */
- 0x04U, /* 5: TIMx_CH3N */
- 0x04U, /* 6: TIMx_CH4 */
- 0x3CU, /* 7: TIMx_CH5 */
- 0x3CU /* 8: TIMx_CH6 */
-};
-
-static const uint8_t SHIFT_TAB_OCxx[] =
-{
- 0U, /* 0: OC1M, OC1FE, OC1PE */
- 0U, /* 1: - NA */
- 8U, /* 2: OC2M, OC2FE, OC2PE */
- 0U, /* 3: - NA */
- 0U, /* 4: OC3M, OC3FE, OC3PE */
- 0U, /* 5: - NA */
- 8U, /* 6: OC4M, OC4FE, OC4PE */
- 0U, /* 7: OC5M, OC5FE, OC5PE */
- 8U /* 8: OC6M, OC6FE, OC6PE */
-};
-
-static const uint8_t SHIFT_TAB_ICxx[] =
-{
- 0U, /* 0: CC1S, IC1PSC, IC1F */
- 0U, /* 1: - NA */
- 8U, /* 2: CC2S, IC2PSC, IC2F */
- 0U, /* 3: - NA */
- 0U, /* 4: CC3S, IC3PSC, IC3F */
- 0U, /* 5: - NA */
- 8U, /* 6: CC4S, IC4PSC, IC4F */
- 0U, /* 7: - NA */
- 0U /* 8: - NA */
-};
-
-static const uint8_t SHIFT_TAB_CCxP[] =
-{
- 0U, /* 0: CC1P */
- 2U, /* 1: CC1NP */
- 4U, /* 2: CC2P */
- 6U, /* 3: CC2NP */
- 8U, /* 4: CC3P */
- 10U, /* 5: CC3NP */
- 12U, /* 6: CC4P */
- 16U, /* 7: CC5P */
- 20U /* 8: CC6P */
-};
-
-static const uint8_t SHIFT_TAB_OISx[] =
-{
- 0U, /* 0: OIS1 */
- 1U, /* 1: OIS1N */
- 2U, /* 2: OIS2 */
- 3U, /* 3: OIS2N */
- 4U, /* 4: OIS3 */
- 5U, /* 5: OIS3N */
- 6U, /* 6: OIS4 */
- 8U, /* 7: OIS5 */
- 10U /* 8: OIS6 */
-};
-/**
- * @}
- */
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Constants TIM Private Constants
- * @{
- */
-
-/* Defines used for the bit position in the register and perform offsets */
-#define TIM_POSITION_BRK_SOURCE (POSITION_VAL(Source) & 0x1FUL)
-
-/* Generic bit definitions for TIMx_OR2 register */
-#define TIMx_OR2_BKINP TIM1_OR2_BKINP /*!< BRK BKIN input polarity */
-#define TIMx_OR2_ETRSEL TIM1_OR2_ETRSEL /*!< TIMx ETR source selection */
-
-/* Remap mask definitions */
-#define TIMx_OR1_RMP_SHIFT 16U
-#define TIMx_OR1_RMP_MASK 0x0000FFFFU
-#if defined(ADC3)
-#define TIM1_OR1_RMP_MASK ((TIM1_OR1_ETR_ADC1_RMP | TIM1_OR1_ETR_ADC3_RMP | TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
-#else
-#define TIM1_OR1_RMP_MASK ((TIM1_OR1_ETR_ADC1_RMP | TIM1_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
-#endif /* ADC3 */
-#define TIM2_OR1_RMP_MASK ((TIM2_OR1_TI4_RMP | TIM2_OR1_ETR1_RMP | TIM2_OR1_ITR1_RMP) << TIMx_OR1_RMP_SHIFT)
-#define TIM3_OR1_RMP_MASK (TIM3_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
-#if defined(ADC2) && defined(ADC3)
-#define TIM8_OR1_RMP_MASK ((TIM8_OR1_ETR_ADC2_RMP | TIM8_OR1_ETR_ADC3_RMP | TIM8_OR1_TI1_RMP) << TIMx_OR1_RMP_SHIFT)
-#else
-#define TIM8_OR1_RMP_MASK (TIM8_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
-#endif /* ADC2 & ADC3 */
-#define TIM15_OR1_RMP_MASK (TIM15_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
-#define TIM16_OR1_RMP_MASK (TIM16_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
-#define TIM17_OR1_RMP_MASK (TIM17_OR1_TI1_RMP << TIMx_OR1_RMP_SHIFT)
-
-/* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
-#define DT_DELAY_1 ((uint8_t)0x7F)
-#define DT_DELAY_2 ((uint8_t)0x3F)
-#define DT_DELAY_3 ((uint8_t)0x1F)
-#define DT_DELAY_4 ((uint8_t)0x1F)
-
-/* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
-#define DT_RANGE_1 ((uint8_t)0x00)
-#define DT_RANGE_2 ((uint8_t)0x80)
-#define DT_RANGE_3 ((uint8_t)0xC0)
-#define DT_RANGE_4 ((uint8_t)0xE0)
-
-/** Legacy definitions for compatibility purpose
-@cond 0
- */
-#if defined(DFSDM1_Channel0)
-#define TIMx_OR2_BKDFBK0E TIMx_OR2_BKDF1BK0E
-#define TIMx_OR3_BK2DFBK1E TIMx_OR3_BK2DF1BK1E
-#endif /* DFSDM1_Channel0 */
-/**
-@endcond
- */
-
-/**
- * @}
- */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup TIM_LL_Private_Macros TIM Private Macros
- * @{
- */
-/** @brief Convert channel id into channel index.
- * @param __CHANNEL__ This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval none
- */
-#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
- (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
- ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
-
-/** @brief Calculate the deadtime sampling period(in ps).
- * @param __TIMCLK__ timer input clock frequency (in Hz).
- * @param __CKD__ This parameter can be one of the following values:
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- * @retval none
- */
-#define TIM_CALC_DTS(__TIMCLK__, __CKD__) \
- (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
- ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
- ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
-/**
- * @}
- */
-
-
-/* Exported types ------------------------------------------------------------*/
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
- * @{
- */
-
-/**
- * @brief TIM Time Base configuration structure definition.
- */
-typedef struct
-{
- uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
- This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetPrescaler().*/
-
- uint32_t CounterMode; /*!< Specifies the counter mode.
- This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetCounterMode().*/
-
- uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
- Auto-Reload Register at the next update event.
- This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
- Some timer instances may support 32 bits counters. In that case this parameter must
- be a number between 0x0000 and 0xFFFFFFFF.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetAutoReload().*/
-
- uint32_t ClockDivision; /*!< Specifies the clock division.
- This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetClockDivision().*/
-
- uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
- reaches zero, an update event is generated and counting restarts
- from the RCR value (N).
- This means in PWM mode that (N+1) corresponds to:
- - the number of PWM periods in edge-aligned mode
- - the number of half PWM period in center-aligned mode
- GP timers: this parameter must be a number between Min_Data = 0x00 and
- Max_Data = 0xFF.
- Advanced timers: this parameter must be a number between Min_Data = 0x0000 and
- Max_Data = 0xFFFF.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetRepetitionCounter().*/
-} LL_TIM_InitTypeDef;
-
-/**
- * @brief TIM Output Compare configuration structure definition.
- */
-typedef struct
-{
- uint32_t OCMode; /*!< Specifies the output mode.
- This parameter can be a value of @ref TIM_LL_EC_OCMODE.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetMode().*/
-
- uint32_t OCState; /*!< Specifies the TIM Output Compare state.
- This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
-
- This feature can be modified afterwards using unitary functions
- @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
-
- uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state.
- This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
-
- This feature can be modified afterwards using unitary functions
- @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
-
- uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register.
- This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
-
- This feature can be modified afterwards using unitary function
- LL_TIM_OC_SetCompareCHx (x=1..6).*/
-
- uint32_t OCPolarity; /*!< Specifies the output polarity.
- This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetPolarity().*/
-
- uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
- This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetPolarity().*/
-
-
- uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetIdleState().*/
-
- uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetIdleState().*/
-} LL_TIM_OC_InitTypeDef;
-
-/**
- * @brief TIM Input Capture configuration structure definition.
- */
-
-typedef struct
-{
-
- uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPolarity().*/
-
- uint32_t ICActiveInput; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetActiveInput().*/
-
- uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPrescaler().*/
-
- uint32_t ICFilter; /*!< Specifies the input capture filter.
- This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetFilter().*/
-} LL_TIM_IC_InitTypeDef;
-
-
-/**
- * @brief TIM Encoder interface configuration structure definition.
- */
-typedef struct
-{
- uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
- This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetEncoderMode().*/
-
- uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
- This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPolarity().*/
-
- uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
- This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetActiveInput().*/
-
- uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
- This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPrescaler().*/
-
- uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
- This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetFilter().*/
-
- uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
- This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPolarity().*/
-
- uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
- This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetActiveInput().*/
-
- uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
- This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPrescaler().*/
-
- uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
- This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetFilter().*/
-
-} LL_TIM_ENCODER_InitTypeDef;
-
-/**
- * @brief TIM Hall sensor interface configuration structure definition.
- */
-typedef struct
-{
-
- uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
- This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPolarity().*/
-
- uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
- Prescaler must be set to get a maximum counter period longer than the
- time interval between 2 consecutive changes on the Hall inputs.
- This parameter can be a value of @ref TIM_LL_EC_ICPSC.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetPrescaler().*/
-
- uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
- This parameter can be a value of
- @ref TIM_LL_EC_IC_FILTER.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_IC_SetFilter().*/
-
- uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register.
- A positive pulse (TRGO event) is generated with a programmable delay every time
- a change occurs on the Hall inputs.
- This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetCompareCH2().*/
-} LL_TIM_HALLSENSOR_InitTypeDef;
-
-/**
- * @brief BDTR (Break and Dead Time) structure definition
- */
-typedef struct
-{
- uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode.
- This parameter can be a value of @ref TIM_LL_EC_OSSR
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetOffStates()
-
- @note This bit-field cannot be modified as long as LOCK level 2 has been
- programmed. */
-
- uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state.
- This parameter can be a value of @ref TIM_LL_EC_OSSI
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_SetOffStates()
-
- @note This bit-field cannot be modified as long as LOCK level 2 has been
- programmed. */
-
- uint32_t LockLevel; /*!< Specifies the LOCK level parameters.
- This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
-
- @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR
- register has been written, their content is frozen until the next reset.*/
-
- uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the
- switching-on of the outputs.
- This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF.
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_OC_SetDeadTime()
-
- @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been
- programmed. */
-
- uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not.
- This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE
-
- This feature can be modified afterwards using unitary functions
- @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
- This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_ConfigBRK()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t BreakFilter; /*!< Specifies the TIM Break Filter.
- This parameter can be a value of @ref TIM_LL_EC_BREAK_FILTER
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_ConfigBRK()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not.
- This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE
-
- This feature can be modified afterwards using unitary functions
- @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity.
- This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARITY
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_ConfigBRK2()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter.
- This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER
-
- This feature can be modified afterwards using unitary function
- @ref LL_TIM_ConfigBRK2()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-
- uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
- This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE
-
- This feature can be modified afterwards using unitary functions
- @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput()
-
- @note This bit-field can not be modified as long as LOCK level 1 has been
- programmed. */
-} LL_TIM_BDTR_InitTypeDef;
-
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/* Exported constants --------------------------------------------------------*/
-/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
- * @{
- */
-
-/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
- * @brief Flags defines which can be used with LL_TIM_ReadReg function.
- * @{
- */
-#define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */
-#define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrupt flag */
-#define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrupt flag */
-#define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrupt flag */
-#define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrupt flag */
-#define LL_TIM_SR_CC5IF TIM_SR_CC5IF /*!< Capture/compare 5 interrupt flag */
-#define LL_TIM_SR_CC6IF TIM_SR_CC6IF /*!< Capture/compare 6 interrupt flag */
-#define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */
-#define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */
-#define LL_TIM_SR_BIF TIM_SR_BIF /*!< Break interrupt flag */
-#define LL_TIM_SR_B2IF TIM_SR_B2IF /*!< Second break interrupt flag */
-#define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapture flag */
-#define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapture flag */
-#define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapture flag */
-#define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapture flag */
-#define LL_TIM_SR_SBIF TIM_SR_SBIF /*!< System Break interrupt flag */
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
- * @{
- */
-#define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */
-#define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
- * @{
- */
-#define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */
-#define LL_TIM_BREAK2_ENABLE TIM_BDTR_BK2E /*!< Break2 function enabled */
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable
- * @{
- */
-#define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by software */
-#define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by software or automatically at the next update event */
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/** @defgroup TIM_LL_EC_IT IT Defines
- * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
- * @{
- */
-#define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */
-#define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrupt enable */
-#define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrupt enable */
-#define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrupt enable */
-#define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrupt enable */
-#define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */
-#define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable */
-#define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
- * @{
- */
-#define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request */
-#define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/underflow generates an update request */
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
- * @{
- */
-#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */
-#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
- * @{
- */
-#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!TIMx_CCRy else active.*/
-#define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!TIMx_CCRy else inactive*/
-#define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 /*!__REG__, (__VALUE__))
-
-/**
- * @brief Read a value in TIM register.
- * @param __INSTANCE__ TIM Instance
- * @param __REG__ Register to be read
- * @retval Register value
- */
-#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
-/**
- * @}
- */
-
-/**
- * @brief HELPER macro retrieving the UIFCPY flag from the counter value.
- * @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
- * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
- * to TIMx_CNT register bit 31)
- * @param __CNT__ Counter value
- * @retval UIF status bit
- */
-#define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \
- (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
-
-/**
- * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration.
- * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
- * @param __TIMCLK__ timer input clock frequency (in Hz)
- * @param __CKD__ This parameter can be one of the following values:
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- * @param __DT__ deadtime duration (in ns)
- * @retval DTG[0:7]
- */
-#define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \
- ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \
- (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \
- (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \
- (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \
- (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\
- (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \
- (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \
- (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\
- (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \
- (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \
- (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\
- 0U)
-
-/**
- * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency.
- * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
- * @param __TIMCLK__ timer input clock frequency (in Hz)
- * @param __CNTCLK__ counter clock frequency (in Hz)
- * @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
- */
-#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
- (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U) : 0U)
-
-/**
- * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
- * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
- * @param __TIMCLK__ timer input clock frequency (in Hz)
- * @param __PSC__ prescaler
- * @param __FREQ__ output signal frequency (in Hz)
- * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
- */
-#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
- ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U)
-
-/**
- * @brief HELPER macro calculating the compare value required to achieve the required timer output compare
- * active/inactive delay.
- * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
- * @param __TIMCLK__ timer input clock frequency (in Hz)
- * @param __PSC__ prescaler
- * @param __DELAY__ timer output compare active/inactive delay (in us)
- * @retval Compare value (between Min_Data=0 and Max_Data=65535)
- */
-#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
- ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
- / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
-
-/**
- * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration
- * (when the timer operates in one pulse mode).
- * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
- * @param __TIMCLK__ timer input clock frequency (in Hz)
- * @param __PSC__ prescaler
- * @param __DELAY__ timer output compare active/inactive delay (in us)
- * @param __PULSE__ pulse duration (in us)
- * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
- */
-#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
- ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
- + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
-
-/**
- * @brief HELPER macro retrieving the ratio of the input capture prescaler
- * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
- * @param __ICPSC__ This parameter can be one of the following values:
- * @arg @ref LL_TIM_ICPSC_DIV1
- * @arg @ref LL_TIM_ICPSC_DIV2
- * @arg @ref LL_TIM_ICPSC_DIV4
- * @arg @ref LL_TIM_ICPSC_DIV8
- * @retval Input capture prescaler ratio (1, 2, 4 or 8)
- */
-#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
- ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
-
-
-/**
- * @}
- */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
- * @{
- */
-
-/** @defgroup TIM_LL_EF_Time_Base Time Base configuration
- * @{
- */
-/**
- * @brief Enable timer counter.
- * @rmtoll CR1 CEN LL_TIM_EnableCounter
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR1, TIM_CR1_CEN);
-}
-
-/**
- * @brief Disable timer counter.
- * @rmtoll CR1 CEN LL_TIM_DisableCounter
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
-}
-
-/**
- * @brief Indicates whether the timer counter is enabled.
- * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable update event generation.
- * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
-}
-
-/**
- * @brief Disable update event generation.
- * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
-}
-
-/**
- * @brief Indicates whether update event generation is enabled.
- * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
- * @param TIMx Timer instance
- * @retval Inverted state of bit (0 or 1).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
-}
-
-/**
- * @brief Set update event source
- * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
- * generate an update interrupt or DMA request if enabled:
- * - Counter overflow/underflow
- * - Setting the UG bit
- * - Update generation through the slave mode controller
- * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
- * overflow/underflow generates an update interrupt or DMA request if enabled.
- * @rmtoll CR1 URS LL_TIM_SetUpdateSource
- * @param TIMx Timer instance
- * @param UpdateSource This parameter can be one of the following values:
- * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
- * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
-{
- MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
-}
-
-/**
- * @brief Get actual event update source
- * @rmtoll CR1 URS LL_TIM_GetUpdateSource
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
- * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
- */
-__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
-}
-
-/**
- * @brief Set one pulse mode (one shot v.s. repetitive).
- * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
- * @param TIMx Timer instance
- * @param OnePulseMode This parameter can be one of the following values:
- * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
- * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
-{
- MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
-}
-
-/**
- * @brief Get actual one pulse mode.
- * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
- * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
- */
-__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
-}
-
-/**
- * @brief Set the timer counter counting mode.
- * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
- * check whether or not the counter mode selection feature is supported
- * by a timer instance.
- * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
- * requires a timer reset to avoid unexpected direction
- * due to DIR bit readonly in center aligned mode.
- * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
- * CR1 CMS LL_TIM_SetCounterMode
- * @param TIMx Timer instance
- * @param CounterMode This parameter can be one of the following values:
- * @arg @ref LL_TIM_COUNTERMODE_UP
- * @arg @ref LL_TIM_COUNTERMODE_DOWN
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
-{
- MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);
-}
-
-/**
- * @brief Get actual counter mode.
- * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
- * check whether or not the counter mode selection feature is supported
- * by a timer instance.
- * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
- * CR1 CMS LL_TIM_GetCounterMode
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_COUNTERMODE_UP
- * @arg @ref LL_TIM_COUNTERMODE_DOWN
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
- * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
- */
-__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
-{
- uint32_t counter_mode;
-
- counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));
-
- if (counter_mode == 0U)
- {
- counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
- }
-
- return counter_mode;
-}
-
-/**
- * @brief Enable auto-reload (ARR) preload.
- * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
-}
-
-/**
- * @brief Disable auto-reload (ARR) preload.
- * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
-}
-
-/**
- * @brief Indicates whether auto-reload (ARR) preload is enabled.
- * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators
- * (when supported) and the digital filters.
- * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
- * whether or not the clock division feature is supported by the timer
- * instance.
- * @rmtoll CR1 CKD LL_TIM_SetClockDivision
- * @param TIMx Timer instance
- * @param ClockDivision This parameter can be one of the following values:
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
-{
- MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
-}
-
-/**
- * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time
- * generators (when supported) and the digital filters.
- * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
- * whether or not the clock division feature is supported by the timer
- * instance.
- * @rmtoll CR1 CKD LL_TIM_GetClockDivision
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
- * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- */
-__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
-}
-
-/**
- * @brief Set the counter value.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @rmtoll CNT CNT LL_TIM_SetCounter
- * @param TIMx Timer instance
- * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
-{
- WRITE_REG(TIMx->CNT, Counter);
-}
-
-/**
- * @brief Get the counter value.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @rmtoll CNT CNT LL_TIM_GetCounter
- * @param TIMx Timer instance
- * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
- */
-__STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CNT));
-}
-
-/**
- * @brief Get the current direction of the counter
- * @rmtoll CR1 DIR LL_TIM_GetDirection
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_COUNTERDIRECTION_UP
- * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
- */
-__STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
-}
-
-/**
- * @brief Set the prescaler value.
- * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
- * @note The prescaler can be changed on the fly as this control register is buffered. The new
- * prescaler ratio is taken into account at the next update event.
- * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
- * @rmtoll PSC PSC LL_TIM_SetPrescaler
- * @param TIMx Timer instance
- * @param Prescaler between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
-{
- WRITE_REG(TIMx->PSC, Prescaler);
-}
-
-/**
- * @brief Get the prescaler value.
- * @rmtoll PSC PSC LL_TIM_GetPrescaler
- * @param TIMx Timer instance
- * @retval Prescaler value between Min_Data=0 and Max_Data=65535
- */
-__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->PSC));
-}
-
-/**
- * @brief Set the auto-reload value.
- * @note The counter is blocked while the auto-reload value is null.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
- * @rmtoll ARR ARR LL_TIM_SetAutoReload
- * @param TIMx Timer instance
- * @param AutoReload between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
-{
- WRITE_REG(TIMx->ARR, AutoReload);
-}
-
-/**
- * @brief Get the auto-reload value.
- * @rmtoll ARR ARR LL_TIM_GetAutoReload
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @param TIMx Timer instance
- * @retval Auto-reload value
- */
-__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->ARR));
-}
-
-/**
- * @brief Set the repetition counter value.
- * @note For advanced timer instances RepetitionCounter can be up to 65535.
- * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a repetition counter.
- * @rmtoll RCR REP LL_TIM_SetRepetitionCounter
- * @param TIMx Timer instance
- * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer.
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
-{
- WRITE_REG(TIMx->RCR, RepetitionCounter);
-}
-
-/**
- * @brief Get the repetition counter value.
- * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a repetition counter.
- * @rmtoll RCR REP LL_TIM_GetRepetitionCounter
- * @param TIMx Timer instance
- * @retval Repetition counter value
- */
-__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->RCR));
-}
-
-/**
- * @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31).
- * @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read
- * in an atomic way.
- * @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
-}
-
-/**
- * @brief Disable update interrupt flag (UIF) remapping.
- * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
-}
-
-/**
- * @brief Indicate whether update interrupt flag (UIF) copy is set.
- * @param Counter Counter value
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(const uint32_t Counter)
-{
- return (((Counter & TIM_CNT_UIFCPY) == (TIM_CNT_UIFCPY)) ? 1UL : 0UL);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
- * @{
- */
-/**
- * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
- * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
- * they are updated only when a commutation event (COM) occurs.
- * @note Only on channels that have a complementary output.
- * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance is able to generate a commutation event.
- * @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
-}
-
-/**
- * @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
- * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance is able to generate a commutation event.
- * @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
-}
-
-/**
- * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
- * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance is able to generate a commutation event.
- * @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate
- * @param TIMx Timer instance
- * @param CCUpdateSource This parameter can be one of the following values:
- * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
- * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
-{
- MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
-}
-
-/**
- * @brief Set the trigger of the capture/compare DMA request.
- * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
- * @param TIMx Timer instance
- * @param DMAReqTrigger This parameter can be one of the following values:
- * @arg @ref LL_TIM_CCDMAREQUEST_CC
- * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
-{
- MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
-}
-
-/**
- * @brief Get actual trigger of the capture/compare DMA request.
- * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
- * @param TIMx Timer instance
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_CCDMAREQUEST_CC
- * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
- */
-__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
-}
-
-/**
- * @brief Set the lock level to freeze the
- * configuration of several capture/compare parameters.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * the lock mechanism is supported by a timer instance.
- * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
- * @param TIMx Timer instance
- * @param LockLevel This parameter can be one of the following values:
- * @arg @ref LL_TIM_LOCKLEVEL_OFF
- * @arg @ref LL_TIM_LOCKLEVEL_1
- * @arg @ref LL_TIM_LOCKLEVEL_2
- * @arg @ref LL_TIM_LOCKLEVEL_3
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
-{
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
-}
-
-/**
- * @brief Enable capture/compare channels.
- * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
- * CCER CC1NE LL_TIM_CC_EnableChannel\n
- * CCER CC2E LL_TIM_CC_EnableChannel\n
- * CCER CC2NE LL_TIM_CC_EnableChannel\n
- * CCER CC3E LL_TIM_CC_EnableChannel\n
- * CCER CC3NE LL_TIM_CC_EnableChannel\n
- * CCER CC4E LL_TIM_CC_EnableChannel\n
- * CCER CC5E LL_TIM_CC_EnableChannel\n
- * CCER CC6E LL_TIM_CC_EnableChannel
- * @param TIMx Timer instance
- * @param Channels This parameter can be a combination of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-{
- SET_BIT(TIMx->CCER, Channels);
-}
-
-/**
- * @brief Disable capture/compare channels.
- * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
- * CCER CC1NE LL_TIM_CC_DisableChannel\n
- * CCER CC2E LL_TIM_CC_DisableChannel\n
- * CCER CC2NE LL_TIM_CC_DisableChannel\n
- * CCER CC3E LL_TIM_CC_DisableChannel\n
- * CCER CC3NE LL_TIM_CC_DisableChannel\n
- * CCER CC4E LL_TIM_CC_DisableChannel\n
- * CCER CC5E LL_TIM_CC_DisableChannel\n
- * CCER CC6E LL_TIM_CC_DisableChannel
- * @param TIMx Timer instance
- * @param Channels This parameter can be a combination of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-{
- CLEAR_BIT(TIMx->CCER, Channels);
-}
-
-/**
- * @brief Indicate whether channel(s) is(are) enabled.
- * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
- * CCER CC1NE LL_TIM_CC_IsEnabledChannel\n
- * CCER CC2E LL_TIM_CC_IsEnabledChannel\n
- * CCER CC2NE LL_TIM_CC_IsEnabledChannel\n
- * CCER CC3E LL_TIM_CC_IsEnabledChannel\n
- * CCER CC3NE LL_TIM_CC_IsEnabledChannel\n
- * CCER CC4E LL_TIM_CC_IsEnabledChannel\n
- * CCER CC5E LL_TIM_CC_IsEnabledChannel\n
- * CCER CC6E LL_TIM_CC_IsEnabledChannel
- * @param TIMx Timer instance
- * @param Channels This parameter can be a combination of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
-{
- return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
- * @{
- */
-/**
- * @brief Configure an output channel.
- * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
- * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
- * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
- * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
- * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
- * CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
- * CCER CC1P LL_TIM_OC_ConfigOutput\n
- * CCER CC2P LL_TIM_OC_ConfigOutput\n
- * CCER CC3P LL_TIM_OC_ConfigOutput\n
- * CCER CC4P LL_TIM_OC_ConfigOutput\n
- * CCER CC5P LL_TIM_OC_ConfigOutput\n
- * CCER CC6P LL_TIM_OC_ConfigOutput\n
- * CR2 OIS1 LL_TIM_OC_ConfigOutput\n
- * CR2 OIS2 LL_TIM_OC_ConfigOutput\n
- * CR2 OIS3 LL_TIM_OC_ConfigOutput\n
- * CR2 OIS4 LL_TIM_OC_ConfigOutput\n
- * CR2 OIS5 LL_TIM_OC_ConfigOutput\n
- * CR2 OIS6 LL_TIM_OC_ConfigOutput
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @param Configuration This parameter must be a combination of all the following values:
- * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
- * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
- MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
- (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
- MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
- (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
-}
-
-/**
- * @brief Define the behavior of the output reference signal OCxREF from which
- * OCx and OCxN (when relevant) are derived.
- * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
- * CCMR1 OC2M LL_TIM_OC_SetMode\n
- * CCMR2 OC3M LL_TIM_OC_SetMode\n
- * CCMR2 OC4M LL_TIM_OC_SetMode\n
- * CCMR3 OC5M LL_TIM_OC_SetMode\n
- * CCMR3 OC6M LL_TIM_OC_SetMode
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @param Mode This parameter can be one of the following values:
- * @arg @ref LL_TIM_OCMODE_FROZEN
- * @arg @ref LL_TIM_OCMODE_ACTIVE
- * @arg @ref LL_TIM_OCMODE_INACTIVE
- * @arg @ref LL_TIM_OCMODE_TOGGLE
- * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
- * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
- * @arg @ref LL_TIM_OCMODE_PWM1
- * @arg @ref LL_TIM_OCMODE_PWM2
- * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
- * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
- * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
- * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]);
-}
-
-/**
- * @brief Get the output compare mode of an output channel.
- * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
- * CCMR1 OC2M LL_TIM_OC_GetMode\n
- * CCMR2 OC3M LL_TIM_OC_GetMode\n
- * CCMR2 OC4M LL_TIM_OC_GetMode\n
- * CCMR3 OC5M LL_TIM_OC_GetMode\n
- * CCMR3 OC6M LL_TIM_OC_GetMode
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_OCMODE_FROZEN
- * @arg @ref LL_TIM_OCMODE_ACTIVE
- * @arg @ref LL_TIM_OCMODE_INACTIVE
- * @arg @ref LL_TIM_OCMODE_TOGGLE
- * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
- * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
- * @arg @ref LL_TIM_OCMODE_PWM1
- * @arg @ref LL_TIM_OCMODE_PWM2
- * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
- * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
- * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
- * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]);
-}
-
-/**
- * @brief Set the polarity of an output channel.
- * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
- * CCER CC1NP LL_TIM_OC_SetPolarity\n
- * CCER CC2P LL_TIM_OC_SetPolarity\n
- * CCER CC2NP LL_TIM_OC_SetPolarity\n
- * CCER CC3P LL_TIM_OC_SetPolarity\n
- * CCER CC3NP LL_TIM_OC_SetPolarity\n
- * CCER CC4P LL_TIM_OC_SetPolarity\n
- * CCER CC5P LL_TIM_OC_SetPolarity\n
- * CCER CC6P LL_TIM_OC_SetPolarity
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @param Polarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_OCPOLARITY_HIGH
- * @arg @ref LL_TIM_OCPOLARITY_LOW
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
- * @brief Get the polarity of an output channel.
- * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
- * CCER CC1NP LL_TIM_OC_GetPolarity\n
- * CCER CC2P LL_TIM_OC_GetPolarity\n
- * CCER CC2NP LL_TIM_OC_GetPolarity\n
- * CCER CC3P LL_TIM_OC_GetPolarity\n
- * CCER CC3NP LL_TIM_OC_GetPolarity\n
- * CCER CC4P LL_TIM_OC_GetPolarity\n
- * CCER CC5P LL_TIM_OC_GetPolarity\n
- * CCER CC6P LL_TIM_OC_GetPolarity
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_OCPOLARITY_HIGH
- * @arg @ref LL_TIM_OCPOLARITY_LOW
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
- * @brief Set the IDLE state of an output channel
- * @note This function is significant only for the timer instances
- * supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx)
- * can be used to check whether or not a timer instance provides
- * a break input.
- * @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n
- * CR2 OIS2N LL_TIM_OC_SetIdleState\n
- * CR2 OIS2 LL_TIM_OC_SetIdleState\n
- * CR2 OIS2N LL_TIM_OC_SetIdleState\n
- * CR2 OIS3 LL_TIM_OC_SetIdleState\n
- * CR2 OIS3N LL_TIM_OC_SetIdleState\n
- * CR2 OIS4 LL_TIM_OC_SetIdleState\n
- * CR2 OIS5 LL_TIM_OC_SetIdleState\n
- * CR2 OIS6 LL_TIM_OC_SetIdleState
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @param IdleState This parameter can be one of the following values:
- * @arg @ref LL_TIM_OCIDLESTATE_LOW
- * @arg @ref LL_TIM_OCIDLESTATE_HIGH
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]);
-}
-
-/**
- * @brief Get the IDLE state of an output channel
- * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n
- * CR2 OIS2N LL_TIM_OC_GetIdleState\n
- * CR2 OIS2 LL_TIM_OC_GetIdleState\n
- * CR2 OIS2N LL_TIM_OC_GetIdleState\n
- * CR2 OIS3 LL_TIM_OC_GetIdleState\n
- * CR2 OIS3N LL_TIM_OC_GetIdleState\n
- * CR2 OIS4 LL_TIM_OC_GetIdleState\n
- * CR2 OIS5 LL_TIM_OC_GetIdleState\n
- * CR2 OIS6 LL_TIM_OC_GetIdleState
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH1N
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH2N
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH3N
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_OCIDLESTATE_LOW
- * @arg @ref LL_TIM_OCIDLESTATE_HIGH
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
-}
-
-/**
- * @brief Enable fast mode for the output channel.
- * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
- * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
- * CCMR1 OC2FE LL_TIM_OC_EnableFast\n
- * CCMR2 OC3FE LL_TIM_OC_EnableFast\n
- * CCMR2 OC4FE LL_TIM_OC_EnableFast\n
- * CCMR3 OC5FE LL_TIM_OC_EnableFast\n
- * CCMR3 OC6FE LL_TIM_OC_EnableFast
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-
-}
-
-/**
- * @brief Disable fast mode for the output channel.
- * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
- * CCMR1 OC2FE LL_TIM_OC_DisableFast\n
- * CCMR2 OC3FE LL_TIM_OC_DisableFast\n
- * CCMR2 OC4FE LL_TIM_OC_DisableFast\n
- * CCMR3 OC5FE LL_TIM_OC_DisableFast\n
- * CCMR3 OC6FE LL_TIM_OC_DisableFast
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-
-}
-
-/**
- * @brief Indicates whether fast mode is enabled for the output channel.
- * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
- * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
- * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
- * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
- * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
- * CCMR3 OC6FE LL_TIM_OC_IsEnabledFast
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable compare register (TIMx_CCRx) preload for the output channel.
- * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
- * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
- * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
- * CCMR2 OC4PE LL_TIM_OC_EnablePreload\n
- * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
- * CCMR3 OC6PE LL_TIM_OC_EnablePreload
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
- * @brief Disable compare register (TIMx_CCRx) preload for the output channel.
- * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
- * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
- * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
- * CCMR2 OC4PE LL_TIM_OC_DisablePreload\n
- * CCMR3 OC5PE LL_TIM_OC_DisablePreload\n
- * CCMR3 OC6PE LL_TIM_OC_DisablePreload
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
- * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel.
- * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
- * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
- * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
- * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
- * CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload\n
- * CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable clearing the output channel on an external event.
- * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
- * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance can clear the OCxREF signal on an external event.
- * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
- * CCMR1 OC2CE LL_TIM_OC_EnableClear\n
- * CCMR2 OC3CE LL_TIM_OC_EnableClear\n
- * CCMR2 OC4CE LL_TIM_OC_EnableClear\n
- * CCMR3 OC5CE LL_TIM_OC_EnableClear\n
- * CCMR3 OC6CE LL_TIM_OC_EnableClear
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
- * @brief Disable clearing the output channel on an external event.
- * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance can clear the OCxREF signal on an external event.
- * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
- * CCMR1 OC2CE LL_TIM_OC_DisableClear\n
- * CCMR2 OC3CE LL_TIM_OC_DisableClear\n
- * CCMR2 OC4CE LL_TIM_OC_DisableClear\n
- * CCMR3 OC5CE LL_TIM_OC_DisableClear\n
- * CCMR3 OC6CE LL_TIM_OC_DisableClear
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-}
-
-/**
- * @brief Indicates clearing the output channel on an external event is enabled for the output channel.
- * @note This function enables clearing the output channel on an external event.
- * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode.
- * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance can clear the OCxREF signal on an external event.
- * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
- * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
- * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
- * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
- * CCMR3 OC5CE LL_TIM_OC_IsEnabledClear\n
- * CCMR3 OC6CE LL_TIM_OC_IsEnabledClear
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @arg @ref LL_TIM_CHANNEL_CH5
- * @arg @ref LL_TIM_CHANNEL_CH6
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
- return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-}
-
-/**
- * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of
- * the Ocx and OCxN signals).
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * dead-time insertion feature is supported by a timer instance.
- * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
- * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime
- * @param TIMx Timer instance
- * @param DeadTime between Min_Data=0 and Max_Data=255
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
-{
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
-}
-
-/**
- * @brief Set compare value for output channel 1 (TIMx_CCR1).
- * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
- * output channel 1 is supported by a timer instance.
- * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- WRITE_REG(TIMx->CCR1, CompareValue);
-}
-
-/**
- * @brief Set compare value for output channel 2 (TIMx_CCR2).
- * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
- * output channel 2 is supported by a timer instance.
- * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- WRITE_REG(TIMx->CCR2, CompareValue);
-}
-
-/**
- * @brief Set compare value for output channel 3 (TIMx_CCR3).
- * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
- * output channel is supported by a timer instance.
- * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- WRITE_REG(TIMx->CCR3, CompareValue);
-}
-
-/**
- * @brief Set compare value for output channel 4 (TIMx_CCR4).
- * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
- * output channel 4 is supported by a timer instance.
- * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- WRITE_REG(TIMx->CCR4, CompareValue);
-}
-
-/**
- * @brief Set compare value for output channel 5 (TIMx_CCR5).
- * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
- * output channel 5 is supported by a timer instance.
- * @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);
-}
-
-/**
- * @brief Set compare value for output channel 6 (TIMx_CCR6).
- * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
- * output channel 6 is supported by a timer instance.
- * @rmtoll CCR6 CCR6 LL_TIM_OC_SetCompareCH6
- * @param TIMx Timer instance
- * @param CompareValue between Min_Data=0 and Max_Data=65535
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)
-{
- WRITE_REG(TIMx->CCR6, CompareValue);
-}
-
-/**
- * @brief Get compare value (TIMx_CCR1) set for output channel 1.
- * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
- * output channel 1 is supported by a timer instance.
- * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR1));
-}
-
-/**
- * @brief Get compare value (TIMx_CCR2) set for output channel 2.
- * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
- * output channel 2 is supported by a timer instance.
- * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR2));
-}
-
-/**
- * @brief Get compare value (TIMx_CCR3) set for output channel 3.
- * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
- * output channel 3 is supported by a timer instance.
- * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR3));
-}
-
-/**
- * @brief Get compare value (TIMx_CCR4) set for output channel 4.
- * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
- * output channel 4 is supported by a timer instance.
- * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR4));
-}
-
-/**
- * @brief Get compare value (TIMx_CCR5) set for output channel 5.
- * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
- * output channel 5 is supported by a timer instance.
- * @rmtoll CCR5 CCR5 LL_TIM_OC_GetCompareCH5
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
-}
-
-/**
- * @brief Get compare value (TIMx_CCR6) set for output channel 6.
- * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
- * output channel 6 is supported by a timer instance.
- * @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
- * @param TIMx Timer instance
- * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR6));
-}
-
-/**
- * @brief Select on which reference signal the OC5REF is combined to.
- * @note Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports the combined 3-phase PWM mode.
- * @rmtoll CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels\n
- * CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels\n
- * CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels
- * @param TIMx Timer instance
- * @param GroupCH5 This parameter can be a combination of the following values:
- * @arg @ref LL_TIM_GROUPCH5_NONE
- * @arg @ref LL_TIM_GROUPCH5_OC1REFC
- * @arg @ref LL_TIM_GROUPCH5_OC2REFC
- * @arg @ref LL_TIM_GROUPCH5_OC3REFC
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)
-{
- MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
- * @{
- */
-/**
- * @brief Configure input channel.
- * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
- * CCMR1 IC1PSC LL_TIM_IC_Config\n
- * CCMR1 IC1F LL_TIM_IC_Config\n
- * CCMR1 CC2S LL_TIM_IC_Config\n
- * CCMR1 IC2PSC LL_TIM_IC_Config\n
- * CCMR1 IC2F LL_TIM_IC_Config\n
- * CCMR2 CC3S LL_TIM_IC_Config\n
- * CCMR2 IC3PSC LL_TIM_IC_Config\n
- * CCMR2 IC3F LL_TIM_IC_Config\n
- * CCMR2 CC4S LL_TIM_IC_Config\n
- * CCMR2 IC4PSC LL_TIM_IC_Config\n
- * CCMR2 IC4F LL_TIM_IC_Config\n
- * CCER CC1P LL_TIM_IC_Config\n
- * CCER CC1NP LL_TIM_IC_Config\n
- * CCER CC2P LL_TIM_IC_Config\n
- * CCER CC2NP LL_TIM_IC_Config\n
- * CCER CC3P LL_TIM_IC_Config\n
- * CCER CC3NP LL_TIM_IC_Config\n
- * CCER CC4P LL_TIM_IC_Config\n
- * CCER CC4NP LL_TIM_IC_Config
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @param Configuration This parameter must be a combination of all the following values:
- * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC
- * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
- * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
- * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]),
- ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \
- << SHIFT_TAB_ICxx[iChannel]);
- MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
- (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
- * @brief Set the active input.
- * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
- * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
- * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
- * CCMR2 CC4S LL_TIM_IC_SetActiveInput
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @param ICActiveInput This parameter can be one of the following values:
- * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
- * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
- * @arg @ref LL_TIM_ACTIVEINPUT_TRC
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
- * @brief Get the current active input.
- * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
- * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
- * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
- * CCMR2 CC4S LL_TIM_IC_GetActiveInput
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
- * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
- * @arg @ref LL_TIM_ACTIVEINPUT_TRC
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
- * @brief Set the prescaler of input channel.
- * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
- * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
- * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
- * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @param ICPrescaler This parameter can be one of the following values:
- * @arg @ref LL_TIM_ICPSC_DIV1
- * @arg @ref LL_TIM_ICPSC_DIV2
- * @arg @ref LL_TIM_ICPSC_DIV4
- * @arg @ref LL_TIM_ICPSC_DIV8
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
- * @brief Get the current prescaler value acting on an input channel.
- * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
- * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
- * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
- * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_ICPSC_DIV1
- * @arg @ref LL_TIM_ICPSC_DIV2
- * @arg @ref LL_TIM_ICPSC_DIV4
- * @arg @ref LL_TIM_ICPSC_DIV8
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
- * @brief Set the input filter duration.
- * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
- * CCMR1 IC2F LL_TIM_IC_SetFilter\n
- * CCMR2 IC3F LL_TIM_IC_SetFilter\n
- * CCMR2 IC4F LL_TIM_IC_SetFilter
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @param ICFilter This parameter can be one of the following values:
- * @arg @ref LL_TIM_IC_FILTER_FDIV1
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]);
-}
-
-/**
- * @brief Get the input filter duration.
- * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
- * CCMR1 IC2F LL_TIM_IC_GetFilter\n
- * CCMR2 IC3F LL_TIM_IC_GetFilter\n
- * CCMR2 IC4F LL_TIM_IC_GetFilter
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_IC_FILTER_FDIV1
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
- * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
- * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
- return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U);
-}
-
-/**
- * @brief Set the input channel polarity.
- * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
- * CCER CC1NP LL_TIM_IC_SetPolarity\n
- * CCER CC2P LL_TIM_IC_SetPolarity\n
- * CCER CC2NP LL_TIM_IC_SetPolarity\n
- * CCER CC3P LL_TIM_IC_SetPolarity\n
- * CCER CC3NP LL_TIM_IC_SetPolarity\n
- * CCER CC4P LL_TIM_IC_SetPolarity\n
- * CCER CC4NP LL_TIM_IC_SetPolarity
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @param ICPolarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_IC_POLARITY_RISING
- * @arg @ref LL_TIM_IC_POLARITY_FALLING
- * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
- ICPolarity << SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
- * @brief Get the current input channel polarity.
- * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
- * CCER CC1NP LL_TIM_IC_GetPolarity\n
- * CCER CC2P LL_TIM_IC_GetPolarity\n
- * CCER CC2NP LL_TIM_IC_GetPolarity\n
- * CCER CC3P LL_TIM_IC_GetPolarity\n
- * CCER CC3NP LL_TIM_IC_GetPolarity\n
- * CCER CC4P LL_TIM_IC_GetPolarity\n
- * CCER CC4NP LL_TIM_IC_GetPolarity
- * @param TIMx Timer instance
- * @param Channel This parameter can be one of the following values:
- * @arg @ref LL_TIM_CHANNEL_CH1
- * @arg @ref LL_TIM_CHANNEL_CH2
- * @arg @ref LL_TIM_CHANNEL_CH3
- * @arg @ref LL_TIM_CHANNEL_CH4
- * @retval Returned value can be one of the following values:
- * @arg @ref LL_TIM_IC_POLARITY_RISING
- * @arg @ref LL_TIM_IC_POLARITY_FALLING
- * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
-{
- uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
- SHIFT_TAB_CCxP[iChannel]);
-}
-
-/**
- * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
- * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides an XOR input.
- * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
-}
-
-/**
- * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
- * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides an XOR input.
- * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
-}
-
-/**
- * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
- * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides an XOR input.
- * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Get captured value for input channel 1.
- * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
- * input channel 1 is supported by a timer instance.
- * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
- * @param TIMx Timer instance
- * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR1));
-}
-
-/**
- * @brief Get captured value for input channel 2.
- * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
- * input channel 2 is supported by a timer instance.
- * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
- * @param TIMx Timer instance
- * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR2));
-}
-
-/**
- * @brief Get captured value for input channel 3.
- * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
- * input channel 3 is supported by a timer instance.
- * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
- * @param TIMx Timer instance
- * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR3));
-}
-
-/**
- * @brief Get captured value for input channel 4.
- * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF.
- * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports a 32 bits counter.
- * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
- * input channel 4 is supported by a timer instance.
- * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
- * @param TIMx Timer instance
- * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
- */
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)
-{
- return (uint32_t)(READ_REG(TIMx->CCR4));
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
- * @{
- */
-/**
- * @brief Enable external clock mode 2.
- * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal.
- * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports external clock mode2.
- * @rmtoll SMCR ECE LL_TIM_EnableExternalClock
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-}
-
-/**
- * @brief Disable external clock mode 2.
- * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports external clock mode2.
- * @rmtoll SMCR ECE LL_TIM_DisableExternalClock
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-}
-
-/**
- * @brief Indicate whether external clock mode 2 is enabled.
- * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports external clock mode2.
- * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Set the clock source of the counter clock.
- * @note when selected clock source is external clock mode 1, the timer input
- * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
- * function. This timer input must be configured by calling
- * the @ref LL_TIM_IC_Config() function.
- * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports external clock mode1.
- * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports external clock mode2.
- * @rmtoll SMCR SMS LL_TIM_SetClockSource\n
- * SMCR ECE LL_TIM_SetClockSource
- * @param TIMx Timer instance
- * @param ClockSource This parameter can be one of the following values:
- * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
- * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
- * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
-}
-
-/**
- * @brief Set the encoder interface mode.
- * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance supports the encoder mode.
- * @rmtoll SMCR SMS LL_TIM_SetEncoderMode
- * @param TIMx Timer instance
- * @param EncoderMode This parameter can be one of the following values:
- * @arg @ref LL_TIM_ENCODERMODE_X2_TI1
- * @arg @ref LL_TIM_ENCODERMODE_X2_TI2
- * @arg @ref LL_TIM_ENCODERMODE_X4_TI12
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
- * @{
- */
-/**
- * @brief Set the trigger output (TRGO) used for timer synchronization .
- * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance can operate as a master timer.
- * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
- * @param TIMx Timer instance
- * @param TimerSynchronization This parameter can be one of the following values:
- * @arg @ref LL_TIM_TRGO_RESET
- * @arg @ref LL_TIM_TRGO_ENABLE
- * @arg @ref LL_TIM_TRGO_UPDATE
- * @arg @ref LL_TIM_TRGO_CC1IF
- * @arg @ref LL_TIM_TRGO_OC1REF
- * @arg @ref LL_TIM_TRGO_OC2REF
- * @arg @ref LL_TIM_TRGO_OC3REF
- * @arg @ref LL_TIM_TRGO_OC4REF
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
-{
- MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
-}
-
-/**
- * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
- * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
- * whether or not a timer instance can be used for ADC synchronization.
- * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
- * @param TIMx Timer Instance
- * @param ADCSynchronization This parameter can be one of the following values:
- * @arg @ref LL_TIM_TRGO2_RESET
- * @arg @ref LL_TIM_TRGO2_ENABLE
- * @arg @ref LL_TIM_TRGO2_UPDATE
- * @arg @ref LL_TIM_TRGO2_CC1F
- * @arg @ref LL_TIM_TRGO2_OC1
- * @arg @ref LL_TIM_TRGO2_OC2
- * @arg @ref LL_TIM_TRGO2_OC3
- * @arg @ref LL_TIM_TRGO2_OC4
- * @arg @ref LL_TIM_TRGO2_OC5
- * @arg @ref LL_TIM_TRGO2_OC6
- * @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
- * @arg @ref LL_TIM_TRGO2_OC6_RISINGFALLING
- * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_RISING
- * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_FALLING
- * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_RISING
- * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_FALLING
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)
-{
- MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
-}
-
-/**
- * @brief Set the synchronization mode of a slave timer.
- * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance can operate as a slave timer.
- * @rmtoll SMCR SMS LL_TIM_SetSlaveMode
- * @param TIMx Timer instance
- * @param SlaveMode This parameter can be one of the following values:
- * @arg @ref LL_TIM_SLAVEMODE_DISABLED
- * @arg @ref LL_TIM_SLAVEMODE_RESET
- * @arg @ref LL_TIM_SLAVEMODE_GATED
- * @arg @ref LL_TIM_SLAVEMODE_TRIGGER
- * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
-}
-
-/**
- * @brief Set the selects the trigger input to be used to synchronize the counter.
- * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance can operate as a slave timer.
- * @rmtoll SMCR TS LL_TIM_SetTriggerInput
- * @param TIMx Timer instance
- * @param TriggerInput This parameter can be one of the following values:
- * @arg @ref LL_TIM_TS_ITR0
- * @arg @ref LL_TIM_TS_ITR1
- * @arg @ref LL_TIM_TS_ITR2
- * @arg @ref LL_TIM_TS_ITR3
- * @arg @ref LL_TIM_TS_TI1F_ED
- * @arg @ref LL_TIM_TS_TI1FP1
- * @arg @ref LL_TIM_TS_TI2FP2
- * @arg @ref LL_TIM_TS_ETRF
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
-}
-
-/**
- * @brief Enable the Master/Slave mode.
- * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance can operate as a slave timer.
- * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-}
-
-/**
- * @brief Disable the Master/Slave mode.
- * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance can operate as a slave timer.
- * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-}
-
-/**
- * @brief Indicates whether the Master/Slave mode is enabled.
- * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance can operate as a slave timer.
- * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Configure the external trigger (ETR) input.
- * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides an external trigger input.
- * @rmtoll SMCR ETP LL_TIM_ConfigETR\n
- * SMCR ETPS LL_TIM_ConfigETR\n
- * SMCR ETF LL_TIM_ConfigETR
- * @param TIMx Timer instance
- * @param ETRPolarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
- * @arg @ref LL_TIM_ETR_POLARITY_INVERTED
- * @param ETRPrescaler This parameter can be one of the following values:
- * @arg @ref LL_TIM_ETR_PRESCALER_DIV1
- * @arg @ref LL_TIM_ETR_PRESCALER_DIV2
- * @arg @ref LL_TIM_ETR_PRESCALER_DIV4
- * @arg @ref LL_TIM_ETR_PRESCALER_DIV8
- * @param ETRFilter This parameter can be one of the following values:
- * @arg @ref LL_TIM_ETR_FILTER_FDIV1
- * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
- * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
- * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
- * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
- * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
- * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
- * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
- * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
- * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
- * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
- * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
- * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
- * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
- * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
- * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler,
- uint32_t ETRFilter)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | ETRFilter);
-}
-
-/**
- * @brief Select the external trigger (ETR) input source.
- * @note Macro IS_TIM_ETRSEL_INSTANCE(TIMx) can be used to check whether or
- * not a timer instance supports ETR source selection.
- * @rmtoll OR2 ETRSEL LL_TIM_SetETRSource
- * @param TIMx Timer instance
- * @param ETRSource This parameter can be one of the following values:
- * @arg @ref LL_TIM_ETRSOURCE_LEGACY
- * @arg @ref LL_TIM_ETRSOURCE_COMP1
- * @arg @ref LL_TIM_ETRSOURCE_COMP2
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetETRSource(TIM_TypeDef *TIMx, uint32_t ETRSource)
-{
- MODIFY_REG(TIMx->OR2, TIMx_OR2_ETRSEL, ETRSource);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Break_Function Break function configuration
- * @{
- */
-/**
- * @brief Enable the break function.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR BKE LL_TIM_EnableBRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-}
-
-/**
- * @brief Disable the break function.
- * @rmtoll BDTR BKE LL_TIM_DisableBRK
- * @param TIMx Timer instance
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-}
-
-/**
- * @brief Configure the break input.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
- * BDTR BKF LL_TIM_ConfigBRK
- * @param TIMx Timer instance
- * @param BreakPolarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK_POLARITY_LOW
- * @arg @ref LL_TIM_BREAK_POLARITY_HIGH
- * @param BreakFilter This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV1
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
- * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity,
- uint32_t BreakFilter)
-{
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);
-}
-
-/**
- * @brief Enable the break 2 function.
- * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a second break input.
- * @rmtoll BDTR BK2E LL_TIM_EnableBRK2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-}
-
-/**
- * @brief Disable the break 2 function.
- * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a second break input.
- * @rmtoll BDTR BK2E LL_TIM_DisableBRK2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-}
-
-/**
- * @brief Configure the break 2 input.
- * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a second break input.
- * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
- * BDTR BK2F LL_TIM_ConfigBRK2
- * @param TIMx Timer instance
- * @param Break2Polarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK2_POLARITY_LOW
- * @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
- * @param Break2Filter This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
- * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2Filter)
-{
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);
-}
-
-/**
- * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
- * BDTR OSSR LL_TIM_SetOffStates
- * @param TIMx Timer instance
- * @param OffStateIdle This parameter can be one of the following values:
- * @arg @ref LL_TIM_OSSI_DISABLE
- * @arg @ref LL_TIM_OSSI_ENABLE
- * @param OffStateRun This parameter can be one of the following values:
- * @arg @ref LL_TIM_OSSR_DISABLE
- * @arg @ref LL_TIM_OSSR_ENABLE
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStateRun)
-{
- MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
-}
-
-/**
- * @brief Enable automatic output (MOE can be set by software or automatically when a break input is active).
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-}
-
-/**
- * @brief Disable automatic output (MOE can be set only by software).
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-}
-
-/**
- * @brief Indicate whether automatic output is enabled.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
- * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
- * software and is reset in case of break or break2 event
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-}
-
-/**
- * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
- * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
- * software and is reset in case of break or break2 event.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-}
-
-/**
- * @brief Indicates whether outputs are enabled.
- * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
- * a timer instance provides a break input.
- * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable the signals connected to the designated timer break input.
- * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance allows for break input selection.
- * @rmtoll OR2 BKINE LL_TIM_EnableBreakInputSource\n
- * OR2 BKCMP1E LL_TIM_EnableBreakInputSource\n
- * OR2 BKCMP2E LL_TIM_EnableBreakInputSource\n
- * OR2 BKDF1BK0E LL_TIM_EnableBreakInputSource\n
- * OR3 BK2INE LL_TIM_EnableBreakInputSource\n
- * OR3 BK2CMP1E LL_TIM_EnableBreakInputSource\n
- * OR3 BK2CMP2E LL_TIM_EnableBreakInputSource\n
- * OR3 BK2DF1BK1E LL_TIM_EnableBreakInputSource
- * @param TIMx Timer instance
- * @param BreakInput This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
- * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
- SET_BIT(*pReg, Source);
-}
-
-/**
- * @brief Disable the signals connected to the designated timer break input.
- * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance allows for break input selection.
- * @rmtoll OR2 BKINE LL_TIM_DisableBreakInputSource\n
- * OR2 BKCMP1E LL_TIM_DisableBreakInputSource\n
- * OR2 BKCMP2E LL_TIM_DisableBreakInputSource\n
- * OR2 BKDF1BK0E LL_TIM_DisableBreakInputSource\n
- * OR3 BK2INE LL_TIM_DisableBreakInputSource\n
- * OR3 BK2CMP1E LL_TIM_DisableBreakInputSource\n
- * OR3 BK2CMP2E LL_TIM_DisableBreakInputSource\n
- * OR3 BK2DF1BK1E LL_TIM_DisableBreakInputSource
- * @param TIMx Timer instance
- * @param BreakInput This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
- * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
- CLEAR_BIT(*pReg, Source);
-}
-
-/**
- * @brief Set the polarity of the break signal for the timer break input.
- * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
- * or not a timer instance allows for break input selection.
- * @rmtoll OR2 BKINP LL_TIM_SetBreakInputSourcePolarity\n
- * OR2 BKCMP1P LL_TIM_SetBreakInputSourcePolarity\n
- * OR2 BKCMP2P LL_TIM_SetBreakInputSourcePolarity\n
- * OR3 BK2INP LL_TIM_SetBreakInputSourcePolarity\n
- * OR3 BK2CMP1P LL_TIM_SetBreakInputSourcePolarity\n
- * OR3 BK2CMP2P LL_TIM_SetBreakInputSourcePolarity
- * @param TIMx Timer instance
- * @param BreakInput This parameter can be one of the following values:
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN
- * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
- * @param Source This parameter can be one of the following values:
- * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP1
- * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
- * @param Polarity This parameter can be one of the following values:
- * @arg @ref LL_TIM_BKIN_POLARITY_LOW
- * @arg @ref LL_TIM_BKIN_POLARITY_HIGH
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source,
- uint32_t Polarity)
-{
- __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->OR2) + BreakInput));
- MODIFY_REG(*pReg, (TIMx_OR2_BKINP << TIM_POSITION_BRK_SOURCE), (Polarity << TIM_POSITION_BRK_SOURCE));
-}
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
- * @{
- */
-/**
- * @brief Configures the timer DMA burst feature.
- * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
- * not a timer instance supports the DMA burst mode.
- * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
- * DCR DBA LL_TIM_ConfigDMABurst
- * @param TIMx Timer instance
- * @param DMABurstBaseAddress This parameter can be one of the following values:
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
- * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
- * @arg @ref LL_TIM_DMABURST_BASEADDR_SR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
- * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
- * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
- * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
- * @arg @ref LL_TIM_DMABURST_BASEADDR_OR1
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
- * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
- * @arg @ref LL_TIM_DMABURST_BASEADDR_OR2
- * @arg @ref LL_TIM_DMABURST_BASEADDR_OR3
- * @param DMABurstLength This parameter can be one of the following values:
- * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
- * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
- * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength)
-{
- MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
- * @{
- */
-/**
- * @brief Remap TIM inputs (input channel, internal/external triggers).
- * @note Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
- * a some timer inputs can be remapped.
- @if STM32L486xx
- * @rmtoll TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap\n
- * TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
- * TIM1_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM8_OR1 ETR_ADC2_RMP LL_TIM_SetRemap\n
- * TIM8_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
- * TIM8_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 ITR1_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 TI4_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM3_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM15_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap\n
- * TIM16_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM17_OR1 TI1_RMP LL_TIM_SetRemap
- @endif
- @if STM32L443xx
- * @rmtoll TIM1_OR1 ETR_ADC1_RMP LL_TIM_SetRemap\n
- * TIM1_OR1 ETR_ADC3_RMP LL_TIM_SetRemap\n
- * TIM1_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 ITR1_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 TI4_RMP LL_TIM_SetRemap\n
- * TIM2_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM15_OR1 TI1_RMP LL_TIM_SetRemap\n
- * TIM15_OR1 ENCODER_MODE LL_TIM_SetRemap\n
- * TIM16_OR1 TI1_RMP LL_TIM_SetRemap\n
- @endif
- * @param TIMx Timer instance
- * @param Remap Remap param depends on the TIMx. Description available only
- * in CHM version of the User Manual (not in .pdf).
- * Otherwise see Reference Manual description of OR registers.
- *
- * Below description summarizes "Timer Instance" and "Remap" param combinations:
- *
- @if STM32L486xx
- * TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
- *
- * . . ADC1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_NC
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
- *
- * . . ADC3_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_NC
- * @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD1
- * @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD2
- * @arg @ref LL_TIM_TIM1_ETR_ADC3_RMP_AWD3
- *
- * . . TI1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM1_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM1_TI1_RMP_COMP1
- *
- * TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
- *
- * ITR1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
- * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
- *
- * . . ETR1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
- * @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
- *
- * . . TI4_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
- *
- * TIM3: one of the following values
- *
- * @arg @ref LL_TIM_TIM3_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1
- * @arg @ref LL_TIM_TIM3_TI1_RMP_COMP2
- * @arg @ref LL_TIM_TIM3_TI1_RMP_COMP1_COMP2
- *
- * TIM8: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
- *
- * . . ADC1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_NC
- * @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD1
- * @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD2
- * @arg @ref LL_TIM_TIM8_ETR_ADC2_RMP_AWD3
- *
- * . . ADC3_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_NC
- * @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD1
- * @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD2
- * @arg @ref LL_TIM_TIM8_ETR_ADC3_RMP_AWD3
- *
- * . . TI1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM8_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM8_TI1_RMP_COMP2
- *
- * TIM15: any combination of TI1_RMP, ENCODER_MODE where
- *
- * . . TI1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM15_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM15_TI1_RMP_LSE
- *
- * . . ENCODER_MODE can be one of the following values
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM2
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM3
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM4
- *
- * TIM16: one of the following values
- *
- * @arg @ref LL_TIM_TIM16_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM16_TI1_RMP_LSI
- * @arg @ref LL_TIM_TIM16_TI1_RMP_LSE
- * @arg @ref LL_TIM_TIM16_TI1_RMP_RTC
- * @arg @ref LL_TIM_TIM16_TI1_RMP_MSI
- * @arg @ref LL_TIM_TIM16_TI1_RMP_HSE_32
- * @arg @ref LL_TIM_TIM16_TI1_RMP_MCO
- *
- * TIM17: one of the following values
- *
- * @arg @ref LL_TIM_TIM17_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM17_TI1_RMP_MSI
- * @arg @ref LL_TIM_TIM17_TI1_RMP_HSE_32
- * @arg @ref LL_TIM_TIM17_TI1_RMP_MCO
- @endif
- @if STM32L443xx
- * TIM1: any combination of TI1_RMP, ADC3_RMP, ADC1_RMP where
- *
- * . . ADC1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_NC
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD1
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD2
- * @arg @ref LL_TIM_TIM1_ETR_ADC1_RMP_AWD3
- *
- * . . TI1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM1_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM1_TI1_RMP_COMP1
- *
- * TIM2: any combination of ITR1_RMP, ETR1_RMP, TI4_RMP where
- *
- * ITR1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_ITR1_RMP_NONE
- * @arg @ref LL_TIM_TIM2_ITR1_RMP_USB_SOF
- *
- * . . ETR1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO
- * @arg @ref LL_TIM_TIM2_ETR_RMP_LSE
- *
- * . . TI4_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2
- * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1_COMP2
- *
- * TIM15: any combination of TI1_RMP, ENCODER_MODE where
- *
- * . . TI1_RMP can be one of the following values
- * @arg @ref LL_TIM_TIM15_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM15_TI1_RMP_LSE
- *
- * . . ENCODER_MODE can be one of the following values
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_NOREDIRECTION
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM2
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM3
- * @arg @ref LL_TIM_TIM15_ENCODERMODE_TIM4
- *
- * TIM16: one of the following values
- *
- * @arg @ref LL_TIM_TIM16_TI1_RMP_GPIO
- * @arg @ref LL_TIM_TIM16_TI1_RMP_LSI
- * @arg @ref LL_TIM_TIM16_TI1_RMP_LSE
- * @arg @ref LL_TIM_TIM16_TI1_RMP_RTC
- * @arg @ref LL_TIM_TIM16_TI1_RMP_MSI
- * @arg @ref LL_TIM_TIM16_TI1_RMP_HSE_32
- * @arg @ref LL_TIM_TIM16_TI1_RMP_MCO
- @endif
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
-{
- MODIFY_REG(TIMx->OR1, (Remap >> TIMx_OR1_RMP_SHIFT), (Remap & TIMx_OR1_RMP_MASK));
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management
- * @{
- */
-/**
- * @brief Set the OCREF clear input source
- * @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT
- * @note This function can only be used in Output compare and PWM modes.
- * @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource
- * @param TIMx Timer instance
- * @param OCRefClearInputSource This parameter can be one of the following values:
- * @arg @ref LL_TIM_OCREF_CLR_INT_NC
- * @arg @ref LL_TIM_OCREF_CLR_INT_ETR
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSource)
-{
- MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource);
-}
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
- * @{
- */
-/**
- * @brief Clear the update interrupt flag (UIF).
- * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
-}
-
-/**
- * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
- * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 1 interrupt flag (CC1F).
- * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending).
- * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 2 interrupt flag (CC2F).
- * @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending).
- * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 3 interrupt flag (CC3F).
- * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending).
- * @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
- * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending).
- * @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 5 interrupt flag (CC5F).
- * @rmtoll SR CC5IF LL_TIM_ClearFlag_CC5
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 5 interrupt flag (CC5F) is set (Capture/Compare 5 interrupt is pending).
- * @rmtoll SR CC5IF LL_TIM_IsActiveFlag_CC5
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 6 interrupt flag (CC6F).
- * @rmtoll SR CC6IF LL_TIM_ClearFlag_CC6
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 interrupt is pending).
- * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the commutation interrupt flag (COMIF).
- * @rmtoll SR COMIF LL_TIM_ClearFlag_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
-}
-
-/**
- * @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending).
- * @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the trigger interrupt flag (TIF).
- * @rmtoll SR TIF LL_TIM_ClearFlag_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
-}
-
-/**
- * @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
- * @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the break interrupt flag (BIF).
- * @rmtoll SR BIF LL_TIM_ClearFlag_BRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
-}
-
-/**
- * @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
- * @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the break 2 interrupt flag (B2IF).
- * @rmtoll SR B2IF LL_TIM_ClearFlag_BRK2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));
-}
-
-/**
- * @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending).
- * @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
- * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
- * (Capture/Compare 1 interrupt is pending).
- * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
- * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set
- * (Capture/Compare 2 over-capture interrupt is pending).
- * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
- * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set
- * (Capture/Compare 3 over-capture interrupt is pending).
- * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
- * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
-}
-
-/**
- * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
- * (Capture/Compare 4 over-capture interrupt is pending).
- * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Clear the system break interrupt flag (SBIF).
- * @rmtoll SR SBIF LL_TIM_ClearFlag_SYSBRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)
-{
- WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));
-}
-
-/**
- * @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is pending).
- * @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_IT_Management IT-Management
- * @{
- */
-/**
- * @brief Enable update interrupt (UIE).
- * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_UIE);
-}
-
-/**
- * @brief Disable update interrupt (UIE).
- * @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE);
-}
-
-/**
- * @brief Indicates whether the update interrupt (UIE) is enabled.
- * @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 1 interrupt (CC1IE).
- * @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC1IE);
-}
-
-/**
- * @brief Disable capture/compare 1 interrupt (CC1IE).
- * @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled.
- * @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 2 interrupt (CC2IE).
- * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC2IE);
-}
-
-/**
- * @brief Disable capture/compare 2 interrupt (CC2IE).
- * @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled.
- * @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 3 interrupt (CC3IE).
- * @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC3IE);
-}
-
-/**
- * @brief Disable capture/compare 3 interrupt (CC3IE).
- * @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled.
- * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 4 interrupt (CC4IE).
- * @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC4IE);
-}
-
-/**
- * @brief Disable capture/compare 4 interrupt (CC4IE).
- * @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled.
- * @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable commutation interrupt (COMIE).
- * @rmtoll DIER COMIE LL_TIM_EnableIT_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_COMIE);
-}
-
-/**
- * @brief Disable commutation interrupt (COMIE).
- * @rmtoll DIER COMIE LL_TIM_DisableIT_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE);
-}
-
-/**
- * @brief Indicates whether the commutation interrupt (COMIE) is enabled.
- * @rmtoll DIER COMIE LL_TIM_IsEnabledIT_COM
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable trigger interrupt (TIE).
- * @rmtoll DIER TIE LL_TIM_EnableIT_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_TIE);
-}
-
-/**
- * @brief Disable trigger interrupt (TIE).
- * @rmtoll DIER TIE LL_TIM_DisableIT_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE);
-}
-
-/**
- * @brief Indicates whether the trigger interrupt (TIE) is enabled.
- * @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable break interrupt (BIE).
- * @rmtoll DIER BIE LL_TIM_EnableIT_BRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_BIE);
-}
-
-/**
- * @brief Disable break interrupt (BIE).
- * @rmtoll DIER BIE LL_TIM_DisableIT_BRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE);
-}
-
-/**
- * @brief Indicates whether the break interrupt (BIE) is enabled.
- * @rmtoll DIER BIE LL_TIM_IsEnabledIT_BRK
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_DMA_Management DMA Management
- * @{
- */
-/**
- * @brief Enable update DMA request (UDE).
- * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_UDE);
-}
-
-/**
- * @brief Disable update DMA request (UDE).
- * @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE);
-}
-
-/**
- * @brief Indicates whether the update DMA request (UDE) is enabled.
- * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 1 DMA request (CC1DE).
- * @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC1DE);
-}
-
-/**
- * @brief Disable capture/compare 1 DMA request (CC1DE).
- * @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled.
- * @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 2 DMA request (CC2DE).
- * @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC2DE);
-}
-
-/**
- * @brief Disable capture/compare 2 DMA request (CC2DE).
- * @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled.
- * @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 3 DMA request (CC3DE).
- * @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC3DE);
-}
-
-/**
- * @brief Disable capture/compare 3 DMA request (CC3DE).
- * @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled.
- * @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable capture/compare 4 DMA request (CC4DE).
- * @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
-}
-
-/**
- * @brief Disable capture/compare 4 DMA request (CC4DE).
- * @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE);
-}
-
-/**
- * @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled.
- * @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable commutation DMA request (COMDE).
- * @rmtoll DIER COMDE LL_TIM_EnableDMAReq_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_COMDE);
-}
-
-/**
- * @brief Disable commutation DMA request (COMDE).
- * @rmtoll DIER COMDE LL_TIM_DisableDMAReq_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE);
-}
-
-/**
- * @brief Indicates whether the commutation DMA request (COMDE) is enabled.
- * @rmtoll DIER COMDE LL_TIM_IsEnabledDMAReq_COM
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);
-}
-
-/**
- * @brief Enable trigger interrupt (TDE).
- * @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->DIER, TIM_DIER_TDE);
-}
-
-/**
- * @brief Disable trigger interrupt (TDE).
- * @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE);
-}
-
-/**
- * @brief Indicates whether the trigger interrupt (TDE) is enabled.
- * @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG
- * @param TIMx Timer instance
- * @retval State of bit (1 or 0).
- */
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)
-{
- return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);
-}
-
-/**
- * @}
- */
-
-/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management
- * @{
- */
-/**
- * @brief Generate an update event.
- * @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_UG);
-}
-
-/**
- * @brief Generate Capture/Compare 1 event.
- * @rmtoll EGR CC1G LL_TIM_GenerateEvent_CC1
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_CC1G);
-}
-
-/**
- * @brief Generate Capture/Compare 2 event.
- * @rmtoll EGR CC2G LL_TIM_GenerateEvent_CC2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_CC2G);
-}
-
-/**
- * @brief Generate Capture/Compare 3 event.
- * @rmtoll EGR CC3G LL_TIM_GenerateEvent_CC3
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_CC3G);
-}
-
-/**
- * @brief Generate Capture/Compare 4 event.
- * @rmtoll EGR CC4G LL_TIM_GenerateEvent_CC4
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_CC4G);
-}
-
-/**
- * @brief Generate commutation event.
- * @rmtoll EGR COMG LL_TIM_GenerateEvent_COM
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_COMG);
-}
-
-/**
- * @brief Generate trigger event.
- * @rmtoll EGR TG LL_TIM_GenerateEvent_TRIG
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_TG);
-}
-
-/**
- * @brief Generate break event.
- * @rmtoll EGR BG LL_TIM_GenerateEvent_BRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_BG);
-}
-
-/**
- * @brief Generate break 2 event.
- * @rmtoll EGR B2G LL_TIM_GenerateEvent_BRK2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)
-{
- SET_BIT(TIMx->EGR, TIM_EGR_B2G);
-}
-
-/**
- * @}
- */
-
-#if defined(USE_FULL_LL_DRIVER)
-/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions
- * @{
- */
-
-ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
-void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
-void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
-void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
-ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
-void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
-ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
-/**
- * @}
- */
-#endif /* USE_FULL_LL_DRIVER */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-#endif /* TIM1 || TIM8 || TIM2 || TIM3 || TIM4 || TIM5 || TIM15 || TIM16 || TIM17 || TIM6 || TIM7 */
-
-/**
- * @}
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L4xx_LL_TIM_H */
diff --git a/Resources/Proto/Container/request.proto b/Resources/Proto/Container/request.proto
index 45e844d..e480d9e 100644
--- a/Resources/Proto/Container/request.proto
+++ b/Resources/Proto/Container/request.proto
@@ -10,10 +10,9 @@ import "Content/settings.proto";
// Represents request container sent from the client to the board.
message RequestContainer {
- uint32 msgId = 1;
oneof content {
- DataBusRequestContent dataBus = 2;
- InfoBusRequestContent infoBus = 3;
- SettingsBusRequestContent settingsBus = 4;
+ DataBusRequestContent dataBus = 1;
+ InfoBusRequestContent infoBus = 2;
+ SettingsBusRequestContent settingsBus = 3;
}
}
\ No newline at end of file
diff --git a/Resources/Proto/Container/response.proto b/Resources/Proto/Container/response.proto
index 1e47fc8..8a3528b 100644
--- a/Resources/Proto/Container/response.proto
+++ b/Resources/Proto/Container/response.proto
@@ -10,10 +10,9 @@ import "Content/settings.proto";
// Represents response container sent from the board to the client.
message ResponseContainer {
- uint32 msgId = 1;
oneof content {
- DataBusResponseContent dataBus = 2;
- InfoBusResponseContent infoBus = 3;
- SettingsBusResponseContent settingsBus = 4;
+ DataBusResponseContent dataBus = 1;
+ InfoBusResponseContent infoBus = 2;
+ SettingsBusResponseContent settingsBus = 3;
}
}
\ No newline at end of file
diff --git a/Scripts/cli/src/client/client.py b/Scripts/cli/src/client/client.py
index 0478bb8..e579c9f 100644
--- a/Scripts/cli/src/client/client.py
+++ b/Scripts/cli/src/client/client.py
@@ -3,6 +3,7 @@
from serial import Serial
from serial import SerialException
+from serial import EIGHTBITS, SEVENBITS
from proto.Content import data_pb2 as DataBus
from proto.Content import info_pb2 as InfoBus
@@ -19,7 +20,7 @@ class Client:
def __init__(self, device: str, baud_rate: int) -> None:
try:
- self.connection = Serial(device, baud_rate, timeout=10, xonxoff=False)
+ self.connection = Serial(device, baud_rate, EIGHTBITS, timeout=1000, xonxoff=False)
except SerialException:
logging.fatal("Given device is not available")
@@ -27,41 +28,36 @@ def send_data_bus_request_raw_data_type_content(self) -> None:
"""Sends request to the board via data bus to retrieve data of raw type."""
request_container = Request.RequestContainer()
- request_container.msgId = 1
data_bus_request = DataBus.DataBusRequestContent()
- data_bus_request.dataType = DataBus.DataType.Raw
+ data_bus_request.dataType = DataBus.DataType.Infrared
request_container.dataBus.CopyFrom(data_bus_request)
- # print(dir(request_container.ByteSize))
+ data_length = request_container.ByteSize().to_bytes(1, "big")
+ data = request_container.SerializeToString()
-
-
- # print(len(request_container.SerializeToString()))
+ # r = Request.RequestContainer()
#
- # print(request_container.SerializeToString())
-
- # self.connection.write("itworks".encode("ascii"))
-
- self.connection.write(request_container.SerializeToString())
-
- # print(self.connection.read())
-
- self.connection.close()
-
-
+ # r.ParseFromString(self.connection.read(6))
+ self.connection.write(data_length)
+ self.connection.write(data)
+ result_length = int(self.connection.read(1))
+ print(result_length)
+ result = self.connection.read(result_length)
+ print(result)
+ #
+ # r = Request.RequestContainer()
+ #
+ # r.ParseFromString(self.connection.readline(6))
+ #
+ # print(r)
- # data_bus_request.dataType = data_pb2.Raw
- # print(bytes(data_bus_request))
- #
- # # print(dir(data_bus_request))
- # print(len(data_bus_request.SerializeToString()))
# data_bus_request.DataType = data_pb2.DataType.Raw
# request = leds_pb2.LedStatus()
@@ -96,31 +92,24 @@ def send_data_bus_request_raw_data_type_content(self) -> None:
pass
-def send_data_bus_request_full_data_type_content(self) -> None:
- """Sends request to the board via data bus to retrieve data of full type."""
+ def send_data_bus_request_full_data_type_content(self) -> None:
+ """Sends request to the board via data bus to retrieve data of full type."""
+
+ pass
- pass
+ def send_data_bus_request_infrared_data_type_content(self) -> None:
+ """Sends request to the board via data bus to retrieve data of infrared type."""
-def send_data_bus_request_infrared_data_type_content(self) -> None:
- """Sends request to the board via data bus to retrieve data of infrared type."""
+ pass
- pass
+ def send_data_bus_request_visible_data_type_content(self) -> None:
+ """Sends request to the board via data bus to retrieve data of visible type."""
-def send_data_bus_request_visible_data_type_content(self) -> None:
- """Sends request to the board via data bus to retrieve data of visible type."""
+ pass
- pass
+ def close(self):
+ """Closes client connection."""
- # """bit rate and bit amount per image"""
- #
- #
- # ser = Serial("COM7", 9600)
- # with open("/dev/COM7", "rb") as ser:
- # while True:
- # bs = ser.read(2048)
- # print(repr(bs))
- #
- # for entity in list_ports.comports():
- # print(entity.name, entity.device, entity.description, entity.manufacturer)
+ self.connection.close()
\ No newline at end of file
diff --git a/Scripts/cli/src/proto/request_pb2.py b/Scripts/cli/src/proto/request_pb2.py
index fc0235a..94036d2 100644
--- a/Scripts/cli/src/proto/request_pb2.py
+++ b/Scripts/cli/src/proto/request_pb2.py
@@ -17,7 +17,7 @@
from proto.Content import settings_pb2 as Content_dot_settings__pb2
-DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\rrequest.proto\x12\x0elight_detector\x1a\x12\x43ontent/data.proto\x1a\x12\x43ontent/info.proto\x1a\x16\x43ontent/settings.proto\"\xe2\x01\n\x10RequestContainer\x12\r\n\x05msgId\x18\x01 \x01(\r\x12\x38\n\x07\x64\x61taBus\x18\x02 \x01(\x0b\x32%.light_detector.DataBusRequestContentH\x00\x12\x38\n\x07infoBus\x18\x03 \x01(\x0b\x32%.light_detector.InfoBusRequestContentH\x00\x12@\n\x0bsettingsBus\x18\x04 \x01(\x0b\x32).light_detector.SettingsBusRequestContentH\x00\x42\t\n\x07\x63ontentb\x06proto3')
+DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\rrequest.proto\x12\x0elight_detector\x1a\x12\x43ontent/data.proto\x1a\x12\x43ontent/info.proto\x1a\x16\x43ontent/settings.proto\"\xd3\x01\n\x10RequestContainer\x12\x38\n\x07\x64\x61taBus\x18\x01 \x01(\x0b\x32%.light_detector.DataBusRequestContentH\x00\x12\x38\n\x07infoBus\x18\x02 \x01(\x0b\x32%.light_detector.InfoBusRequestContentH\x00\x12@\n\x0bsettingsBus\x18\x03 \x01(\x0b\x32).light_detector.SettingsBusRequestContentH\x00\x42\t\n\x07\x63ontentb\x06proto3')
_globals = globals()
_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, _globals)
@@ -25,5 +25,5 @@
if _descriptor._USE_C_DESCRIPTORS == False:
DESCRIPTOR._options = None
_globals['_REQUESTCONTAINER']._serialized_start=98
- _globals['_REQUESTCONTAINER']._serialized_end=324
+ _globals['_REQUESTCONTAINER']._serialized_end=309
# @@protoc_insertion_point(module_scope)
diff --git a/Scripts/cli/src/proto/request_pb2.pyi b/Scripts/cli/src/proto/request_pb2.pyi
index 9fefd81..75b6224 100644
--- a/Scripts/cli/src/proto/request_pb2.pyi
+++ b/Scripts/cli/src/proto/request_pb2.pyi
@@ -8,13 +8,11 @@ from typing import ClassVar as _ClassVar, Mapping as _Mapping, Optional as _Opti
DESCRIPTOR: _descriptor.FileDescriptor
class RequestContainer(_message.Message):
- __slots__ = ("msgId", "dataBus", "infoBus", "settingsBus")
- MSGID_FIELD_NUMBER: _ClassVar[int]
+ __slots__ = ("dataBus", "infoBus", "settingsBus")
DATABUS_FIELD_NUMBER: _ClassVar[int]
INFOBUS_FIELD_NUMBER: _ClassVar[int]
SETTINGSBUS_FIELD_NUMBER: _ClassVar[int]
- msgId: int
dataBus: _data_pb2.DataBusRequestContent
infoBus: _info_pb2.InfoBusRequestContent
settingsBus: _settings_pb2.SettingsBusRequestContent
- def __init__(self, msgId: _Optional[int] = ..., dataBus: _Optional[_Union[_data_pb2.DataBusRequestContent, _Mapping]] = ..., infoBus: _Optional[_Union[_info_pb2.InfoBusRequestContent, _Mapping]] = ..., settingsBus: _Optional[_Union[_settings_pb2.SettingsBusRequestContent, _Mapping]] = ...) -> None: ...
+ def __init__(self, dataBus: _Optional[_Union[_data_pb2.DataBusRequestContent, _Mapping]] = ..., infoBus: _Optional[_Union[_info_pb2.InfoBusRequestContent, _Mapping]] = ..., settingsBus: _Optional[_Union[_settings_pb2.SettingsBusRequestContent, _Mapping]] = ...) -> None: ...
diff --git a/Scripts/cli/src/proto/response_pb2.py b/Scripts/cli/src/proto/response_pb2.py
index 7710e5b..fc08d43 100644
--- a/Scripts/cli/src/proto/response_pb2.py
+++ b/Scripts/cli/src/proto/response_pb2.py
@@ -17,7 +17,7 @@
from proto.Content import settings_pb2 as Content_dot_settings__pb2
-DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0eresponse.proto\x12\x0elight_detector\x1a\x12\x43ontent/data.proto\x1a\x12\x43ontent/info.proto\x1a\x16\x43ontent/settings.proto\"\xe6\x01\n\x11ResponseContainer\x12\r\n\x05msgId\x18\x01 \x01(\r\x12\x39\n\x07\x64\x61taBus\x18\x02 \x01(\x0b\x32&.light_detector.DataBusResponseContentH\x00\x12\x39\n\x07infoBus\x18\x03 \x01(\x0b\x32&.light_detector.InfoBusResponseContentH\x00\x12\x41\n\x0bsettingsBus\x18\x04 \x01(\x0b\x32*.light_detector.SettingsBusResponseContentH\x00\x42\t\n\x07\x63ontentb\x06proto3')
+DESCRIPTOR = _descriptor_pool.Default().AddSerializedFile(b'\n\x0eresponse.proto\x12\x0elight_detector\x1a\x12\x43ontent/data.proto\x1a\x12\x43ontent/info.proto\x1a\x16\x43ontent/settings.proto\"\xd7\x01\n\x11ResponseContainer\x12\x39\n\x07\x64\x61taBus\x18\x01 \x01(\x0b\x32&.light_detector.DataBusResponseContentH\x00\x12\x39\n\x07infoBus\x18\x02 \x01(\x0b\x32&.light_detector.InfoBusResponseContentH\x00\x12\x41\n\x0bsettingsBus\x18\x03 \x01(\x0b\x32*.light_detector.SettingsBusResponseContentH\x00\x42\t\n\x07\x63ontentb\x06proto3')
_globals = globals()
_builder.BuildMessageAndEnumDescriptors(DESCRIPTOR, _globals)
@@ -25,5 +25,5 @@
if _descriptor._USE_C_DESCRIPTORS == False:
DESCRIPTOR._options = None
_globals['_RESPONSECONTAINER']._serialized_start=99
- _globals['_RESPONSECONTAINER']._serialized_end=329
+ _globals['_RESPONSECONTAINER']._serialized_end=314
# @@protoc_insertion_point(module_scope)
diff --git a/Scripts/cli/src/proto/response_pb2.pyi b/Scripts/cli/src/proto/response_pb2.pyi
index 8f4e771..f0371e5 100644
--- a/Scripts/cli/src/proto/response_pb2.pyi
+++ b/Scripts/cli/src/proto/response_pb2.pyi
@@ -8,13 +8,11 @@ from typing import ClassVar as _ClassVar, Mapping as _Mapping, Optional as _Opti
DESCRIPTOR: _descriptor.FileDescriptor
class ResponseContainer(_message.Message):
- __slots__ = ("msgId", "dataBus", "infoBus", "settingsBus")
- MSGID_FIELD_NUMBER: _ClassVar[int]
+ __slots__ = ("dataBus", "infoBus", "settingsBus")
DATABUS_FIELD_NUMBER: _ClassVar[int]
INFOBUS_FIELD_NUMBER: _ClassVar[int]
SETTINGSBUS_FIELD_NUMBER: _ClassVar[int]
- msgId: int
dataBus: _data_pb2.DataBusResponseContent
infoBus: _info_pb2.InfoBusResponseContent
settingsBus: _settings_pb2.SettingsBusResponseContent
- def __init__(self, msgId: _Optional[int] = ..., dataBus: _Optional[_Union[_data_pb2.DataBusResponseContent, _Mapping]] = ..., infoBus: _Optional[_Union[_info_pb2.InfoBusResponseContent, _Mapping]] = ..., settingsBus: _Optional[_Union[_settings_pb2.SettingsBusResponseContent, _Mapping]] = ...) -> None: ...
+ def __init__(self, dataBus: _Optional[_Union[_data_pb2.DataBusResponseContent, _Mapping]] = ..., infoBus: _Optional[_Union[_info_pb2.InfoBusResponseContent, _Mapping]] = ..., settingsBus: _Optional[_Union[_settings_pb2.SettingsBusResponseContent, _Mapping]] = ...) -> None: ...
diff --git a/light_detector.ioc b/light_detector.ioc
index bcc6aae..c20864e 100644
--- a/light_detector.ioc
+++ b/light_detector.ioc
@@ -3,7 +3,7 @@ CAD.formats=
CAD.pinconfig=
CAD.provider=
Dma.I2C1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
-Dma.I2C1_RX.0.Instance=DMA1_Channel7
+Dma.I2C1_RX.0.Instance=DMA2_Channel6
Dma.I2C1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.I2C1_RX.0.MemInc=DMA_MINC_ENABLE
Dma.I2C1_RX.0.Mode=DMA_NORMAL
@@ -12,7 +12,7 @@ Dma.I2C1_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.I2C1_RX.0.Priority=DMA_PRIORITY_LOW
Dma.I2C1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.I2C1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
-Dma.I2C1_TX.1.Instance=DMA1_Channel6
+Dma.I2C1_TX.1.Instance=DMA2_Channel7
Dma.I2C1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.I2C1_TX.1.MemInc=DMA_MINC_ENABLE
Dma.I2C1_TX.1.Mode=DMA_NORMAL
@@ -22,9 +22,31 @@ Dma.I2C1_TX.1.Priority=DMA_PRIORITY_LOW
Dma.I2C1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=I2C1_RX
Dma.Request1=I2C1_TX
-Dma.RequestsNb=2
+Dma.Request2=USART2_RX
+Dma.Request3=USART2_TX
+Dma.RequestsNb=4
+Dma.USART2_RX.2.Direction=DMA_PERIPH_TO_MEMORY
+Dma.USART2_RX.2.Instance=DMA1_Channel6
+Dma.USART2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_RX.2.MemInc=DMA_MINC_ENABLE
+Dma.USART2_RX.2.Mode=DMA_NORMAL
+Dma.USART2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_RX.2.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_RX.2.Priority=DMA_PRIORITY_LOW
+Dma.USART2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
+Dma.USART2_TX.3.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART2_TX.3.Instance=DMA1_Channel7
+Dma.USART2_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART2_TX.3.MemInc=DMA_MINC_ENABLE
+Dma.USART2_TX.3.Mode=DMA_NORMAL
+Dma.USART2_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART2_TX.3.PeriphInc=DMA_PINC_DISABLE
+Dma.USART2_TX.3.Priority=DMA_PRIORITY_LOW
+Dma.USART2_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
File.Version=6
GPIO.groupedBy=Group By Peripherals
+I2C1.IPParameters=Timing
+I2C1.Timing=0x10909CEC
KeepUserPlacement=false
Mcu.CPN=STM32L476RGT3
Mcu.Family=STM32L4
@@ -33,9 +55,8 @@ Mcu.IP1=I2C1
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SYS
-Mcu.IP5=TIM16
-Mcu.IP6=USART2
-Mcu.IPNb=7
+Mcu.IP5=USART2
+Mcu.IPNb=6
Mcu.Name=STM32L476R(C-E-G)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC13
@@ -47,8 +68,7 @@ Mcu.Pin5=PA5
Mcu.Pin6=PB8
Mcu.Pin7=PB9
Mcu.Pin8=VP_SYS_VS_Systick
-Mcu.Pin9=VP_TIM16_VS_ClockSourceINT
-Mcu.PinsNb=10
+Mcu.PinsNb=9
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32L476RGTx
@@ -57,6 +77,8 @@ MxDb.Version=DB.6.0.100
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA1_Channel6_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Channel7_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA2_Channel6_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA2_Channel7_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.EXTI15_10_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.ForceEnableDMAVector=true
@@ -69,7 +91,6 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
-NVIC.TIM1_UP_TIM16_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA2.Locked=true
@@ -123,39 +144,61 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true,6-MX_TIM16_Init-TIM16-false-HAL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_USART2_Init-USART2-false-HAL-true
+RCC.AHBFreq_Value=80000000
+RCC.APB1Freq_Value=80000000
+RCC.APB1TimFreq_Value=80000000
+RCC.APB2Freq_Value=80000000
+RCC.APB2TimFreq_Value=80000000
+RCC.CortexFreq_Value=80000000
+RCC.DFSDMFreq_Value=80000000
+RCC.FCLKCortexFreq_Value=80000000
RCC.FamilyName=M
+RCC.HCLKFreq_Value=80000000
RCC.HSE_VALUE=8000000
RCC.HSI_VALUE=16000000
-RCC.IPParameters=FamilyName,HSE_VALUE,HSI_VALUE,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MSI_VALUE,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,SAI1Freq_Value,SAI2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.I2C1Freq_Value=80000000
+RCC.I2C2Freq_Value=80000000
+RCC.I2C3Freq_Value=80000000
+RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PWRFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.LPTIM1Freq_Value=80000000
+RCC.LPTIM2Freq_Value=80000000
+RCC.LPUART1Freq_Value=80000000
RCC.LSCOPinFreq_Value=32000
RCC.LSE_VALUE=32768
RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=80000000
RCC.MSI_VALUE=4000000
-RCC.PLLPoutputFreq_Value=4571428.571428572
-RCC.PLLQoutputFreq_Value=16000000
-RCC.PLLRCLKFreq_Value=16000000
+RCC.PLLN=40
+RCC.PLLPoutputFreq_Value=22857142.85714286
+RCC.PLLQoutputFreq_Value=80000000
+RCC.PLLRCLKFreq_Value=80000000
RCC.PLLSAI1PoutputFreq_Value=4571428.571428572
RCC.PLLSAI1QoutputFreq_Value=16000000
RCC.PLLSAI1RoutputFreq_Value=16000000
RCC.PLLSAI2PoutputFreq_Value=4571428.571428572
RCC.PLLSAI2RoutputFreq_Value=16000000
+RCC.PWRFreq_Value=80000000
RCC.SAI1Freq_Value=4571428.571428572
RCC.SAI2Freq_Value=4571428.571428572
+RCC.SWPMI1Freq_Value=80000000
+RCC.SYSCLKFreq_VALUE=80000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=80000000
+RCC.UART5Freq_Value=80000000
+RCC.USART1Freq_Value=80000000
+RCC.USART2Freq_Value=80000000
+RCC.USART3Freq_Value=80000000
RCC.VCOInputFreq_Value=4000000
-RCC.VCOOutputFreq_Value=32000000
+RCC.VCOOutputFreq_Value=160000000
RCC.VCOSAI1OutputFreq_Value=32000000
RCC.VCOSAI2OutputFreq_Value=32000000
SH.GPXTI13.0=GPIO_EXTI13
SH.GPXTI13.ConfNb=1
-TIM16.IPParameters=Prescaler,Period
-TIM16.Period=65535
-TIM16.Prescaler=13
-USART2.IPParameters=VirtualMode-Asynchronous
+USART2.BaudRate=9600
+USART2.IPParameters=BaudRate,VirtualMode-Asynchronous
USART2.VirtualMode-Asynchronous=VM_ASYNC
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
-VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
-VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT
board=custom
isbadioc=false
diff --git a/light_detector.launch b/light_detector.launch
index 3dcebbd..0045212 100644
--- a/light_detector.launch
+++ b/light_detector.launch
@@ -36,8 +36,8 @@
-
-
+
+
@@ -78,5 +78,6 @@
+