diff --git a/tapa_fast_cosim/common.py b/tapa_fast_cosim/common.py
index 8ed1db0..31b7f9e 100644
--- a/tapa_fast_cosim/common.py
+++ b/tapa_fast_cosim/common.py
@@ -4,4 +4,4 @@ def __init__(self, name, data_width, addr_width):
     self.data_width = data_width
     self.addr_width = addr_width
 
-MAX_AXI_BRAM_ADDR_WIDTH = 20
+MAX_AXI_BRAM_ADDR_WIDTH = 24
diff --git a/tapa_fast_cosim/templates.py b/tapa_fast_cosim/templates.py
index 801f721..53caf54 100644
--- a/tapa_fast_cosim/templates.py
+++ b/tapa_fast_cosim/templates.py
@@ -364,7 +364,7 @@ def get_end():
 
 def get_axi_ram_module(axi: AXI, input_data_path: str, c_array_size: int):
   if axi.data_width / 8 * c_array_size > 2**MAX_AXI_BRAM_ADDR_WIDTH:
-    _logger.error('The current cosim data size is larger than the recommended threashold (1 MB per DDR/HBM). '
+    _logger.error('The current cosim data size is larger than the recommended threashold (16 MB per DDR/HBM). '
                   'Option 1: reduce cosim data size. '
                   'Option 2: increase the MAX_AXI_BRAM_ADDR_WIDTH constant in tapa_fast_cosim/common.py. '
                   'To do that, clone the https://github.com/UCLA-VAST/tapa-fast-cosim.git repo and '