From 558fb71ea3ae4cb8018832e1f884be3d4640afea Mon Sep 17 00:00:00 2001 From: Christian Bespin Date: Mon, 13 May 2024 16:58:36 +0200 Subject: [PATCH 1/2] REV: Revert system verilog statement for existing firmware synthesis --- basil/firmware/modules/utils/CG_MOD_neg.v | 2 +- basil/firmware/modules/utils/CG_MOD_pos.v | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/basil/firmware/modules/utils/CG_MOD_neg.v b/basil/firmware/modules/utils/CG_MOD_neg.v index 865825b87..9ac7212ee 100644 --- a/basil/firmware/modules/utils/CG_MOD_neg.v +++ b/basil/firmware/modules/utils/CG_MOD_neg.v @@ -18,7 +18,7 @@ input ck_in,enable; output ck_out; reg enl; -always_latch +always @(ck_in or enable) if (ck_in) enl = enable; assign ck_out = ck_in | ~enl; diff --git a/basil/firmware/modules/utils/CG_MOD_pos.v b/basil/firmware/modules/utils/CG_MOD_pos.v index 7a5667b17..add8daa35 100644 --- a/basil/firmware/modules/utils/CG_MOD_pos.v +++ b/basil/firmware/modules/utils/CG_MOD_pos.v @@ -18,9 +18,11 @@ wire ck_inb; reg enl; assign ck_inb = ~ck_in; -always_latch + +always @(ck_inb or enable) if (ck_inb) enl = enable; + assign ck_out = ck_in & enl; endmodule From 76dec3c69a1898226fee151069cd4c0728ff8b58 Mon Sep 17 00:00:00 2001 From: Christian Bespin Date: Tue, 14 May 2024 16:48:02 +0200 Subject: [PATCH 2/2] Disable verilator latch warning for simulations --- basil/firmware/modules/utils/CG_MOD_neg.v | 3 +++ basil/firmware/modules/utils/CG_MOD_pos.v | 2 ++ 2 files changed, 5 insertions(+) diff --git a/basil/firmware/modules/utils/CG_MOD_neg.v b/basil/firmware/modules/utils/CG_MOD_neg.v index 9ac7212ee..d62302473 100644 --- a/basil/firmware/modules/utils/CG_MOD_neg.v +++ b/basil/firmware/modules/utils/CG_MOD_neg.v @@ -18,9 +18,12 @@ input ck_in,enable; output ck_out; reg enl; +// verilator lint_off LATCH always @(ck_in or enable) if (ck_in) enl = enable; +// verilator lint_on LATCH + assign ck_out = ck_in | ~enl; endmodule diff --git a/basil/firmware/modules/utils/CG_MOD_pos.v b/basil/firmware/modules/utils/CG_MOD_pos.v index add8daa35..fb8c08e3c 100644 --- a/basil/firmware/modules/utils/CG_MOD_pos.v +++ b/basil/firmware/modules/utils/CG_MOD_pos.v @@ -19,9 +19,11 @@ reg enl; assign ck_inb = ~ck_in; +// verilator lint_off LATCH always @(ck_inb or enable) if (ck_inb) enl = enable; +// verilator lint_on LATCH assign ck_out = ck_in & enl;