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unisim.patch
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# Taken from https://github.com/binsec/binsec/issues/32#issuecomment-1787853298
# and https://github.com/binsec/binsec/issues/37#issuecomment-2012278874
#
# We reproduce here the copyright notice of the concerned repository
# (https://github.com/binsec/unisim_archisec):
#
# Copyright (c) 2007-2023,
# Commissariat a l'Énergie Atomique et aux Énergies Alternatives (CEA)
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
#
# - Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# - Neither the name of CEA nor the names of its contributors may be used
# to endorse or promote products derived from this software without
# specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
# IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
diff --git a/aarch32/top_thumb.tcc b/aarch32/top_thumb.tcc
index e21d8e1..03f80f8 100644
--- a/aarch32/top_thumb.tcc
+++ b/aarch32/top_thumb.tcc
@@ -20917,13 +20917,13 @@ void OpClz< ARCH>::execute( ARCH & cpu)
{
{
typedef typename ARCH::U32 U32;
+ typedef typename ARCH::BOOL BOOL;
U32 val = cpu.GetGPR( rm );
- if (cpu.Test(val == U32(0)))
- val = U32(32);
- else
- val = U32(31) - BitScanReverse( cpu.GetGPR( rm ) );
-
- cpu.SetGPR( rd, val );
+ BOOL z = val == U32(0);
+ U32 nz_mask = U32(z) - U32(1);
+ U32 res = ~nz_mask & U32(32)
+ | nz_mask & (U32(31) - BitScanReverse( cpu.GetGPR( rm ) ));
+ cpu.SetGPR( rd, res );
}}
template < typename ARCH>
@@ -24332,8 +24332,8 @@ void OpSmlaxy< ARCH>::execute( ARCH & cpu)
op2 = cpu.GetGPR(ra),
res = op1 + op2;
- U32 overflow = ((op1 & op2 & (~res)) | ((~op1) & (~op2) & res)) >> 31;
- cpu.CPSR().Set( Q, BOOL(overflow | cpu.CPSR().Get( Q )) );
+ U32 overflow = ((op1 & op2 & (~res)) | ((~op1) & (~op2) & res)) & U32(0x80000000);
+ cpu.CPSR().Set( Q, BOOL(overflow != U32(0)) | BOOL(cpu.CPSR().Get( Q )) );
cpu.SetGPR( rd, res );
}}