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release-notes.txt
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Release notes for OCTEON SDK OCTEON-SDK-5.1.0
File inventory/description
=====================================
The following directories make up the OCTEON SDK.
directory description
--------- ---------------------
bootloader contains the source for the bootloader.
docs contains html documentation for the SDK.
It also contains original documentation and
copyright information for the toolchain,
debugger, and bootloader.
ejtag contains scripts for Ejtag probes to help in
accessing OCTEON chip CSRs. For the Majic
Ejtag probe, these scripts add windows for
each CSR group with bitfield decoding.
examples contains example applications. See
sub-directories for details.
executive contains the source for the simple executive.
tools contains the GCC 4.7-based toolchain,
including mipsisa64-octeon-elf target tools
based on newlib C library and
mips64-octeon-linux target tools based on the
glibc library.
simulator contains the OCTEON simulators and related
utilities.
host contains links to all of the development host
bin, include, and library files.
target contains links to all of the target (OCTEON)
bin, include, and library files.
The host and target directories are used by the examples and by other
Cavium provided applications to reference the required SDK files.
Change History
========================================================================
Release 5.1.0
General changes:
* Added cn73xx pass1.3, nicx40e and ebb7500 board support
* Added initial support of LiquidIO 10GBASET "copperhead" board in u-boot.
* Enabled Hush parser on all LiquidIO cards.
* Initial patch release to support CN78XX Pass2.0 chip.
- Adjust to new deskew byte lanes for cn78xx pass 2.0.
- Fixed 10G-KR and 40G-KR4 interfaces to work on pass2.0
- Updated CSRs
- Fixed oct-remote utils to access correct SLI CSRs, have
different addresses between pass1.x and pass2.0
* Added nic225e board support in u-boot
* Updated Avago phy for LiquidIO nic225e nic, now the links come up
quicker than before.
* Added NVME driver support in u-boot.
* Fixed code to go through each core to report IOBP_PP_BIST/IOBN_PP_BIST
errors.
* Fixed CCPI initialization code, now tunes CCPI lanes on both the nodes.
node#1 needs to run ocx-boot.bin image, CCPI boot code.
* Updated Octeon III error array table to show SBE/DBE flags for
co-processor blocks.
* Added new APIs to enable/disable error interrupts based on SBE/DBE flags.
* Added more functions for LMC & L2C ECC errors for OcteonII models.
* Enhanced L2C and LMC EDAC driver to handle SBE/DBE errors appropriately
for OcteonII and OcteonIII models.
* Updated PKI microcode, addresses performance issues.
* Fixed GSER to increase bandwidth of DLLs to address SATA link stability.
* Added oct-remote-app-ctl utility. This utility requires GCC5 or later
version of host compiler. Please install elfutils-libelf-devel-static
package to compile oct-remote-app-ctl utility.
* Use physical coremask to report IOBN BIST status on cn7xxx models.
* Added hotplug support to BGX interfaces for SE apps.
* Fixed following in DDR initialization code:
- Limit hardware write-leveling validity checks
- Fixed CSR reads to work on multi-node system.
- Check DDR speed against CPU speed for legal configuration
- Fix DDR3 configuration data for EBB7500.
- Use multi-sampling of DAC settings to calculate best values.
- Correctly handle 32-bit mode in several deskew and DAC routines.
- Enhance software write-leveling handling of the ECC byte.
- Set TIMING_PARAMS1[trfc_dlr] field appropriately for 3DS DIMMs
- Hardware write-leveling change for DDR4 x4 DIMMs
- Fix Vref calculation when RTT_WR==0 for 1-rank DIMMs
- Adjust tRFC for 7800 PASS2.x when too low
- Use "disable_sequential_delay_check" to disable HWL validity checking
and disable RL neighbor consideration, in addition to its original use.
- Update/correct DDR configuration data file for NIC23 and NIC225e.
- Added DDR3 4Rx4 RDIMM support.
- Improve DDR4 read-leveling accuracy
- Improve performance of 1-rank DIMMs
- Improve performance of 2-slot configurations
- Add support for mini-DIMMs and SO-DIMMs
- Allow read bit-deskew to be disabled
- Detection of 3DS and NV DIMMs
- Improve default DIMM information output.
- Added DBI support to DDR4.
- Added memory retaining feature to DDR4 type dimms.
- Added 100 MHz DCLK as an alternative reference clock to be triggered
by DDR4 for DDR rates above 2000 MT/s. Need latest MCU release.
* Fixed various issues with sff70xx, eap7000_ref and wave2 boards.
* Fixed nic23/nic73 to configure vs7224, the re-clocking chip, based on
cable connected when u-boot comes up.
* Updated USB driver to assert uphy PLL when lock is not detected.
* Updated eMMC driver to work at 52MHz speed.
* Added HiGig and HiGig2 support for BGX interfaces.
* Fixed known issue: Warm/soft reset may corrupt Root.CvmCtl<31:24> and
Root.PRId[Revision] (Re-worked on this errata)
* Fixed known issue: 10GBASE-KR hardware training may not update PHY TX taps
* Fixed known issue: SERDES temperature issues (Some enhancements)
* Added NAND support on cn73xx.
Toolchain Changes:
* Backport fix for fsf glibc bug 16009 (CVE-2015-8982)
* Backport fix for fsf glibc bug 18032 (CVE-2015-8984)
* Backport fix for fsf glibc bug 17269 (CVE-2015-8983)
* Backport fix for fsf glibc bug 21624 (CVE-2017-1000366)
* Backport fixes for thin archive needed to compile newer kernels: fsf
binutils bug 15151 and 15140
* Fixed wrong code dealing with some bitfields insertion in one case.
* Backport a few C++11 fixes (FSF bug 54086 and FSF bug 54341/54253)
* Backported fixes for glibc’s getaddrinfo so it no longer crashes
* Backport a gcc fix for creating wrong code in some cases when passing
struct argument to a function
* Debugging PIE applications on Linux userland works now
* Added cfi (unwind info) to clone, start, etc. so doing unwind (backtrace)
from a thread does not cause a crash
* Fixed some security issues in glibc: CVE-2016-3706, CVE-2016-4429
* Remove an assert inside GCC which was wrong causes internal compiler errors
Release 5.0.0
* Added 68xx support to linux kernel 4.4.3.
* Fixed oct-remote utilities to use correct CSRs based on pass of the chip.
Toolchain changes:
* Fix internal compiler error when –g is used with optimization in some cases
* Fix wrong code with the __atomic_* functions when used with half-word
(16bit) or byte memory locations
o Note this is seen with cvmx_fau_atomic_add8 functions on Octeon3
Release 3.1.2
Known Issues fixed:
(Please refer to cn78xx/cn73xx silicon’s known issues document for details):
* Fix for DDR4 tRRD_S Timing
* Fix for Write Leveling across Multiple Ranks
* Fix for Slot Control Default Settings
* Fix for DDR4 tWTR_L Timing
* Fix for CCPI Contended Local Allocation
* Fix for DM Pins
* Fix for L2C_TAD_CTL[MAXLFB] Reset Value
* Fix for GSER PLL initialization order
* Fix for 10G PHY Temperature Range
* Fix for KR Training Coefficient Update
* Fix for Backpressure IDs
* Fix for PCIe Gen3 Equalizer Adaptation
* Fix for Base-R Link Training after Auto-Negotiation
* Fix for LAPTR with L2_CUSTOM Header
General Changes:
- Fixed oct-remote utils to work on cn73xx
- Updated all the APIs to support cn73xx.
- Added support to oct-remote-boot to load the bootloader into L2 cache and
let the bootloader initialize DRAM instead of oct-remote-boot.
- Added ilkX:Y_speed, ilaX:Y_speed, ilaX:Y_lanes env variables
to configure speed, lanes for these interfaces.
- Added 10G-KR and 40G-KR4 support.
- Added simulator support for cnf75xx.
- Various bug fixes to linux-filter example for O2 and O3 Octeon models.
Bootloader Changes:
- Added nic73 board support
- Added EBB7304 board support
- Added Niagara board support
- Updated bootloaderupdate command to update spi bootloader
- Added DDR4 RDIMM support
- Fixed memory initializatio code to use environment variables for RODT,
etc. settings for Vref calculation, etc.
- Fixed periodic recalibration of DDR90 delay line in for 4-LMC mode
- Added ddrverbose tlv entry to set various verbosity while initializing
memory. Useful for remote boot.
- Added APIs to monitor LED activity.
- Various bug fixes to SATA low level driver.
- Various bug fixes to SPI stage2 bootloader.
- Various bug fixes to eMMC stage2 bootloader.
- Various bug fixes to USB driver.
- Added SPI bootloader support for new LiteOn boards.
- Added sff7800 board support
- Added wave2 board support
- Added 2500Base-X support in Wave2 board.
- Fixed various issues with ref clock settings for cn70xx, requires fixing
parameters passed to initialize DLMs.
- Added sata support.
- Added multinode support in u-boot
- Created new generic stage 2 bootloaders for cn70xx.
- Added native API for SE applications
Executive Changes:
- Various bug fixes to PKI, PKO, FPA blocks.
- Various bug fixes to improve performance.
- Enhanced ILK APIs to support 128 channels for 78xx.
- Fixed incorrect block size limitation in FPA APIs
- Fixed alignment issue with setting up FPA pools
- Fixed large buffer count truncation issue with resource allocation
- Fixed memory leakage in SSO block when shutting down the interface
- Fixed the crash noticed when SE apps are compiled with 1-1 TLB
mapping
- Various bug fixes to LAP APIs.
- Fixed race condition while registering mailbox interrupts.
- Disabled some error interrupts which were status bits.
Toolchain Changes:
- Backported fix for http://gcc.gnu.org/PR52685
- Backported Fixes for many security issue for glibc
- Backported fix for http://gcc.gnu.org/PR54877
- Backported fix for http://gcc.gnu.org/PR53549
- Backport fix for http://gcc.gnu.org/PR52973
- Backported fix for http://gcc.gnu.org/PR52584
- Fixed gcov (and PGO) for multi-node on simple-exec
- Fixed CVE-2015-0235
- Fixed ldd usage for Octeon3
- Fixed CVE-2014-9402
- Fixed CVE-2012-3406
- Fixed CVE-2014-7817
- Fixed CVE-2013-4788
- Fixed CVE-2013-4458
- Fixed CVE-2012-4412.
- Fixed CVE-2012-4424.
- Fixed a few security issues
- Fixed symbolic link for usr/include to be
- Fixed GCC shared libraries
- Update to the latest Linux headers from the kernel
Release 3.1.1
Known Issues fixed (Please refer to cn78xx silicon’s known issues
document for details):
* Fix for GSER(0..13)_CFG[BGX_QUAD]=1
* Fix for OCI remote atomics
* Fix for RSTP's don't work in pass 1
* Fix for L2C_OCI_CTL[RLDD_PSHA]=1
* Fix for L2C_CTL[DISSBLKDTY]=0
* Fix for L2C_OCI_CTL[LOCK_LOCAL_STC]=1
* Fix hang when OCI victim hits home request
* Fix for RED=1,DROP=1 behaving the same as RED=1,DROP=0
* Fix for PKI PCAM writes can cause ECC errors
* Fix for Calendar table writes when CAL_ENA=1
* Fix for PKI_BUF_CTL[FPA_WAIT]
* Fix for PKI_BUFLINK_S's are endian-swapped in big-endian mode
* Fix for PKO may malfunction when PKO_SEND_HDR_S[CKL4] is set when
PKO_SEND_HDR_S[TOTAL] is large
* Fix for PKO_SEND_HDR_S[TOTAL]>32KB
* Fix for Local Pointers that are destination must allocate
* Fix for PKI_CL(0..3)_ECC_CTL reads return garbage
* Fix for PKO_SEND_HDR_S[N2]=1 may cause corruption
* Fix for Negative PKO_*_SHAPE[ADJUST] values may not work
78xx Pass 1.0 Fixes
* Fix for Electrical Idle logic can coast [Impacts pass1.0]
* Fix for GSER incorrect synchronizers hurts PCIe [Impacts pass1.0]
* Fix for GSER has wrong PCIe RX detect reset value [Impacts pass1.0]
* Fix for GSER PCIe Link bring up Unreliable [Impacts pass1.0]
* Fix for PCIe gen3 doesn't work [Impacts pass1.0]
* Fix for GEN3 Equalization may fail [Impacts pass1.0]
* Fix for STORE data FIFO overflow when OCI is used
* Fix for PKI stats may read as ones during packet flow [Impacts pass1.0]
* Fix for PKO hangs after DPFI flush [Impacts pass1.0]
* Fix for PCIE*(0..3)_CFG548[ECRD] reset value is incorrect for gen3 [Impacts
pass1.0]
General Changes:
* Updated oct-remote utils to work on cn78xx.
* Added new timer example.
* cvmx_bootmem now allocates from the end of a supplied range instead of from
the beginning.
* Many APIs have been extended to support multiple nodes.
* Removed the diagnostics directory as these do not support the OCTEONIII
family. Instead use the BDK package for testing of memory and various
chip interfaces.
Executive Changes:
* Removed resource configuration language support. Resources are now
assigned using static defines in config/cvmx-config.h and
config/executive-config.h. Example template files exist in
executive/cvmx-config.h.template and
executive/executive-config.h.template, please see [OCTEON SDK config and
build system] for information.
* Added native support for cn78xx devices, along with backwards compatible
API support, see section [CN78XX backward compatibility support] in the
documentation for limitations and issues.
* passthrough_o3 example added to demonstrate cn78xx native api implementation.
* FAU emulation implemented on cn78xx using atomic memory.
* linux-filter now provides the appropriate modprobe command for cn78xx chips,
including the pki_packet_pool parameter.
* The debugger stub is not currently supported for more than one node on 78XX.
CN78XX native api details:
* PKO3 uses command descriptors, with commands pushed and popped to define
the operations involved in the transmission.
* Multiple buffers can be sent in scatter-gather mode, each freed to its own aura
* Offload computation commands are used for tcp/udp checksum calculation
See section [CN78XX native api reference] for information on native pko3
programming.
* PKI uses qpg groups to specify per-port memory and group configurations,
please see section [CN78XX-specific packet input (PKI) details] for more
details.
* FPA3 uses a virtual pool structure, otherwise known as 'auras'. Physical
pools must be attached to auras in order to function. The CN78XX has 1024
auras and 64 pools. See [CN78XX-specific FPA3 API details] for more details.
Bootloader Changes:
* Support for Octeon CN78XX has been added.
* Added TB7600 board support.
* Enhanced QLM configuration environment variables for EBB78XX to handle
multiple nodes.
* Changed DDR initialization read and write leveling code to not change the
number of ways in the L2 cache when running in U-Boot. This is required
for multi-node initialization.
* Add debug locks when debugging is enabled and cores are started for
applications or the Linux kernel.
* Improved core synchronization before starting SE applications.
* Moved where additional cores are powered up and taken out of reset to later
in the boot process.
* Enhanced the exception handler to display more information.
* Simplified the boot bus moveable region support and made it compatible with
the Linux kernel support.
* Added callback function for when the Ethernet driver detects a link state
change.
* Added support for CN70XX AP, NAS, and Router reference designs. (please
note that the Ethernet switch on the Router reference board is functional
but still has some issues, when cables are unplugged/replugged.)
* Added support for Swordfish board
* Added hooks for pre and post USB initialization
* Added support to always scan USB storage and disable "usb start" message.
* Disable DDR debugging support for eMMC bootloader to reduce the size of
the bootloader so it will fit in CN70XX's L2 cache.
* There are still issues with the VSC8490 PHY and it should be considered
experimental. Packet corruption occurs when sending at or near 100% line
rate and SGMII support currently does not work. LED support also has not
been implemented.
* Support for additional PHY devices has been added including the
Vitesse VSC8490, Vitesse VSC8664 and the Cortina CS4223.
* Support for multi-node DDR initialization has been added.
* Support for USB, MDIO, TWSI and eMMC has been made multi-node aware.
* Numerous fixes and enhancements for bootoct and bootoctlinux commands in
order to support the CN78XX and multiple nodes.
* LED support for VSC8488 and the Vitesse CS4318 rev B has been added for
Liquid I/O boards.
* Fixed crash when shutting down USB if USB did not properly initialize.
* Automatically set dmack_pi according to how the boot bus is strapped for
compact flash.
* Added write support for compact flash (note: does not work with all cards)
* Added support for sub-PHY addresses in order to support the Cortina CS4223
PHY for 10 and 40Gbps.
Toolchain Changes:
* Improve performance of strcmp for Linux userland.
* Fix using of Static libstdc++ when using inside a shared library.
* Fix Internal Compiler Error in try_move_mult_to_index with array
accesses in some cases.
* Fixed where the result of an 'if' statement was miscompiled (bug #9436).
* Fixed where the result of an 'if' statement was miscompiled, a missing and instruction (bug #12749).
* Asan has been fixed to work correctly with n64.
* Fixed get_nprocs in glibc so it works when running on the simulator.
* Fixed some security bugs in glibc.
* Fixed a write beyond the current stack pointer in ld.so in glibc.
* Added new "set/show startup-with-shell" for gdb.
Release 3.1.0
General Changes:
* cvmx-interrupt: APIs modified to allow for interrupt sources on cn78XX.
* cvmx-mbox: New API to generalize mailbox interrupt support.
* cvmx-coremask: APIs modified to support more cores and nodes.
* APIs for getting the CSR information are optimized, some of the old
APIs don't work, use new functions.
* Added simulators for CN70XX and CN78XX.
* Updated oct-remote utilities to support OCTEON3.
* Updated build system by adding new abi to generate floating point
instructions to run on OCTEON3.
Bootloader Changes:
* Updated bootloader to 2013.07 version.
* Added support for CN70XX.
* Fixed MMC/SD support for CN70XX.
* Fixed MMC/SD support for multiple slots.
* Added MMC/SD card detect and write protect GPIO support.
* Added MMC/SD power control support. Power/reset can be common between
multiple slots in device tree.
* First MMC device is now 1, not 0.
* Various other MMC/SD fixes.
* Some changes to SATA/ATA code in preparation to AHCI support for CN70XX.
* SPI EEPROM support added.
* NAND driver changes for CN70XX.
* Added hardware BCH ECC support for NAND for CN70XX.
* Hardware BCH ECC uses the same layout as software BCH but ecc codes are not
compatible.
* Added EVB7000 SFF board.
* Added EVB7000 board.
* Use CRC32 to generate random MAC address instead of MD5 since MD5 may be
disabled.
* Added fix for USB initialization that caused USB to fail when powering
up approximately 0.1% of the time due to corrupted USB data being sent by
OCTEON.
* Speed up device tree parsing
* Minor changes made in EMMC booting due to cache changes in CN70XX.
* Added AGL (octrgmii0) support for CN70XX.
* Added QSGMII support for CN70XX.
* Added support for Vitesse VCS8574 for both SGMII and QSGMII modes.
* Added DLM support.
* Added device tree alias trimming support.
* Changed gd to use new U-Boot definition.
* Enable page mode where available to speed up NOR flash.
* Speed up simulator bootloader.
* Some cleanup of board_octeon.c.
* Added support for Micrel 1G PHY and generic 1G PHY support.
* I2C uses low-level driver to support transfers larger than 8 bytes.
* Fixed ODT1 wiring for quad-ranked dimms.
* Disable DMA for compact flash when bootloader is loaded above 64GB.
* Initial support for XHCI (USB 3.0) has been added. This support is very
preliminary and there are known issues. For now ignore errors complaining
that ports cannot be reset. There are also some situations where a
combination of USB 2.0 and USB 3.0 devices will not be properly
recognized.
Executive:
* Fixed the padding for higig to include the header size.
* Fixed QLM settings for nic68_4 NIC card.
* Updated packet I/O shutdown function to free PKO queues.
* Re-wrote ILK calender initialization code.
* Fixed typo in parsing ipv4 tag tuple from config language.
* Fixed command queue base ptr to store 40 bit address to support 64GB -
128 GB of memory
* Apply the workaround for Errata AGL-16930.
* Fixed number of FIFOs to use for RX buffer for RXAUI interface.
* Fixed interface mapping when using more PKO queues per interface.
* Fixed FCS stripping for NPI interface.
* Clear any SSO errors when loading applications through SGMII interface.
Toolchain:
* binutils has been upgraded to 2.23.2.
* GDB has been upgraded to 7.6.
* Octeon 3 support has been added.
* Address sanitizer support has been added (-fsanitizer=address)
* Undefined sanitizer support has been added (-fsanitizer=undefined)
* Profiling has been fixed with threads (Need to use -fprofile-gen-atomic=3 option)
Release 3.0.0
Known Issues fixed (Please refer to the specific OCTEON silicon’s known issues
document for details):
* CMB hang [Impacts: cn68xx pass1.x, pass2.0 and pass2.1 OCTEON models].
* QLM issue at 6.25 Gbaud [Impacts: cn68xx pass2.0 OCTEON model].
General Changes:
* Made some enhancements to error handling interrupts.
* Enhanced simple-executive to generate a core file for an invalid memory access.
* Added oct-remote-coredump utility to dump a core file.
* Added otrace utility for simple-executive applications.
* Updated dwarfdump, viewzilla and perfzilla to work with GCC-4.7 compiler.
* Updated APIs to support cn66xx pass1.2 features.
* Fixed oct-remote-pow to show correct information for cn68xx Octeon model.
* Added Interlaken LA mode support.
* Support for oprofile has been dropped and recommend using perf.
* Added scheduling in traffic-gen to assign tasks dynamically to cores.
Bootloader Changes:
* Updated bootloader to U-Boot 2012.04.01 version.
* Added eMMC boot support for cn6100 and cn7100 Octeon models.
* Added lot of enhancements to eMMC support.
* Fixed various bugs in DDR3 initialization code.
* Fixed numerous issues with FAT filesystem.
* Added fatwrite support.
* Implemented new PHY infrastructure. NOTE: PHY APIs have changed.
* Added more helper functions to simplify board files.
* Speed up USB support.
* More reliance on flat device tree.
* New generic PHY initialization support using device tree.
* Vitesse 10G PHY support.
* mdio command 10G PHY support.
* Changes to GPIO code to use U-Boot GPIO functions.
* Added gpio command.
* cvmx_twsi functions changed to use U-Boot i2c functions.
* New i2c support using low-level driver for larger transaction support.
* Removed CONFIG_FLASH_USES_ALE define, no longer used.
* Added sff6100, snic10e and snic10e_61 boards.
* Enhanced nic68_4 support for revision 3 and SGMII support.
* Added support for nic10e_66 revision 3.
* Various device tree fixes.
* Enhanced compact flash support to use DMA.
* Enhanced ethernet driver for better integration with new PHY infrastructure
and device tree.
* Increased maximum size for eMMC stage 2 bootloader from 248 to 504K.
* Cleaned up board files using more common functions and new PHY
infrastructure.
* Updated Cortina PHY driver.
* Added 64-bit memory commands md64, mm64, mw64.
* Added unlzma command to decompress lzma and xz images.
* Added bunzip command to decompress bzip2 images.
* Added tftpsrv and tftpput commands.
* Fixed reserved memory area support for boards with low DRAM.
* Added multi-bit NAND ECC support.
* U-Boot now copies itself into L2 cache from NOR flash if the L2 cache is
large enough to speed up the boot process.
* Added bootflag for board_init_f() to indicate if booting out of flash, DRAM
or L2 cache.
* Merged in Authentik boot support.
* Increased critical temperatures for NIC cards.
* Added back NetOurBootCommand environment variable as DHCP option 224.
* Serial port is now initialized earlier to aid debugging.
* Changed some reserved memory to use named blocks instead.
* Added support for old Asus NAC38 and Movidis WSX16 units.
* Added support for multiple CF cards for EBB6600 revision 2 boards.
* Added more board hooks during the bootup process.
* Several files were moved out of arch/mips/cpu/octeon into the drivers tree.
Executive Changes:
* A new method has been implemented for providing config for a Simple
Executive application. See the "Config language to configure system"
section of the documentation for details.
* It is now possible to use Simple Executive library as a stand alone
library.
* Any application code which relies on defines from "executive-config.h",
should include "executive-config.h" in its source code explicitly.
* The location of the Build output has changed as simple executive gets
compiled as library. See Documentation for details.
* The cvmx_pko_get_base_queue_per_core() has been removed and the support
for ENABLE_LOCKLESS_PKO in passthrough is dropped.
Toolchain changes:
* Support for uclibc has been removed.
* GCC has been upgraded to 4.7.0.
* binutils has been upgraded to 2.22.
* GDB has been upgraded to 7.4.
* Glibc has been upgraded to 2.16.
* Newlib has been updated to 1.19.0.
* The linux headers which are used for Linux user land is sync'd with the
version of Linux which is included in the SDK.
* For Linux user programs, -fasynchronous-unwind-tables is turned on by default.
* The __sync_* functions should no longer be used and replaced with the
equivalent __atomic_* function which allow better control of placing the syncw.
* The __atomic_* functions will use the Octeon+/Octeon2 atomic instructions
when targeting Octeon2.
* The regex POSIX functions are now supported in simple-exec.
Release 2.3.0
Known Issues fixed (Please refer to the specific OCTEON silicon’s known issues
document for details):
* Outstanding Prefetch to L1 Affects Load Order [Impacts: All cn6xxx OCTEON models]
General Changes:
* Added support for 61XX OCTEON model.
* Enhancements to traffic-gen example program to work better for
XAUI/DXAUI interfaces.
* Various enhancements to oct-top utility.
* Various enhancements to oct-remote-profile and oct-remote-tra utilities.
* Added event based profiling support to oct-remote-profile.
* Fixed hw-ddr2 diagnostics to work on ebb6800 model.
* The oct-pci-boot command does not work if board's DDR Clock is set to
667 MHz.
Bootloader Changes:
* Added support for EBB6100.
* MMC support in EBB6100 only works with Transcend card that have x8 lanes.
* Added bootloader support for NIC68_4 and NIC10e_66 boards.
* Updated read-leveling code in the bootloader for CN6xxx models.
* Added NAND boot support for EBB6800.
Executive Changes:
* Fix to support PCIe gen2 devices on EBB6800.
* Added QLM JTAG initialization code and fixed the code to work on all
OCTEON models.
* Added new APIs to support bit-select extractor feature in cn61xx.
* Various bug fixes to device tree.
* In the PowerThrottle API
- Added cvmx_power_throttle_get_register() to retrieve the
PowerThrottle register of a core.
- Added cvmx_power_throttle_bmp() to take a bitmap-base coremask
parameter.
- Modified cvmx_power_throttle_get_field() to take the
PowerThrottle register value as an extra parameter.
- The PowerThrottle example optionally takes two parameters
``tgt_ppid'' and ``tgt_pct'', a core id and its target
power-level (in percentage) to throttle the core.
* cvmx_pko_get_base_queue_pkoid() and cvmx_pko_get_num_queues_pkoid()
are made o68-only to improve performance.
* In cvmx-coremask.h, introduced bitmap-based coremask.
* Changed the second parameter cvmx_zip_queue_initialize() takes to be
coremask of ZIP cores to use instead of ZIP core number.
* Various bug fixes to interrupt handler to work correctly on EBB6800.
Toolchain Changes:
* Fixed macro expansion on saad instruction in assembler.
* Simple executive gdb does not change focus on next/step command.
* Simple executive debugger stub no longer supplies the wrong reply
when a program exists.
* Updated the backtrace code in glibc to match the upstream code.
Release 2.2.0
General Changes:
* Added support for 66XX OCTEON model.
* Added a new utility called oct-top to display routines using up most CPU
time.
* Added --dwell and --core_mask options to oct-profile.
* Fixed column alignment issues and no. of columns displayed in oct-profile.
* oct-remote-memory extended to specify a count of the elements to be read.
* octeo-ethernet driver has fixes for a deadlock observed under heavy network
load and tasklist_lock activity at the same time.
* Fix permission checks in sysmips(MIPS_CAVIUM_XKPHYS_WRITE).This
prevents non-root users from mapping XKHPYS.
* The shmem example has been removed.
* Limited support for sending packets to PKO ports for PCIe on the simulator.
* Fixed some bugs in trace buffer code for OCTEON II models.
* Fixed pci_read_csr() for OCTEON II models, it was reading values twice.
* Fixed various issues with error interrupts for CN68XX.
Bootloader Changes:
* Added support for EBB6600.
* Added support for BBGW Reference board.
* Added device tree support.
* Added optional octbootbus command.
* Enhanced qlm command to support all lanes.
* Added NAND debugging support.
* Removed DHCP random time.
* Split boot bus initialization to early and late initialization.
* Disabled DFM initialization for boards without DFM support.
* Changed default flash partitioning on several boards.
* Added support for 16-bit PSRAM.
* Made PCIe DMA remapping optional to allow access to memory outside of U-Boot.
* Added hook for when environment variables are changed.
* Added I2C mux support for EBB6600 and EBB6800.
* Fixed eraseenv command.
* Early EBB6600 boards may require a MCU firmware update in order to reliably
boot over PCI due to multi-master issues with the TWSI bus.
* Updated U-Boot porting guide.
* Added GENERIC_NAND_STAGE2 for NAND booting. Note: currently this only works
with the EBB6300 board.
Executive changes:
* When the cvmx_bootinfo_t data structure version is greater than or equal to
(major=1,minor=3) the SE app looks for flat device tree address in
cvmx_bootinfo_t
* When device tree is present SE uses it to get the PHY and USB clock
information.
* SE doesn't use the MDIO multiplexing info from the device tree. Based on
the board type it switches the mux. Currently 66xx EVB is the only board
type that uses MDIO multiplexing.
Release 2.1.0
Special Notes and Known Issues:
* Running oct-remote-profile while a Linux kernel built with
CONFIG_I2C is booting may cause failures. The users can either
build a kernel without I2C support or wait till the kernel has
booted to start the profiler.
* Although the SDK contains some code for Simple Executive CPU
hotplug, this feature is not supported.
* On CN63XX pass 1.X and 2.X parts, if QLM1 is in PCIe target mode,
the user must export the environment variable OCTEON_PCIE_QLM to 1
on the host before using any oct-remote-* utilities.
* This release includes a u-boot porting guide.
General changes:
* Added support for CN68XX and CN63XX Pass 2.x OCTEON models.
* Added simulator for CN68XX.
* Added --samples and --core_mask options to oct-remote-profile utility.
* The linux-filter example has been modified. It now interacts with the
octeon-pow-ethernet Linux driver instead of octeon-ethernet.
* The interrupt numbering has changed in order to support additional
interrupt sources on the CN68XX. Code using symbolic names (like
CVMX_IRQ_WORKQ0) will continue to work. Any code that uses hard
coded irq numbers is no longer supported.
* The ipd_port is no longer identical to the PKO internal port for CN68XX.
One immediate consequence is that arrays indexed by ipd_port might
need to be modified (See HRM 9.7.1 on WORD2[PORT] for details).
New output functions are implemented using the PKO internal port as a
parameter for efficiency.
* Added -t option to show trace buffer information for a combination of trace
buffer units available in CN68XX.
* Updated oct-remote-profile to show L2C statistics for all available TAD and
also to show bus information.
* Updated traffic-gen to support CN68XX. Refer to its README.txt for more details.
Executive changes:
* Added support for INTERLAKEN interface.
* Added wrapper functions for accessing Work Queue Entry fields.
* Added a new config option, CVMX_HELPER_CFG_OPT_USE_DWB, for controlling the
default Don't Write Back settings.
* Added limited support (query only) for pkind and bpid for CN68XX.
* Lockless PKO via ENABLE_LOCKLESS_PKO in passthrough is not supported in CN68XX.
``Lockless'' refers to the way queues are allocated and used and should be
decided by the application.
* cvmx_pko_config_port() returns CVMX_PKO_SUCCESS and does nothing for CN68XX.
* Added macros for assigning PKO queues to more GMX interfaces for CN68XX.
* Added new ZIP APIs for initializing the interface and submitting work based
on Zip Queue, new in CN68XX.
* Fixed various bugs to improve SRIO support in CN63XX.
* Added workaround for SerDes CDR reset Erratum.
* Added SRIO link partner reset sequence, its disabled by default.
* Fixed bug to show correct value for some SLI CSRs.
* Removed deprecated functions.
* Added reporting of dcache and icache parity errors, new in CN6XXX.
* Fixed all code instances doing core shifts to use ULL (e.g. '1ull << core')
to accommodate 32 CPUs on CN68XX.
* Added an experimental configuration tool to statically allocate
resources including pknds, bpids, pko_ports, and pko queues.
* cvmx_l2c_get_tag() has been deprecated and does not work with the CN68XX. Instead
use cvmx_l2c_get_tag_v2() and cvmx_l2c_address_to_tad().
* Added new APIs to setup all 4 trace buffer units on CN68XX.
* Fixed code to free buffers from all FPA pools before disabling FPA.
* To build SE applications to run on CN63XX Pass1.x, export OCTEON_FIX_CN63XXP1=1
before building the application.
* Various bug fixes to debug stub.
* Updated viewzilla, perfzilla utilities to support 32 cores.
Bootloader changes:
* Bootloader upgraded to version 2011.03.
* Added support for ebb6800.
* Added support for Embedded Planet EP6300C.
* Added support for NIC10e.
* Added support for NIC4e.
* Added support for NIC2e.
* Added octreginfo command.
* Added support for Intel E1000 network adapter.
* Added support for OCTEON II USB EHCI.
* Some commands have changed and new commands have been added.
* Command line editing has been enabled.
* Environment variable editing has been enabled.
* OCTEON code has been removed from U-Boot common code to make porting
easier.
* Board-specific code has been moved into board/octeon/common and
board/octeon/board_name.
* OCTEON specific code has been moved to arch/mips/cpu/octeon.
* OCTEON specific commands have been moved to arch/mips/cpu/octeon/commands.
* SDK symlinks have been moved to arch/mips/cpu/octeon/cvmx.
* OCTEON include files have been moved to arch/mips/include/asm/arch-octeon.
* board.c has been renamed board_octeon.c. board.c is not used..
* Bootloaders for nac38 and bbgw_reg are not supported yet.
* Bootloader support for ebb5600, ebh5201, ebt5200, ebt5600, ebh5601 has been
removed from SDK.
* Enhancements to improve DDR3 support on CN6XXX.
* Enhancements to LMC init code.
* DFM updates to support multiple ranks on CN6XXX.
* Fixed DDR3 Read/Write levelling issues.
* Added optional DMA remapping support for PCIe devices without 64-bit
addressing support. This is disabled by default and only works for CN6XXX.
* Fixed 4GB DIMM support for all CN6XXX boards.
* Added SATA support (currently only SIL3132 and related chips are supported).
* Added new_board.sh script to assist adding new boards to U-Boot.
* PCI and PCIe configuration are no longer board specific.
* Added FIT image support.
Toolchain changes
* Improved scheduling of __builtin_prefetch.
* Improved usage of the ins and dins instructions.
* Fixed the standard C++ headers so they include the correct headers sometimes
* Fixed the Linux gdb's watchpoint support.
* Fixed the use of .set noat with gp referenced stores
* Improved code generation of bitfield references.
* Improved code generation of 32bit unaligned loads
* Improved code generation of 16bit unaligned loads
* Fixed the Linux native toolchain's PCH support
* Improved code generation of arguments whos size is less than 32bits
* Improved usage of the badd instruction
* Improved usage of the bbit set of instructions
* Improved usage of the sll instruction
* Improved code generation of widdening 32bit multiplication
* Improved code generation of structure returns who size is less than 64bits
* Improved code generation with __builtin_popcount.
* Fixed glibc's handling of default page size besides 4k.
* Improved code generation of shifts
* Removed usage of k0 inside glibc for binaries built for Octeon 2.
* Fixed a wrong code bug dealing loops
* Add support to gdb to be able to debug 32 cores for CN68XX.
* Fixed some issues with backtrace while debugging the Linux kernel using gdb.
* Improve code generation of the __builtin_bswap* functions.
* Improved performance of some of the string functions in the simple exec environment
* Fixed potential deadlock in sem_*wait and sem_post inside glibc
* Improved code generation of if statements with multiple conditions
* Improved code generation for multiple add inside a loop
* Fixed a wrong code sometimes showing up with a comparison.
* Improved code generation of condition moves
* Improved use of profiling data for some loops
* Added new multilib mfix_cn63xxp1 for simple executive toolchain to use the
correct newlib library on CN63XX Pass1.x models.
* Added -mfix-cn63xxp1 option to replace bad prefetches with 'pref 28' as a
workaround to an errata in CN63XX Pass1.x models.
Release 2.0.0
Special Notes:
* Some EBB6300 boards were shipped by Cavium with 400MHz DDR3 frequency. This
is not a supported frequency for the DIMMs and SDK 2.0 bootloader may
fail to boot or fail to load programs if used with this frequency. Users are
advised to update to a supported frequency. The 'tlv set ddrclock' bootloader
command can be used to do this.
General changes:
* Added support for CN63XX Octeon model.
* Added simulator for CN63XX processor.
* Updated oct-remote utilities to work on CN6XXX processors.
* CN56XX Pass1 is no longer supported.
* Support for CN3xxx Octeon models has been deprecated.
* Updated build system to compile applications with different ISA based on
the Octeon model used.
* Added oct-remote-qlm utility to control QLM jtag chains.
* Fixed various issues noticed with oct-remote-ddr-tune utility
* Improved efficiency of the PCI console (oct-remote-console) by caching data.
* Added GDB remote protocol to oct-remote utilities.
* Added infrastructure to oct-remote to support better profiling.
* Updated Mentor Graphics debug stub to edtm 2.4c release.
* Added support for ebh5610, ebt5810 and Landbird NIC 10g boards.
* Viewzilla has been updated to work with the new OCTEON II processor pipeline
model.
* For running the linux-filter example it is now required to build the Linux kernel
with CONFIG_OCTEON_ETHERNET_LOCKED.
Executive changes:
* Updated the build system such that when an OCTEON II model (CN6XXX) is selected,
the OCTEON II ISA is used. Applications compiled for OCTEON II ISA will not run
on OCTEON Plus or earlier models. Although applications built for OCTEON
Plus ISA will run on OCTEON II.
* CSR definitions are split into individual files based on category.
* Removed the following unused files: cvmx-mio.h, cvmx-asx.h, cvmx-ciu.h, cvmx-cvmmem.h,
cvmx-iob.h, and cvmx-lmc.h.
* The API cvmx_get_cycle() is deprecated. Use cvmx_clock_get_count(CVMX_CLOCK_CORE)
to get cycle counter.
* The API cvmx_get_cycle_global() is deprecated. Use cvmx_clock_get_count(CVMX_CLOCK_SCLK)
instead.
* Use cvmx_clock_get_rate() with appropriate clock type to get the clock rate
instead of using cvmx_sysinfo_get()->cpu_clock_hz.
* Error handling APIs have been changed.
* Added a new file cvmx-boot-info.h. It defines data structures shared amongst the
Bootloader, Linux kernel and Linux user space. Moved from the Bootloader.
* Added debug agent support APIs to debug applications on the simulator
and over serial port, PCI and inter-core.
* Updated management port interface to set the link status of the interface
by reading the PHY.
* Fixed a bug where unchanged bits in RNM_CTL_STATUS would be zeroed.
* Added a new file cvmx-sim-magic.h, which defines APIs to get certain parameters (core
clock rate etc) from the simulator.
* Updated USB host APIs for host and device mode from USB-EXTENDER.
* Added cvmx-ixf28201.{c,h} to initialize SFP+ ports on ebt5810 board.
* Enable interrupts for packet interfaces (like SGMII, XAUI, RGMII, SPI) only
if the interface is enabled.
* Added new function to shutdown packet I/O properly.
* Fixed a problem with lost buffers in fpa pools.
* Removed the define for CVMX_HELPER_ENABLE_BACK_PRESSURE. It controlled the global
enable for per-port backpressure, which is now always enabled by default.
* Various bug fixes to USB interface in host mode.
* Added SRIO interfaces for CN63XX.
* Enabled CN63XX hardware blocks.
* Updated CSRs for CN63XX.
* Added initialization and enabling of RGMII MIX interface to the
management port for CN63XX.
* Added an API for the power-throttle feature in CN63XX.
* Updated PKT_INSTR_HEADER with new bits added in CN63XX.
* Updated trace buffer events with CN63XX events.
* Updated Core performance counters with CN63XX core performance counters.
* Updated L2 performance counters with CN63XX L2 performance counters.
* Updated APIs for cache operation to use new CN63XX instructions.
* Updated atomic functions to use new CN63XX instructions.
* Updated to support OCTEON II physical address layout.
* Added new APIs for SE hotplug functionality.
* Added new APIs for OCTEON II L2C memory protection (virtid) feature.
Bootloader changes:
* Added support for loading multiple linux kernels built with
CONFIG_MAPPED_KERNEL.
* Added support for CN63XX chip and CN-EBB6300 board.
* Updated the number of TLB entries for CN63XX.
* Lot of bug fixes and enhancements to NAND boot.
* Fixed LMC1 DCLK Offsetting Sequence, effects ebh56xx and ebh52xx.
* Removed some deprecated bootloaders: kpb, cn3004_evb_hs5, cn3020_evb_hs5,
nb5, ns0216, ebh3000, hikari.
* Removed all *_failsafe*.bin bootloaders. The normal bootloader works as
failsafe depending on where the image is burned.
* Removed all *_pciboot*.bin bootloaders, use the normal bootloader to boot
with oct-remote utilities. The bootloader provides the correct prompt.
* Enable buffered writes for NOR flash. This makes writes much faster.
* Both failsafe and normal bootloaders now have an embedded header in the image.
This information is used to relocate the bootloader.
NOTE: The failsafe bootloader is incompatible with normal bootloaders
from older releases.
* Added a new command 'bootloaderupdate' to update the image onto flash.
* Added a new command 'bootloadervalid' to validate a bootloader image.
* Enabled USB by default in both failsafe and normal bootloader on all the
available boards.
* Modified failsafe bootloader to dump registers in case of TRAP.
* Set uboot_flash_size to the size of the new bootloader image rounded to
the next 0x10000 bytes when updating bootloader from previous release.
Toolchain changes:
* Added new flags -march=octeon2 and -mtune=octeon2 to generate code and to
tune for OCTEON II.
* New OCTEON II instructions were added to the assembler and the
disassembler.
* The compiler generates the new indexed load instructions when compiling
for OCTEON II.
* New pipeline description was added for OCTEON II.
* Both the Linux and Simple-exec toolchains provide OCTEON II-tuned
libraries along with the default Octeon libraries. When linking
statically GCC will use the OCTEON II libraries if -march=octeon2 is
passed when linking the executable. On Linux the run-time processor is
detected and the appropriate set of shared libraries are used by the
dynamic linker. For uClibc no OCTEON II version of the libraries are
provided.
* The TLS acceleration in GCC is now controlled by a command-line
flag, -mtls-accel. The flag is off by default for OCTEON II. It is on
for earlier Octeons.
* The EXTS instruction is generated now when sign-extending a 64-bit value
after truncating it either into char or short.
* A bug has been fixed which prevented the compiler to use the Octeon
pipeline description.
* Backported a bug fix from mainline contributed by Cavium that was causing
wrong code to be generated when performing arithmetic on bit-field types
whose size is wider than 32 bits.
* The default value for the variable spawn-sim has been inverted to 0. The
simulator is no longer spawned by default upon the target octeon
tcp:<...> command. You can set this variable to 1 in order to revert
back to the old behavior and spawn the simulator from GDB.
* A bug in GDB has been fixed with watchpoint. The bug occurs when the
address being watch exceeded the 32-bit address range.
* The unsupported attach command in the simple-exec GDB's octeon target has
been fixed to produce an error message rather than crash GDB.
Fixes for 63XX Pass 1 Known Issues:
[Refer to the document titled "63XX Pass 1 Know Issues"]
* Section 2.1.1.1 (CKE Initialization Delay): SDK code in bootloader sets
LMC0_REST_CTL[DDR3RST] to one and LMC0_TIMING_PARAMS0[TCKEON] to zero per
the system requirements. No customer action is required when using the
Cavium SDK bootloader.
* Section 2.1.2.1 (L2C+LMC Internal Address Space): The CSR declarations in
SDK does not refer to BIG_RD/BIG_WR registers. Also renamed HOLE_WR to
HOLEWR and HOLE_RD to HOLERD.
* Section 2.1.3.1 (sRIO BAR1 Size): The CSR definition for
SRIOMAINTi_M2S_BAR1_START1[BARSIZE] in the SDK has been modified to refer to
the correct BARSIZE field as mentioned in this document.
* Section 2.1.3.2 (sRIO Soft Packet FIFO Overwrite): The CSR definition for
SRIOMAINTi_IR_SP_RX_CTRL[OVERWRT] field in SDK has been modified to refer
to the correct description as mentioned in this document.
* Section 2.2.3.1 (I-Cache Prefetch): SDK code sets CvmCtl[IPREF] in the
bootloader, i.e. the suggested workaround for this issue is included. No
customer action is required when using the Cavium SDK bootloader.
* Section 2.2.3.6 (Prefetch Instructions in ERL=1 Exception Handlers): All SDK
code has been fixed to not use PREF instructions while ERL=1. This condition
only occurred in the bootloader, so customers using the Cavium SDK bootloader
should not see this issue.
* Section 2.2.3.8 (D-cache Fill Prefetches): The SDK toolchain will replace
all PREF instructions identified in this section with a PREF 28 instruction.
Any code built using Cavium SDK toolchain will not see the effects of this
issue.
* Section 2.2.8.1 (FPA Allocate when Internal Pool Low): The FPA buffer
allocation routines in the SDK Simple Executive library have been fixed to
work around this issue. All application code using standard Cavium SDK APIs
for FPA buffer allocations will not see the effects of this issue.
* Section 2.2.11.1 (Default De-emphasis Setting): The Cavium SDK Simple
Executive helper routines for SGMII, XAUI, PCIe and SRIO interfaces have
been updated to program the correct/suggested QLM settings. Application code
using Cavium SDK's helper routines to initialize these interfaces should not
see the effects of this issue.
Release 1.9.0